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[180.214.233.26]) by smtp.gmail.com with ESMTPSA id a8-20020a1709027d8800b00188c5f0f9e9sm5651917plm.199.2023.01.09.01.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jan 2023 01:51:18 -0800 (PST) Received: by debian.me (Postfix, from userid 1000) id 41B2D104B84; Mon, 9 Jan 2023 16:51:10 +0700 (WIB) From: Bagas Sanjaya To: Jonathan Corbet , Yann Sionneau Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Clement Leger , Guillaume Thouvenin , Bagas Sanjaya Subject: [PATCH 4/8] Documentation: kvx: kvx-iommu: Use reST syntax for subsections Date: Mon, 9 Jan 2023 16:51:04 +0700 Message-Id: <20230109095108.21229-5-bagasdotme@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109095108.21229-1-bagasdotme@gmail.com> References: <874jt7fqxt.fsf@meer.lwn.net> <20230109095108.21229-1-bagasdotme@gmail.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2376; i=bagasdotme@gmail.com; h=from:subject; bh=NnxGT4jFPKBlpOHWRr7hAjGyC9a1TxJWHwHlgdJT4c4=; b=owGbwMvMwCX2bWenZ2ig32LG02pJDMm7H3d5Wrta+S5fz6P6tEtKNM1tYWN74I09K+udZPed6Uqb JHm1o5SFQYyLQVZMkWVSIl/T6V1GIhfa1zrCzGFlAhnCwMUpABPZ3sjwP/CdDHe7mvOd3gaZuVuyhc zm7d+nx7T8ak+X9fukffs+5zIy/FVcuvdfkEpnv5TijvBN3+ZkBPY+KTLpihUrm6fxe8F9fgA= X-Developer-Key: i=bagasdotme@gmail.com; a=openpgp; fpr=701B806FDCA5D3A58FFB8F7D7C276C64A5E44A1D Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Subsection headings of "IOMMU implementation" is written using triple-hash syntax, which is valid only for Markdown. Since the documentation is written in reST, use appropriate syntax instead (tilde underline). Signed-off-by: Bagas Sanjaya --- Documentation/kvx/kvx-iommu.rst | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/kvx/kvx-iommu.rst b/Documentation/kvx/kvx-iommu.= rst index f7f61777eee21e..5ed34463b8bb1f 100644 --- a/Documentation/kvx/kvx-iommu.rst +++ b/Documentation/kvx/kvx-iommu.rst @@ -110,7 +110,8 @@ the cluster. IOMMU is related to a specific bus like PCIe we will be able to specify th= at all peripherals will go through this IOMMU. =20 -### IOMMU Page table +IOMMU Page table +~~~~~~~~~~~~~~~~ =20 We need to be able to know which IO virtual addresses (IOVA) are mapped in= the TLB in order to be able to remove entries when a device finishes a transfe= r and @@ -137,7 +138,8 @@ huge page table for a given IOMMU (typically the PCIe I= OMMU). As we won't refill the TLB we know that we won't have more than 128*16 ent= ries. In this case we can simply keep a table with all possible entries. =20 -### Maintenance interface +Maintenance interface +~~~~~~~~~~~~~~~~~~~~~ =20 It is possible to have several "maintainers" for the same IOMMU. The drive= r is using two of them. One that writes the TLB and another interface reads TLB= . For @@ -149,7 +151,8 @@ following command in gdb: Since different management interface are used for read and write it is saf= e to execute the above command at any moment. =20 -### Interrupts +Interrupts +~~~~~~~~~~ =20 IOMMU can have 3 kind of interrupts that corresponds to 3 different types = of errors (no mapping. protection, parity). When the IOMMU is shared between @@ -163,7 +166,8 @@ stall one. So when an interrupt occurs it is managed by= the driver. All others interrupts that occurs are stored and the IOMMU is stalled. When driver cl= eans the first interrupt others will be managed one by one. =20 -### ASN (Address Space Number) +ASN (Address Space Number) +~~~~~~~~~~~~~~~~~~~~~~~~~~ =20 This is also know as ASID in some other architecture. Each device will hav= e a given ASN that will be given through the device tree. As address space is --=20 An old man doll... just what I always wanted! - Clara