From nobody Tue Feb 10 03:37:02 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15C3DC46467 for ; Sat, 7 Jan 2023 09:46:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231778AbjAGJqw (ORCPT ); Sat, 7 Jan 2023 04:46:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231765AbjAGJqr (ORCPT ); Sat, 7 Jan 2023 04:46:47 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A6B87CBE4 for ; Sat, 7 Jan 2023 01:46:44 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id p24so4218131plw.11 for ; Sat, 07 Jan 2023 01:46:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kb7WlyMl1q/VPJpFF+X4TfNx6Lfb11fY4VoBIq7ymlo=; b=AqPORj3k62mpcxB7NdBDjopWyyNb5AJfYksrKqYZ8SduFvlN6kk1lK58RTrTPHP73D eJf6pkgUiDlGkzbU81ofZ3d2XGwosFeIafV+SYjltN9RsdgD4nxNFJ1NdzVCbYFd49fK 8dop9omAdGIGlSmtluLbQcU6Z9DJKnRnnRvIhCQ8L2U6m7hoNew+YRm7OVd0L7lb/F2/ 53a/NxL7tlX/8IF4gVOONrKr6AXFIZPFnHBKCAk1OV9ua2nIMwK2oSwvzAaBG+Xl1Rsy PKoZvBnDKubcHrcALi1OVoFhST+8207mOGcvae3z3NXKVt9BQSqP5gqT8d19m3pV3giw GaqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kb7WlyMl1q/VPJpFF+X4TfNx6Lfb11fY4VoBIq7ymlo=; b=V/+iRh9QIit8QrKIZQ07cxUTtBYa9bOKzCO3wDzxltEcGoUwVT2W7wMCzEZJsiiWbU Tx+UHTrMikXQXJzyDd2jvD1zrW5zjgJVqB+VVYWvBOqHgx63AYq5B9MA+5v3QIRtSO66 u4pSkVs3Omzfb2dHOJ4iewnm/Xs2cTvvDYL86UPGOriastlGKYwfRbvvqjfHAbiFZsfY eGzDLPMZ6w7EO/xvel/2VkhTpKBw2tC3clE5dX5kPYKXgaEALAU1xA7nXkV6iqZEeaik oiqF+Yt7J5Xn+KpUrRN824P20DPvc5K8BoKWygoN2hDOQNaf8JKv3LIKn9AT/vxRkq23 pYkQ== X-Gm-Message-State: AFqh2kotaXCDj9WIOx9wzDS1yu0ZDwym6SeLi4unN884FJEWM/dbqxL0 e1TUoqRpKvpaW2EN0LGqYUnUsQ== X-Google-Smtp-Source: AMrXdXv2MV05CqQ25JMP8AE4lcoTf8VGAHYFqdK+gs3TuWYKAJT4CkVIYnxDYPsdwXkraKiJk5c9bA== X-Received: by 2002:a17:902:a601:b0:192:910e:6083 with SMTP id u1-20020a170902a60100b00192910e6083mr41156529plq.15.1673084803547; Sat, 07 Jan 2023 01:46:43 -0800 (PST) Received: from fedora.flets-east.jp ([2400:4050:a840:1e00:d54:e521:8bac:7bed]) by smtp.gmail.com with ESMTPSA id n9-20020a170902d2c900b00183c6784704sm2263449plc.291.2023.01.07.01.46.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 01:46:43 -0800 (PST) From: Akihiko Odaki Cc: Mark Brown , Marc Zyngier , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Mathieu Poirier , Oliver Upton , Suzuki K Poulose , Alexandru Elisei , James Morse , Will Deacon , Catalin Marinas , asahi@lists.linux.dev, Alyssa Rosenzweig , Sven Peter , Hector Martin , Akihiko Odaki Subject: [PATCH v6 1/7] arm64: Allow the definition of UNKNOWN system register fields Date: Sat, 7 Jan 2023 18:46:23 +0900 Message-Id: <20230107094629.181236-2-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107094629.181236-1-akihiko.odaki@daynix.com> References: <20230107094629.181236-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marc Zyngier The CCSIDR_EL1 register contains an UNKNOWN field (which replaces fields that were actually defined in previous revisions of the architecture). Define an 'Unkn' field type modeled after the Res0/Res1 types to allow such description. This allows the generation of #define CCSIDR_EL1_UNKN (UL(0) | GENMASK_ULL(31, 28)) which may have its use one day. Hopefully the architecture doesn't add too many of those in the future. Signed-off-by: Marc Zyngier Signed-off-by: Akihiko Odaki Reviewed-by: Mark Brown --- arch/arm64/tools/gen-sysreg.awk | 20 +++++++++++++++++++- arch/arm64/tools/sysreg | 2 ++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm64/tools/gen-sysreg.awk b/arch/arm64/tools/gen-sysreg.= awk index c350164a3955..e1df4b956596 100755 --- a/arch/arm64/tools/gen-sysreg.awk +++ b/arch/arm64/tools/gen-sysreg.awk @@ -98,6 +98,7 @@ END { =20 res0 =3D "UL(0)" res1 =3D "UL(0)" + unkn =3D "UL(0)" =20 next_bit =3D 63 =20 @@ -112,11 +113,13 @@ END { =20 define(reg "_RES0", "(" res0 ")") define(reg "_RES1", "(" res1 ")") + define(reg "_UNKN", "(" unkn ")") print "" =20 reg =3D null res0 =3D null res1 =3D null + unkn =3D null =20 next } @@ -134,6 +137,7 @@ END { =20 res0 =3D "UL(0)" res1 =3D "UL(0)" + unkn =3D "UL(0)" =20 define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2) define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")") @@ -161,7 +165,9 @@ END { define(reg "_RES0", "(" res0 ")") if (res1 !=3D null) define(reg "_RES1", "(" res1 ")") - if (res0 !=3D null || res1 !=3D null) + if (unkn !=3D null) + define(reg "_UNKN", "(" unkn ")") + if (res0 !=3D null || res1 !=3D null || unkn !=3D null) print "" =20 reg =3D null @@ -172,6 +178,7 @@ END { op2 =3D null res0 =3D null res1 =3D null + unkn =3D null =20 next } @@ -190,6 +197,7 @@ END { next_bit =3D 0 res0 =3D null res1 =3D null + unkn =3D null =20 next } @@ -215,6 +223,16 @@ END { next } =20 +/^Unkn/ && (block =3D=3D "Sysreg" || block =3D=3D "SysregFields") { + expect_fields(2) + parse_bitdef(reg, "UNKN", $2) + field =3D "UNKN_" msb "_" lsb + + unkn =3D unkn " | GENMASK_ULL(" msb ", " lsb ")" + + next +} + /^Field/ && (block =3D=3D "Sysreg" || block =3D=3D "SysregFields") { expect_fields(3) field =3D $3 diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 184e58fd5631..f754265aec5f 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -15,6 +15,8 @@ =20 # Res1 [:] =20 +# Unkn [:] + # Field [:] =20 # Enum [:] --=20 2.38.1