From nobody Tue Sep 16 04:27:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2298C4708D for ; Fri, 6 Jan 2023 15:24:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232572AbjAFPXt (ORCPT ); Fri, 6 Jan 2023 10:23:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232331AbjAFPXn (ORCPT ); Fri, 6 Jan 2023 10:23:43 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E650B45649 for ; Fri, 6 Jan 2023 07:23:41 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8552812FC; Fri, 6 Jan 2023 07:24:23 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 220673F71A; Fri, 6 Jan 2023 07:23:40 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: James Clark , Mathieu Poirier , Leo Yan , Alexander Shishkin , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] coresight: cti: Prevent negative values of enable count Date: Fri, 6 Jan 2023 15:23:28 +0000 Message-Id: <20230106152331.1374973-2-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230106152331.1374973-1-james.clark@arm.com> References: <20230106152331.1374973-1-james.clark@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Writing 0 to the enable control repeatedly results in a negative value for enable_req_count. After this, writing 1 to the enable control appears to not work until the count returns to positive. Change it so that it's impossible for enable_req_count to be < 0. Returning an error will also allow us to decide whether to call runtime_pm_put() or not in the following commit. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-cti-core.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwt= racing/coresight/coresight-cti-core.c index d2cf4f4848e1..838872f2484d 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -151,9 +151,16 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) { struct cti_config *config =3D &drvdata->config; struct coresight_device *csdev =3D drvdata->csdev; + int ret =3D 0; =20 spin_lock(&drvdata->spinlock); =20 + /* don't allow negative refcounts, return an error */ + if (!atomic_read(&drvdata->config.enable_req_count)) { + ret =3D -EINVAL; + goto cti_not_disabled; + } + /* check refcount - disable on 0 */ if (atomic_dec_return(&drvdata->config.enable_req_count) > 0) goto cti_not_disabled; @@ -171,12 +178,12 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) coresight_disclaim_device_unlocked(csdev); CS_LOCK(drvdata->base); spin_unlock(&drvdata->spinlock); - return 0; + return ret; =20 /* not disabled this call */ cti_not_disabled: spin_unlock(&drvdata->spinlock); - return 0; + return ret; } =20 void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 val= ue) --=20 2.25.1 From nobody Tue Sep 16 04:27:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25151C54EBE for ; Fri, 6 Jan 2023 15:24:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234496AbjAFPXw (ORCPT ); Fri, 6 Jan 2023 10:23:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230442AbjAFPXp (ORCPT ); Fri, 6 Jan 2023 10:23:45 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3390845666 for ; Fri, 6 Jan 2023 07:23:44 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8C6A143D; Fri, 6 Jan 2023 07:24:25 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 654243F71A; Fri, 6 Jan 2023 07:23:42 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: James Clark , Mathieu Poirier , Leo Yan , Alexander Shishkin , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] coresight: cti: Add PM runtime call in enable_store Date: Fri, 6 Jan 2023 15:23:29 +0000 Message-Id: <20230106152331.1374973-3-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230106152331.1374973-1-james.clark@arm.com> References: <20230106152331.1374973-1-james.clark@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Mao Jinlong In commit 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()") PM runtime calls are removed from cti_enable_hw/cti_disable_hw. When enabling CTI by writing enable sysfs node, clock for accessing CTI register won't be enabled. Device will crash due to register access issue. Add PM runtime call in enable_store to fix this issue. Fixes: 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()") Signed-off-by: Mao Jinlong [Change to only call pm_runtime_put if a disable happened] Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hw= tracing/coresight/coresight-cti-sysfs.c index 6d59c815ecf5..71e7a8266bb3 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -108,10 +108,19 @@ static ssize_t enable_store(struct device *dev, if (ret) return ret; =20 - if (val) + if (val) { + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret) + return ret; ret =3D cti_enable(drvdata->csdev); - else + if (ret) + pm_runtime_put(dev->parent); + } else { ret =3D cti_disable(drvdata->csdev); + if (!ret) + pm_runtime_put(dev->parent); + } + if (ret) return ret; return size; --=20 2.25.1 From nobody Tue Sep 16 04:27:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD128C54EBE for ; Fri, 6 Jan 2023 15:24:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234738AbjAFPYH (ORCPT ); Fri, 6 Jan 2023 10:24:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233592AbjAFPXr (ORCPT ); Fri, 6 Jan 2023 10:23:47 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7F4AB6ECAC for ; Fri, 6 Jan 2023 07:23:46 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14DAC15A1; Fri, 6 Jan 2023 07:24:28 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A5D943F71A; Fri, 6 Jan 2023 07:23:44 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: James Clark , Mathieu Poirier , Leo Yan , Alexander Shishkin , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] coresight: cti: Remove atomic type from enable_req_count Date: Fri, 6 Jan 2023 15:23:30 +0000 Message-Id: <20230106152331.1374973-4-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230106152331.1374973-1-james.clark@arm.com> References: <20230106152331.1374973-1-james.clark@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" enable_req_count is only ever accessed inside the spinlock, so to avoid confusion that there are concurrent accesses and simplify the code, change it to an int. One access outside of the spinlock is in enable_show() which appears to allow partially written data to be displayed between enable_req_count, powered and enabled so move this one inside the spin lock too. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-cti-core.c | 14 +++++++------- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 2 +- drivers/hwtracing/coresight/coresight-cti.h | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwt= racing/coresight/coresight-cti-core.c index 838872f2484d..277c890a1f1f 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -107,12 +107,12 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) cti_write_all_hw_regs(drvdata); =20 config->hw_enabled =3D true; - atomic_inc(&drvdata->config.enable_req_count); + drvdata->config.enable_req_count++; spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; =20 cti_state_unchanged: - atomic_inc(&drvdata->config.enable_req_count); + drvdata->config.enable_req_count++; =20 /* cannot enable due to error */ cti_err_not_enabled: @@ -129,7 +129,7 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *drv= data) config->hw_powered =3D true; =20 /* no need to do anything if no enable request */ - if (!atomic_read(&drvdata->config.enable_req_count)) + if (!drvdata->config.enable_req_count) goto cti_hp_not_enabled; =20 /* try to claim the device */ @@ -156,13 +156,13 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) spin_lock(&drvdata->spinlock); =20 /* don't allow negative refcounts, return an error */ - if (!atomic_read(&drvdata->config.enable_req_count)) { + if (!drvdata->config.enable_req_count) { ret =3D -EINVAL; goto cti_not_disabled; } =20 /* check refcount - disable on 0 */ - if (atomic_dec_return(&drvdata->config.enable_req_count) > 0) + if (--drvdata->config.enable_req_count > 0) goto cti_not_disabled; =20 /* no need to do anything if disabled or cpu unpowered */ @@ -239,7 +239,7 @@ static void cti_set_default_config(struct device *dev, /* Most regs default to 0 as zalloc'ed except...*/ config->trig_filter_enable =3D true; config->ctigate =3D GENMASK(config->nr_ctm_channels - 1, 0); - atomic_set(&config->enable_req_count, 0); + config->enable_req_count =3D 0; } =20 /* @@ -696,7 +696,7 @@ static int cti_cpu_pm_notify(struct notifier_block *nb,= unsigned long cmd, drvdata->config.hw_enabled =3D false; =20 /* check enable reference count to enable HW */ - if (atomic_read(&drvdata->config.enable_req_count)) { + if (drvdata->config.enable_req_count) { /* check we can claim the device as we re-power */ if (coresight_claim_device(csdev)) goto cti_notify_exit; diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hw= tracing/coresight/coresight-cti-sysfs.c index 71e7a8266bb3..e528cff9d4e2 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -84,8 +84,8 @@ static ssize_t enable_show(struct device *dev, bool enabled, powered; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - enable_req =3D atomic_read(&drvdata->config.enable_req_count); spin_lock(&drvdata->spinlock); + enable_req =3D drvdata->config.enable_req_count; powered =3D drvdata->config.hw_powered; enabled =3D drvdata->config.hw_enabled; spin_unlock(&drvdata->spinlock); diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracin= g/coresight/coresight-cti.h index acf7b545e6b9..8b106b13a244 100644 --- a/drivers/hwtracing/coresight/coresight-cti.h +++ b/drivers/hwtracing/coresight/coresight-cti.h @@ -141,7 +141,7 @@ struct cti_config { int nr_trig_max; =20 /* cti enable control */ - atomic_t enable_req_count; + int enable_req_count; bool hw_enabled; bool hw_powered; =20 --=20 2.25.1