From nobody Tue Sep 16 05:49:14 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67C2DC54EBD for ; Fri, 6 Jan 2023 07:18:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231889AbjAFHSE (ORCPT ); Fri, 6 Jan 2023 02:18:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231297AbjAFHSA (ORCPT ); Fri, 6 Jan 2023 02:18:00 -0500 Received: from egress-ip33a.ess.de.barracuda.com (egress-ip33a.ess.de.barracuda.com [18.185.115.192]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2F5063F65 for ; Thu, 5 Jan 2023 23:17:58 -0800 (PST) Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx-outbound9-213.eu-central-1a.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 06 Jan 2023 07:17:55 +0000 Received: by mail-pf1-f200.google.com with SMTP id y10-20020aa7942a000000b005814a9d972bso481407pfo.5 for ; Thu, 05 Jan 2023 23:17:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mistralsolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8AImsv2GJblVk3IBHF2BxV6bmixq4VrLyxTcmlA/Kds=; b=VXvOYP2BVNIXjx3gBef5U41bnvuMVLE4b79oG8axuvfvEMBc8hRtffnHT6LFo21dl4 kVIPW/ujQJOrLTrmQ+n7GDxS8GhGcmxNYYKA6ago+BXICWBhHu+XsSKC2ehIncSvLY/8 tXhIns51ATr30xQfUDBlc4pS4VLHuQvBal344= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8AImsv2GJblVk3IBHF2BxV6bmixq4VrLyxTcmlA/Kds=; b=dUGCFj4d4YOjUS6NUTRUVGCwH7NBySmJ9oQrP6JGJG2r9FkqOoFMausWe2bpFO6CRE dx1Tl9ACawt/ps9tUvorjsT/7LL7lIg7J7siN672cK28pnLIVuvOuj+H1LsJIYN6A38d XaJ/n28FHl2Vymg7TntlahaezUwVeQfl27DEKBtvfKXH1Fk7sRBgU9bp9mg0RHOrLz1Y wqVwF9xzm0uRftRZTpfnp3MmNYc51JlKYIuBwS090/eVWw4BiXRIE72scfk0wYpOA6hj HTSqki9CCMy8pqfyu5OHNdxjQUhBGhJYGrfQ7QoHhBvwOpSGDXtFvnJ84fFZSmxJ55XD M2/g== X-Gm-Message-State: AFqh2kpplHKXlbRD2gmLF29a1q1bcLQDieynvFXm0u/UpjgvP3HHBf8D zCyyiLn8i1OztBTjSoj5dlflScB4gkgISByfTV4zNqIUgnhH63skQOWHEn3y9IOMH2yFSJxYFG+ YIjwMBK+IoJlKaJf4e+iJtd85NcMfxdDG757tsKk59IbEAnoxV8QP7x0nSgLF X-Received: by 2002:a17:902:efc4:b0:192:85f2:49d with SMTP id ja4-20020a170902efc400b0019285f2049dmr39498687plb.18.1672989474570; Thu, 05 Jan 2023 23:17:54 -0800 (PST) X-Google-Smtp-Source: AMrXdXtJjjc8Hv5sNigU6DWyn7qgZerAzkn5dOxYGducXViHoR5KqjHCSi/G5BMJ1QZX0bS8Y8mDjw== X-Received: by 2002:a17:902:efc4:b0:192:85f2:49d with SMTP id ja4-20020a170902efc400b0019285f2049dmr39498676plb.18.1672989474275; Thu, 05 Jan 2023 23:17:54 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id h5-20020a170902680500b00189348ab156sm138845plk.283.2023.01.05.23.17.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 23:17:53 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: Roger Quadros , Vinod Koul , Ravi Gunasekaran , Siddharth Vadapalli Cc: Vignesh Raghavendra , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Sinthu Raja Subject: [PATCH V2 1/2] phy: ti: j721e-wiz: Manage TypeC lane swap if typec-dir-gpios not specified Date: Fri, 6 Jan 2023 12:47:13 +0530 Message-Id: <20230106071714.30562-2-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230106071714.30562-1-sinthu.raja@ti.com> References: <20230106071714.30562-1-sinthu.raja@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-BESS-ID: 1672989475-302517-5395-43080-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.210.200 X-BESS-Outbound-Spam-Score: 0.90 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245283 [from cloudscan17-25.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.90 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_RULE7568M, BSF_BESS_OUTBOUND, BSF_SC0_SA085b, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Sinthu Raja It's possible that the Type-C plug orientation on the DIR line will be implemented through hardware design. In that situation, there won't be an external GPIO line available, but the driver still needs to address this since the DT won't use the typec-dir-gpios property. Add code to handle LN10 Type-C swap if typec-dir-gpios property is not specified in DT. Signed-off-by: Sinthu Raja Reviewed-by: Roger Quadros --- Changes in V2: =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Address review comments: - Update commit description as per review comments. - Restore code to check only debounce delay only if typec-dir-gpios propert= y is specified in DT. - Rename lane_phy_reg variable as master_lane_num. - Update inline comments. V1: https://lore.kernel.org/lkml/20221213124854.3779-2-sinthu.raja@ti.com/T= /#mb1f9f8d26b4ef735bbbc3994a1e9c16d52ca2c19 drivers/phy/ti/phy-j721e-wiz.c | 39 +++++++++++++++++++++++++--------- 1 file changed, 29 insertions(+), 10 deletions(-) diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index ddce5ef7711c..571f0ca18874 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -376,6 +376,7 @@ struct wiz { struct gpio_desc *gpio_typec_dir; int typec_dir_delay; u32 lane_phy_type[WIZ_MAX_LANES]; + u32 master_lane_num[WIZ_MAX_LANES]; struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS]; struct clk *output_clks[WIZ_MAX_OUTPUT_CLOCKS]; struct clk_onecell_data clk_data; @@ -1234,15 +1235,31 @@ static int wiz_phy_reset_deassert(struct reset_cont= roller_dev *rcdev, struct wiz *wiz =3D dev_get_drvdata(dev); int ret; =20 - /* if typec-dir gpio was specified, set LN10 SWAP bit based on that */ - if (id =3D=3D 0 && wiz->gpio_typec_dir) { - if (wiz->typec_dir_delay) - msleep_interruptible(wiz->typec_dir_delay); - - if (gpiod_get_value_cansleep(wiz->gpio_typec_dir)) - regmap_field_write(wiz->typec_ln10_swap, 1); - else - regmap_field_write(wiz->typec_ln10_swap, 0); + if (id =3D=3D 0) { + /* if typec-dir gpio was specified, set LN10 SWAP bit based on that */ + if (wiz->gpio_typec_dir) { + if (wiz->typec_dir_delay) + msleep_interruptible(wiz->typec_dir_delay); + + if (gpiod_get_value_cansleep(wiz->gpio_typec_dir)) + regmap_field_write(wiz->typec_ln10_swap, 1); + else + regmap_field_write(wiz->typec_ln10_swap, 0); + } else { + /* if no typec-dir gpio was specified and PHY type is + * USB3 with master lane number is '0', set LN10 SWAP + * bit to '1' + */ + u32 num_lanes =3D wiz->num_lanes; + int i; + + for (i =3D 0; i < num_lanes; i++) { + if ((wiz->lane_phy_type[i] =3D=3D PHY_TYPE_USB3) + && wiz->master_lane_num[i] =3D=3D 0) { + regmap_field_write(wiz->typec_ln10_swap, 1); + } + } + } } =20 if (id =3D=3D 0) { @@ -1386,8 +1403,10 @@ static int wiz_get_lane_phy_types(struct device *dev= , struct wiz *wiz) dev_dbg(dev, "%s: Lanes %u-%u have phy-type %u\n", __func__, reg, reg + num_lanes - 1, phy_type); =20 - for (i =3D reg; i < reg + num_lanes; i++) + for (i =3D reg; i < reg + num_lanes; i++) { + wiz->master_lane_num[i] =3D reg; wiz->lane_phy_type[i] =3D phy_type; + } } =20 return 0; --=20 2.36.1