From nobody Sun Feb 8 14:22:57 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E392C3DA7A for ; Fri, 6 Jan 2023 01:14:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236917AbjAFBOX (ORCPT ); Thu, 5 Jan 2023 20:14:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236825AbjAFBNe (ORCPT ); Thu, 5 Jan 2023 20:13:34 -0500 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E56D71FF6 for ; Thu, 5 Jan 2023 17:13:33 -0800 (PST) Received: by mail-pf1-x44a.google.com with SMTP id y10-20020aa7942a000000b005814a9d972bso57646pfo.5 for ; Thu, 05 Jan 2023 17:13:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=Yz9E2DnzGU1LH62FYK53IVWLc/c5snlTFiIPiIg7gYk=; b=JgI8xYDcfH+1NRbV5JPQ/HsQ5Ob4bKUgvDUh7lrOmgE0/necFRjH5QYPhFaFmhgGMu OeU03FLmBpTYjyxCsPwWOd+H0+/nd+6aCbBGp+kM7XdoO2veu07K0u4DRTQxL3YoEUjj I/vg1qyC80S7VHKDBPcofn7cDZDkQd7Naam2HEj9c0pbitjBMUu/jOYZ6O/nt9996cvK XKfrs3+t4peZfihZtHDFI16/d/5TarxwGnwlSwg+fKowIWwi5FsSXShTDLj+IyWqsJaK UcscAhxeyQXWw2h8dHy2GwwYAG2whLIVwLsrUlv3j7pj3Juohy5MFxU+TSwuptAVGCr4 mBCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Yz9E2DnzGU1LH62FYK53IVWLc/c5snlTFiIPiIg7gYk=; b=T5NlVjjd6YT4DhO/cGUbw+46o6yrCm4dm6uOuU2MmZ6D2JsKN5qjNunAWIXhyuwUap ESxChOvleZtzUV6+HGa2A0SW6PZ9lm978v6vrvwf7yseTw9qomTN4IsvFalIMMnCdrFP /UlH/LASs1L+C2aA+pdFKg9c47fDGosvi94qpRawKe2EIZnDwLGgEi5IRl1c/uvBuyRY KIuPaMFb9fEuurAFlZ7VKgF0pxAkJ1W9nnnbVkHrfuTwWhDg3Zzv0kj3ZwluuRFrwWzO eH39lvmdS9roLtiMD5jwwTcWLVnsqZfzVLcvSSH6cXVAyh12pqvI3KoMB7hk46CQ3kT1 80yw== X-Gm-Message-State: AFqh2krZCyRPb739CBmtb2LEacjkFpy+fZaKnjFsbYpTzhsv01m1Q8UF aK9m3xiedL+S+iHk/ZTOLMDPBRtXKIs= X-Google-Smtp-Source: AMrXdXuHIxc6PnZAKmk2gR51ZGTv0l6j0GP029d2lQWQ1BQcRYdeD6OI/qIctUPgNI4DYKgskKo57+QPfa8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a65:5582:0:b0:481:b930:78dc with SMTP id j2-20020a655582000000b00481b93078dcmr2897762pgs.272.1672967613224; Thu, 05 Jan 2023 17:13:33 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 6 Jan 2023 01:12:44 +0000 In-Reply-To: <20230106011306.85230-1-seanjc@google.com> Mime-Version: 1.0 References: <20230106011306.85230-1-seanjc@google.com> X-Mailer: git-send-email 2.39.0.314.g84b9a713c41-goog Message-ID: <20230106011306.85230-12-seanjc@google.com> Subject: [PATCH v5 11/33] KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alejandro Jimenez , Maxim Levitsky , Suravee Suthikulpanit , Li RongQing , Greg Edwards Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace the "avic_mode" enum with a single bool to track whether or not x2AVIC is enabled. KVM already has "apicv_enabled" that tracks if any flavor of AVIC is enabled, i.e. AVIC_MODE_NONE and AVIC_MODE_X1 are redundant and unnecessary noise. No functional change intended. Signed-off-by: Sean Christopherson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 46 +++++++++++++++++++---------------------- arch/x86/kvm/svm/svm.c | 4 ++-- arch/x86/kvm/svm/svm.h | 9 +------- 3 files changed, 24 insertions(+), 35 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 0a75993afed6..10b0e996e2e3 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -53,7 +53,7 @@ static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HAS= H_BITS); static u32 next_vm_id =3D 0; static bool next_vm_id_wrapped =3D 0; static DEFINE_SPINLOCK(svm_vm_data_hash_lock); -enum avic_modes avic_mode; +bool x2avic_enabled; =20 /* * This is a wrapper of struct amd_iommu_ir_data. @@ -79,8 +79,7 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) * (deletes the memslot) if any vCPU has x2APIC enabled, thus enabling * AVIC in hybrid mode activates only the doorbell mechanism. */ - if (apic_x2apic_mode(svm->vcpu.arch.apic) && - avic_mode =3D=3D AVIC_MODE_X2) { + if (x2avic_enabled && apic_x2apic_mode(svm->vcpu.arch.apic)) { vmcb->control.int_ctl |=3D X2APIC_MODE_MASK; vmcb->control.avic_physical_id |=3D X2AVIC_MAX_PHYSICAL_ID; /* Disabling MSR intercept for x2APIC registers */ @@ -247,8 +246,8 @@ static u64 *avic_get_physical_id_entry(struct kvm_vcpu = *vcpu, u64 *avic_physical_id_table; struct kvm_svm *kvm_svm =3D to_kvm_svm(vcpu->kvm); =20 - if ((avic_mode =3D=3D AVIC_MODE_X1 && index > AVIC_MAX_PHYSICAL_ID) || - (avic_mode =3D=3D AVIC_MODE_X2 && index > X2AVIC_MAX_PHYSICAL_ID)) + if ((!x2avic_enabled && index > AVIC_MAX_PHYSICAL_ID) || + (index > X2AVIC_MAX_PHYSICAL_ID)) return NULL; =20 avic_physical_id_table =3D page_address(kvm_svm->avic_physical_id_table_p= age); @@ -262,8 +261,8 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu) int id =3D vcpu->vcpu_id; struct vcpu_svm *svm =3D to_svm(vcpu); =20 - if ((avic_mode =3D=3D AVIC_MODE_X1 && id > AVIC_MAX_PHYSICAL_ID) || - (avic_mode =3D=3D AVIC_MODE_X2 && id > X2AVIC_MAX_PHYSICAL_ID)) + if ((!x2avic_enabled && id > AVIC_MAX_PHYSICAL_ID) || + (id > X2AVIC_MAX_PHYSICAL_ID)) return -EINVAL; =20 if (!vcpu->arch.apic->regs) @@ -1066,10 +1065,7 @@ void avic_refresh_virtual_apic_mode(struct kvm_vcpu = *vcpu) struct vcpu_svm *svm =3D to_svm(vcpu); struct vmcb *vmcb =3D svm->vmcb01.ptr; =20 - if (!lapic_in_kernel(vcpu) || avic_mode =3D=3D AVIC_MODE_NONE) - return; - - if (!enable_apicv) + if (!lapic_in_kernel(vcpu) || !enable_apicv) return; =20 if (kvm_vcpu_apicv_active(vcpu)) { @@ -1145,32 +1141,32 @@ bool avic_hardware_setup(struct kvm_x86_ops *x86_op= s) if (!npt_enabled) return false; =20 + /* AVIC is a prerequisite for x2AVIC. */ + if (!boot_cpu_has(X86_FEATURE_AVIC) && !force_avic) { + if (boot_cpu_has(X86_FEATURE_X2AVIC)) { + pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled"); + pr_warn(FW_BUG "Try enable AVIC using force_avic option"); + } + return false; + } + if (boot_cpu_has(X86_FEATURE_AVIC)) { - avic_mode =3D AVIC_MODE_X1; pr_info("AVIC enabled\n"); } else if (force_avic) { /* * Some older systems does not advertise AVIC support. * See Revision Guide for specific AMD processor for more detail. */ - avic_mode =3D AVIC_MODE_X1; pr_warn("AVIC is not supported in CPUID but force enabled"); pr_warn("Your system might crash and burn"); } =20 /* AVIC is a prerequisite for x2AVIC. */ - if (boot_cpu_has(X86_FEATURE_X2AVIC)) { - if (avic_mode =3D=3D AVIC_MODE_X1) { - avic_mode =3D AVIC_MODE_X2; - pr_info("x2AVIC enabled\n"); - } else { - pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled"); - pr_warn(FW_BUG "Try enable AVIC using force_avic option"); - } - } + x2avic_enabled =3D boot_cpu_has(X86_FEATURE_X2AVIC); + if (x2avic_enabled) + pr_info("x2AVIC enabled\n"); =20 - if (avic_mode !=3D AVIC_MODE_NONE) - amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier); + amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier); =20 - return !!avic_mode; + return true; } diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 7651d665723e..9f172f2de195 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -813,7 +813,7 @@ void svm_set_x2apic_msr_interception(struct vcpu_svm *s= vm, bool intercept) if (intercept =3D=3D svm->x2avic_msrs_intercepted) return; =20 - if (avic_mode !=3D AVIC_MODE_X2 || + if (!x2avic_enabled || !apic_x2apic_mode(svm->vcpu.arch.apic)) return; =20 @@ -5028,7 +5028,7 @@ static __init int svm_hardware_setup(void) svm_x86_ops.vcpu_blocking =3D NULL; svm_x86_ops.vcpu_unblocking =3D NULL; svm_x86_ops.vcpu_get_apicv_inhibit_reasons =3D NULL; - } else if (avic_mode =3D=3D AVIC_MODE_X1) { + } else if (!x2avic_enabled) { svm_x86_ops.allow_apicv_in_x2apic_without_x2apic_virtualization =3D true; } =20 diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index d0ed3f595229..546825c82490 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -35,14 +35,7 @@ extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; extern bool npt_enabled; extern int vgif; extern bool intercept_smi; - -enum avic_modes { - AVIC_MODE_NONE =3D 0, - AVIC_MODE_X1, - AVIC_MODE_X2, -}; - -extern enum avic_modes avic_mode; +extern bool x2avic_enabled; =20 /* * Clean bits in VMCB. --=20 2.39.0.314.g84b9a713c41-goog