From nobody Thu Nov 14 17:45:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 357B9C63705 for ; Thu, 5 Jan 2023 08:19:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232179AbjAEITW (ORCPT ); Thu, 5 Jan 2023 03:19:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231231AbjAEIRm (ORCPT ); Thu, 5 Jan 2023 03:17:42 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73DDB58FBB; Thu, 5 Jan 2023 00:16:50 -0800 (PST) X-UUID: e26763e8cf4f4be5a891f084308c3f35-20230105 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=2SWHC8Oxp6O/RP7OYprVR+5LpqMtGm21A+5926VAQM8=; b=VpK5aiJLgetepPnypu+mDgGu4jbXcKQZDyFjtf3uEmXMPnx+a3ZUk1RgMI54bgi2v4WIZSkojxhqYXaNVJ5X/QYk+72TBc4aJRLh2U4dT1Byfawa6xtNy494ECMK2mDcEOPebrIxBaU26oVt4l9TmjmCnqJKGP79Pb+X+Z9WaxQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.17,REQID:b83bbcb9-6ca1-4652-8108-5c0dee912bd4,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:543e81c,CLOUDID:ff2eb953-dd49-462e-a4be-2143a3ddc739,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0,NGT X-UUID: e26763e8cf4f4be5a891f084308c3f35-20230105 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 617526318; Thu, 05 Jan 2023 16:16:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 5 Jan 2023 16:16:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 5 Jan 2023 16:16:16 +0800 From: Trevor Wu To: , , , , , , , CC: , , , , , , , Subject: [PATCH v5 12/13] ASoC: mediatek: mt8188: add machine driver with mt6359 Date: Thu, 5 Jan 2023 16:16:05 +0800 Message-ID: <20230105081606.6582-13-trevor.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230105081606.6582-1-trevor.wu@mediatek.com> References: <20230105081606.6582-1-trevor.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for mt8188 board with mt6359. Signed-off-by: Trevor Wu Reported-by: kernel test robot --- sound/soc/mediatek/Kconfig | 11 + sound/soc/mediatek/mt8188/Makefile | 3 + sound/soc/mediatek/mt8188/mt8188-mt6359.c | 785 ++++++++++++++++++++++ 3 files changed, 799 insertions(+) create mode 100644 sound/soc/mediatek/mt8188/mt8188-mt6359.c diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig index c35e864a2c23..4baac72677d9 100644 --- a/sound/soc/mediatek/Kconfig +++ b/sound/soc/mediatek/Kconfig @@ -220,6 +220,17 @@ config SND_SOC_MT8188 Select Y if you have such device. If unsure select "N". =20 +config SND_SOC_MT8188_MT6359 + tristate "ASoC Audio driver for MT8188 with MT6359 and I2S codecs" + depends on SND_SOC_MT8188 && MTK_PMIC_WRAP + select SND_SOC_MT6359 + select SND_SOC_HDMI_CODEC + help + This adds support for ASoC machine driver for MediaTek MT8188 + boards with the MT6359 and other I2S audio codecs. + Select Y if you have such device. + If unsure select "N". + config SND_SOC_MT8192 tristate "ASoC support for Mediatek MT8192 chip" depends on ARCH_MEDIATEK diff --git a/sound/soc/mediatek/mt8188/Makefile b/sound/soc/mediatek/mt8188= /Makefile index fa5d383c5e47..781e61cbb22b 100644 --- a/sound/soc/mediatek/mt8188/Makefile +++ b/sound/soc/mediatek/mt8188/Makefile @@ -10,3 +10,6 @@ snd-soc-mt8188-afe-objs :=3D \ mt8188-dai-pcm.o =20 obj-$(CONFIG_SND_SOC_MT8188) +=3D snd-soc-mt8188-afe.o + +# machine driver +obj-$(CONFIG_SND_SOC_MT8188_MT6359) +=3D mt8188-mt6359.o diff --git a/sound/soc/mediatek/mt8188/mt8188-mt6359.c b/sound/soc/mediatek= /mt8188/mt8188-mt6359.c new file mode 100644 index 000000000000..919d74ea1934 --- /dev/null +++ b/sound/soc/mediatek/mt8188/mt8188-mt6359.c @@ -0,0 +1,785 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * mt8188-mt6359.c -- MT8188-MT6359 ALSA SoC machine driver + * + * Copyright (c) 2022 MediaTek Inc. + * Author: Trevor Wu + */ + +#include +#include +#include +#include +#include +#include +#include "mt8188-afe-common.h" +#include "../../codecs/mt6359.h" +#include "../common/mtk-afe-platform-driver.h" +#include "../common/mtk-soundcard-driver.h" + +/* FE */ +SND_SOC_DAILINK_DEFS(playback2, + DAILINK_COMP_ARRAY(COMP_CPU("DL2")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(playback3, + DAILINK_COMP_ARRAY(COMP_CPU("DL3")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(playback6, + DAILINK_COMP_ARRAY(COMP_CPU("DL6")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(playback7, + DAILINK_COMP_ARRAY(COMP_CPU("DL7")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(playback8, + DAILINK_COMP_ARRAY(COMP_CPU("DL8")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(playback10, + DAILINK_COMP_ARRAY(COMP_CPU("DL10")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(playback11, + DAILINK_COMP_ARRAY(COMP_CPU("DL11")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture1, + DAILINK_COMP_ARRAY(COMP_CPU("UL1")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture2, + DAILINK_COMP_ARRAY(COMP_CPU("UL2")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture3, + DAILINK_COMP_ARRAY(COMP_CPU("UL3")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture4, + DAILINK_COMP_ARRAY(COMP_CPU("UL4")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture5, + DAILINK_COMP_ARRAY(COMP_CPU("UL5")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture6, + DAILINK_COMP_ARRAY(COMP_CPU("UL6")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture8, + DAILINK_COMP_ARRAY(COMP_CPU("UL8")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture9, + DAILINK_COMP_ARRAY(COMP_CPU("UL9")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(capture10, + DAILINK_COMP_ARRAY(COMP_CPU("UL10")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +/* BE */ +SND_SOC_DAILINK_DEFS(adda, + DAILINK_COMP_ARRAY(COMP_CPU("ADDA")), + DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", + "mt6359-snd-codec-aif1")), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(dptx, + DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(etdm1_in, + DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(etdm2_in, + DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(etdm1_out, + DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(etdm2_out, + DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(etdm3_out, + DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(pcm1, + DAILINK_COMP_ARRAY(COMP_CPU("PCM1")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +struct mt8188_mt6359_priv { + struct snd_soc_jack dp_jack; + struct snd_soc_jack hdmi_jack; +}; + +struct mt8188_card_data { + const char *name; + unsigned long quirk; +}; + +static const struct snd_soc_dapm_widget mt8188_mt6359_widgets[] =3D { + SND_SOC_DAPM_HP("Headphone", NULL), + SND_SOC_DAPM_MIC("Headset Mic", NULL), +}; + +static const struct snd_kcontrol_new mt8188_mt6359_controls[] =3D { + SOC_DAPM_PIN_SWITCH("Headphone"), + SOC_DAPM_PIN_SWITCH("Headset Mic"), +}; + +#define CKSYS_AUD_TOP_CFG 0x032c +#define CKSYS_AUD_TOP_MON 0x0330 + +static int mt8188_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rt= d) +{ + struct snd_soc_component *cmpnt_afe =3D + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct snd_soc_component *cmpnt_codec =3D + asoc_rtd_to_codec(rtd, 0)->component; + struct mtk_base_afe *afe; + struct mt8188_afe_private *afe_priv; + struct mtkaif_param *param; + int chosen_phase_1, chosen_phase_2; + int prev_cycle_1, prev_cycle_2; + int test_done_1, test_done_2; + int cycle_1, cycle_2; + int mtkaif_chosen_phase[MT8188_MTKAIF_MISO_NUM]; + int mtkaif_phase_cycle[MT8188_MTKAIF_MISO_NUM]; + int mtkaif_calibration_num_phase; + bool mtkaif_calibration_ok; + unsigned int monitor =3D 0; + int counter; + int phase; + int i; + + if (!cmpnt_afe) + return -EINVAL; + + afe =3D snd_soc_component_get_drvdata(cmpnt_afe); + afe_priv =3D afe->platform_priv; + param =3D &afe_priv->mtkaif_params; + + dev_dbg(afe->dev, "%s(), start\n", __func__); + + param->mtkaif_calibration_ok =3D false; + for (i =3D 0; i < MT8188_MTKAIF_MISO_NUM; i++) { + param->mtkaif_chosen_phase[i] =3D -1; + param->mtkaif_phase_cycle[i] =3D 0; + mtkaif_chosen_phase[i] =3D -1; + mtkaif_phase_cycle[i] =3D 0; + } + + if (IS_ERR(afe_priv->topckgen)) { + dev_info(afe->dev, "%s() Cannot find topckgen controller\n", + __func__); + return 0; + } + + pm_runtime_get_sync(afe->dev); + mt6359_mtkaif_calibration_enable(cmpnt_codec); + + /* set test type to synchronizer pulse */ + regmap_update_bits(afe_priv->topckgen, + CKSYS_AUD_TOP_CFG, 0xffff, 0x4); + mtkaif_calibration_num_phase =3D 42; /* mt6359: 0 ~ 42 */ + mtkaif_calibration_ok =3D true; + + for (phase =3D 0; + phase <=3D mtkaif_calibration_num_phase && mtkaif_calibration_ok; + phase++) { + mt6359_set_mtkaif_calibration_phase(cmpnt_codec, + phase, phase, phase); + + regmap_set_bits(afe_priv->topckgen, CKSYS_AUD_TOP_CFG, 0x1); + + test_done_1 =3D 0; + test_done_2 =3D 0; + + cycle_1 =3D -1; + cycle_2 =3D -1; + + counter =3D 0; + while (!(test_done_1 & test_done_2)) { + regmap_read(afe_priv->topckgen, + CKSYS_AUD_TOP_MON, &monitor); + test_done_1 =3D (monitor >> 28) & 0x1; + test_done_2 =3D (monitor >> 29) & 0x1; + + if (test_done_1 =3D=3D 1) + cycle_1 =3D monitor & 0xf; + + if (test_done_2 =3D=3D 1) + cycle_2 =3D (monitor >> 4) & 0xf; + + /* handle if never test done */ + if (++counter > 10000) { + dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, monitor 0= x%x\n", + __func__, + cycle_1, cycle_2, monitor); + mtkaif_calibration_ok =3D false; + break; + } + } + + if (phase =3D=3D 0) { + prev_cycle_1 =3D cycle_1; + prev_cycle_2 =3D cycle_2; + } + + if (cycle_1 !=3D prev_cycle_1 && + mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0] < 0) { + mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0] =3D phase - 1; + mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] =3D prev_cycle_1; + } + + if (cycle_2 !=3D prev_cycle_2 && + mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1] < 0) { + mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1] =3D phase - 1; + mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1] =3D prev_cycle_2; + } + + regmap_clear_bits(afe_priv->topckgen, CKSYS_AUD_TOP_CFG, 0x1); + + if (mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0] >=3D 0 && + mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1] >=3D 0) + break; + } + + if (mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0] < 0) { + mtkaif_calibration_ok =3D false; + chosen_phase_1 =3D 0; + } else { + chosen_phase_1 =3D mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0]; + } + + if (mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1] < 0) { + mtkaif_calibration_ok =3D false; + chosen_phase_2 =3D 0; + } else { + chosen_phase_2 =3D mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1]; + } + + mt6359_set_mtkaif_calibration_phase(cmpnt_codec, + chosen_phase_1, + chosen_phase_2, + 0); + + mt6359_mtkaif_calibration_disable(cmpnt_codec); + pm_runtime_put(afe->dev); + + param->mtkaif_calibration_ok =3D mtkaif_calibration_ok; + param->mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0] =3D chosen_phase_1; + param->mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1] =3D chosen_phase_2; + + for (i =3D 0; i < MT8188_MTKAIF_MISO_NUM; i++) + param->mtkaif_phase_cycle[i] =3D mtkaif_phase_cycle[i]; + + dev_info(afe->dev, "%s(), end, calibration ok %d\n", + __func__, param->mtkaif_calibration_ok); + + return 0; +} + +static int mt8188_mt6359_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_component *cmpnt_codec =3D + asoc_rtd_to_codec(rtd, 0)->component; + + /* set mtkaif protocol */ + mt6359_set_mtkaif_protocol(cmpnt_codec, + MT6359_MTKAIF_PROTOCOL_2_CLK_P2); + + /* mtkaif calibration */ + mt8188_mt6359_mtkaif_calibration(rtd); + + return 0; +} + +enum { + DAI_LINK_DL2_FE, + DAI_LINK_DL3_FE, + DAI_LINK_DL6_FE, + DAI_LINK_DL7_FE, + DAI_LINK_DL8_FE, + DAI_LINK_DL10_FE, + DAI_LINK_DL11_FE, + DAI_LINK_UL1_FE, + DAI_LINK_UL2_FE, + DAI_LINK_UL3_FE, + DAI_LINK_UL4_FE, + DAI_LINK_UL5_FE, + DAI_LINK_UL6_FE, + DAI_LINK_UL8_FE, + DAI_LINK_UL9_FE, + DAI_LINK_UL10_FE, + DAI_LINK_ADDA_BE, + DAI_LINK_DPTX_BE, + DAI_LINK_ETDM1_IN_BE, + DAI_LINK_ETDM2_IN_BE, + DAI_LINK_ETDM1_OUT_BE, + DAI_LINK_ETDM2_OUT_BE, + DAI_LINK_ETDM3_OUT_BE, + DAI_LINK_PCM1_BE, +}; + +static int mt8188_dptx_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd =3D substream->private_data; + unsigned int rate =3D params_rate(params); + unsigned int mclk_fs_ratio =3D 256; + unsigned int mclk_fs =3D rate * mclk_fs_ratio; + struct snd_soc_dai *dai =3D asoc_rtd_to_cpu(rtd, 0); + + return snd_soc_dai_set_sysclk(dai, 0, mclk_fs, SND_SOC_CLOCK_OUT); +} + +static const struct snd_soc_ops mt8188_dptx_ops =3D { + .hw_params =3D mt8188_dptx_hw_params, +}; + +static int mt8188_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, + struct snd_pcm_hw_params *params) +{ + /* fix BE i2s format to 32bit, clean param mask first */ + snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), + 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); + + params_set_format(params, SNDRV_PCM_FORMAT_S32_LE); + + return 0; +} + +static int mt8188_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) +{ + struct mt8188_mt6359_priv *priv =3D snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_component *component =3D asoc_rtd_to_codec(rtd, 0)->compon= ent; + int ret =3D 0; + + ret =3D snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, + &priv->hdmi_jack); + if (ret) { + dev_info(rtd->dev, "%s, new jack failed: %d\n", __func__, ret); + return ret; + } + + ret =3D snd_soc_component_set_jack(component, &priv->hdmi_jack, NULL); + if (ret) + dev_info(rtd->dev, "%s, set jack failed on %s (ret=3D%d)\n", + __func__, component->name, ret); + + return ret; +} + +static int mt8188_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) +{ + struct mt8188_mt6359_priv *priv =3D snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_component *component =3D asoc_rtd_to_codec(rtd, 0)->compon= ent; + int ret =3D 0; + + ret =3D snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, + &priv->dp_jack); + if (ret) { + dev_info(rtd->dev, "%s, new jack failed: %d\n", __func__, ret); + return ret; + } + + ret =3D snd_soc_component_set_jack(component, &priv->dp_jack, NULL); + if (ret) + dev_info(rtd->dev, "%s, set jack failed on %s (ret=3D%d)\n", + __func__, component->name, ret); + + return ret; +} + +static struct snd_soc_dai_link mt8188_mt6359_dai_links[] =3D { + /* FE */ + [DAI_LINK_DL2_FE] =3D { + .name =3D "DL2_FE", + .stream_name =3D "DL2 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback2), + }, + [DAI_LINK_DL3_FE] =3D { + .name =3D "DL3_FE", + .stream_name =3D "DL3 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback3), + }, + [DAI_LINK_DL6_FE] =3D { + .name =3D "DL6_FE", + .stream_name =3D "DL6 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback6), + }, + [DAI_LINK_DL7_FE] =3D { + .name =3D "DL7_FE", + .stream_name =3D "DL7 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_PRE, + SND_SOC_DPCM_TRIGGER_PRE, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback7), + }, + [DAI_LINK_DL8_FE] =3D { + .name =3D "DL8_FE", + .stream_name =3D "DL8 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback8), + }, + [DAI_LINK_DL10_FE] =3D { + .name =3D "DL10_FE", + .stream_name =3D "DL10 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback10), + }, + [DAI_LINK_DL11_FE] =3D { + .name =3D "DL11_FE", + .stream_name =3D "DL11 Playback", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(playback11), + }, + [DAI_LINK_UL1_FE] =3D { + .name =3D "UL1_FE", + .stream_name =3D "UL1 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_PRE, + SND_SOC_DPCM_TRIGGER_PRE, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture1), + }, + [DAI_LINK_UL2_FE] =3D { + .name =3D "UL2_FE", + .stream_name =3D "UL2 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture2), + }, + [DAI_LINK_UL3_FE] =3D { + .name =3D "UL3_FE", + .stream_name =3D "UL3 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture3), + }, + [DAI_LINK_UL4_FE] =3D { + .name =3D "UL4_FE", + .stream_name =3D "UL4 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture4), + }, + [DAI_LINK_UL5_FE] =3D { + .name =3D "UL5_FE", + .stream_name =3D "UL5 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture5), + }, + [DAI_LINK_UL6_FE] =3D { + .name =3D "UL6_FE", + .stream_name =3D "UL6 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_PRE, + SND_SOC_DPCM_TRIGGER_PRE, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture6), + }, + [DAI_LINK_UL8_FE] =3D { + .name =3D "UL8_FE", + .stream_name =3D "UL8 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture8), + }, + [DAI_LINK_UL9_FE] =3D { + .name =3D "UL9_FE", + .stream_name =3D "UL9 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture9), + }, + [DAI_LINK_UL10_FE] =3D { + .name =3D "UL10_FE", + .stream_name =3D "UL10 Capture", + .trigger =3D { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST, + }, + .dynamic =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(capture10), + }, + /* BE */ + [DAI_LINK_ADDA_BE] =3D { + .name =3D "ADDA_BE", + .no_pcm =3D 1, + .dpcm_playback =3D 1, + .dpcm_capture =3D 1, + .init =3D mt8188_mt6359_init, + SND_SOC_DAILINK_REG(adda), + }, + [DAI_LINK_DPTX_BE] =3D { + .name =3D "DPTX_BE", + .ops =3D &mt8188_dptx_ops, + .be_hw_params_fixup =3D mt8188_dptx_hw_params_fixup, + .no_pcm =3D 1, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(dptx), + }, + [DAI_LINK_ETDM1_IN_BE] =3D { + .name =3D "ETDM1_IN_BE", + .no_pcm =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBP_CFP, + .dpcm_capture =3D 1, + .ignore_suspend =3D 1, + SND_SOC_DAILINK_REG(etdm1_in), + }, + [DAI_LINK_ETDM2_IN_BE] =3D { + .name =3D "ETDM2_IN_BE", + .no_pcm =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBP_CFP, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(etdm2_in), + }, + [DAI_LINK_ETDM1_OUT_BE] =3D { + .name =3D "ETDM1_OUT_BE", + .no_pcm =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBC_CFC, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(etdm1_out), + }, + [DAI_LINK_ETDM2_OUT_BE] =3D { + .name =3D "ETDM2_OUT_BE", + .no_pcm =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBC_CFC, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(etdm2_out), + }, + [DAI_LINK_ETDM3_OUT_BE] =3D { + .name =3D "ETDM3_OUT_BE", + .no_pcm =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBC_CFC, + .dpcm_playback =3D 1, + SND_SOC_DAILINK_REG(etdm3_out), + }, + [DAI_LINK_PCM1_BE] =3D { + .name =3D "PCM1_BE", + .no_pcm =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBC_CFC, + .dpcm_playback =3D 1, + .dpcm_capture =3D 1, + SND_SOC_DAILINK_REG(pcm1), + }, +}; + +static struct snd_soc_card mt8188_mt6359_soc_card =3D { + .owner =3D THIS_MODULE, + .dai_link =3D mt8188_mt6359_dai_links, + .num_links =3D ARRAY_SIZE(mt8188_mt6359_dai_links), + .dapm_widgets =3D mt8188_mt6359_widgets, + .num_dapm_widgets =3D ARRAY_SIZE(mt8188_mt6359_widgets), + .controls =3D mt8188_mt6359_controls, + .num_controls =3D ARRAY_SIZE(mt8188_mt6359_controls), +}; + +static int mt8188_mt6359_dev_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card =3D &mt8188_mt6359_soc_card; + struct device_node *platform_node; + struct mt8188_mt6359_priv *priv; + struct mt8188_card_data *card_data; + struct snd_soc_dai_link *dai_link; + int ret, i; + + card_data =3D (struct mt8188_card_data *)of_device_get_match_data(&pdev->= dev); + card->dev =3D &pdev->dev; + + ret =3D snd_soc_of_parse_card_name(card, "model"); + if (ret) + return dev_err_probe(&pdev->dev, ret, "%s new card name parsing error\n", + __func__); + + if (!card->name) + card->name =3D card_data->name; + + priv =3D devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + if (of_property_read_bool(pdev->dev.of_node, "audio-routing")) { + ret =3D snd_soc_of_parse_audio_routing(card, "audio-routing"); + if (ret) + return ret; + } + + platform_node =3D of_parse_phandle(pdev->dev.of_node, + "mediatek,platform", 0); + if (!platform_node) { + ret =3D -EINVAL; + return dev_err_probe(&pdev->dev, ret, "Property 'platform' missing or in= valid\n"); + } + + ret =3D parse_dai_link_info(card); + if (ret) + goto err; + + for_each_card_prelinks(card, i, dai_link) { + if (!dai_link->platforms->name) + dai_link->platforms->of_node =3D platform_node; + + if (strcmp(dai_link->name, "DPTX_BE") =3D=3D 0) { + if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) + dai_link->init =3D mt8188_dptx_codec_init; + } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") =3D=3D 0) { + if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) + dai_link->init =3D mt8188_hdmi_codec_init; + } + } + + snd_soc_card_set_drvdata(card, priv); + + ret =3D devm_snd_soc_register_card(&pdev->dev, card); + if (ret) + dev_err_probe(&pdev->dev, ret, "%s snd_soc_register_card fail\n", + __func__); +err: + of_node_put(platform_node); + clean_card_reference(card); + return ret; +} + +static struct mt8188_card_data mt8188_evb_card =3D { + .name =3D "mt8188_mt6359", +}; + +static const struct of_device_id mt8188_mt6359_dt_match[] =3D { + { + .compatible =3D "mediatek,mt8188-mt6359-evb", + .data =3D &mt8188_evb_card, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, mt8188_mt6359_dt_match); + +static struct platform_driver mt8188_mt6359_driver =3D { + .driver =3D { + .name =3D "mt8188_mt6359", + .of_match_table =3D mt8188_mt6359_dt_match, + .pm =3D &snd_soc_pm_ops, + }, + .probe =3D mt8188_mt6359_dev_probe, +}; + +module_platform_driver(mt8188_mt6359_driver); + +/* Module information */ +MODULE_DESCRIPTION("MT8188-MT6359 ALSA SoC machine driver"); +MODULE_AUTHOR("Trevor Wu "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("mt8188 mt6359 soc card"); --=20 2.18.0