From nobody Tue Sep 16 14:11:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B303BC54EBF for ; Mon, 2 Jan 2023 17:12:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236526AbjABRLp (ORCPT ); Mon, 2 Jan 2023 12:11:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236595AbjABRLC (ORCPT ); Mon, 2 Jan 2023 12:11:02 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 201A95F4E; Mon, 2 Jan 2023 09:10:52 -0800 (PST) Received: from toolbox.int.toradex.com ([104.59.205.51]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Ld04c-1oUZCY3QDg-00iGew; Mon, 02 Jan 2023 18:10:31 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Philippe Schenker , Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v2 1/5] arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3 Date: Mon, 2 Jan 2023 18:10:18 +0100 Message-Id: <20230102171023.33853-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230102171023.33853-1-marcel@ziswiler.com> References: <20230102171023.33853-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:h21lIyVYKz/bo6KJX2h0v+41TuDI/KYU4WoQMv5amhvFQbtN41m /jEvshjexIOA3o/RzunTg8qdstuDwdXcwYRI4dnrlzgh8gUbA3e5/+6zXC5nxZB86eUxDg6 H9YC6oWNhxOIbsg33a+aV8PUuUaAqwhk5EgW0cZsARRxR15Kj4xVRV0taSugdf0uGS73icD 6Oo1aAYs9Y/6IQ1b/lfiQ== UI-OutboundReport: notjunk:1;M01:P0:C01kr2S4BaU=;tLJf4/6JxFNR2R+Y+pYf38xpO++ xQwZ8TnOeUCf6bTFsHx10VBOIhyd1gpuVyfXKZ2Nt/+UQdXGP3uG1bZLa0sRFOSOa3pK01nU5 668hZ+USDTILb564uXBIURqt3rjx67ne6cNH3Npz1sVufw2rUj1bQwaXx1CJP4zyT4L9e4d+e vLBluis/Ftt79Gb/iu0To2B5VAkpwsSK3Sh/rP4OoIdg4L9/6jY6ZaoBmdQGxo16qi0m8z33d vqX+jBP1SIQ6nipuEHYZDDSCE0zAp95hESNwWiCkozRnpVkSl5VbIOQG6wFQV6Yr1UsM288DJ fGsFCF9dyrQ+qBSLxVdr66dmc/vH3q9sniXEWXYxeS43J5aMDs+V27lznI7NJDhRhXR9PlHsU XROmFxJuZ5M/zsHi7JjmJxiWkl6qZLars76uz9XlaBN5qXgCp0hnxktuuqjFOnRUO5/KbwEpB I+XwV20EMCfH39TqrUsYJd4DvOJJ+bhBFfIr3mmGS0ArqA6Ukuf7IhjaIAnqaxKwqzmmGDpQA 1+dK0CyUxIFWwQv5PWrPvtXmb+15FeswOzo9OM5g8eNz39jkhuYODrRJOB+qawWGGbH209H6G hN5JPCA4yXlBvVHxKKKZMjRCm6nnLxgQruUt1/unlTcFo2/Ra8MmJXNMX5vlqDCuV5P04NS8O n3ePctfTs3Hkr2tV6WX7y5rGYnqdGpIXn9/v0CalaQ== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add support for lsio_pwm0-3. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../boot/dts/freescale/imx8-ss-lsio.dtsi | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/b= oot/dts/freescale/imx8-ss-lsio.dtsi index 1f3d225e64ec..62b7f7a3e1bc 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -28,6 +28,54 @@ lsio_bus_clk: clock-lsio-bus { clock-output-names =3D "lsio_bus_clk"; }; =20 + lsio_pwm0: pwm@5d000000 { + compatible =3D "fsl,imx27-pwm"; + reg =3D <0x5d000000 0x10000>; + clock-names =3D "ipg", "per"; + clocks =3D <&pwm0_lpcg 4>, + <&pwm0_lpcg 1>; + assigned-clocks =3D <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates =3D <24000000>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + lsio_pwm1: pwm@5d010000 { + compatible =3D "fsl,imx27-pwm"; + reg =3D <0x5d010000 0x10000>; + clock-names =3D "ipg", "per"; + clocks =3D <&pwm1_lpcg 4>, + <&pwm1_lpcg 1>; + assigned-clocks =3D <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; + assigned-clock-rates =3D <24000000>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + lsio_pwm2: pwm@5d020000 { + compatible =3D "fsl,imx27-pwm"; + reg =3D <0x5d020000 0x10000>; + clock-names =3D "ipg", "per"; + clocks =3D <&pwm2_lpcg 4>, + <&pwm2_lpcg 1>; + assigned-clocks =3D <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; + assigned-clock-rates =3D <24000000>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + lsio_pwm3: pwm@5d030000 { + compatible =3D "fsl,imx27-pwm"; + reg =3D <0x5d030000 0x10000>; + clock-names =3D "ipg", "per"; + clocks =3D <&pwm3_lpcg 4>, + <&pwm3_lpcg 1>; + assigned-clocks =3D <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; + assigned-clock-rates =3D <24000000>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + lsio_gpio0: gpio@5d080000 { reg =3D <0x5d080000 0x10000>; interrupts =3D ; --=20 2.35.1 From nobody Tue Sep 16 14:11:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2655C54EF1 for ; Mon, 2 Jan 2023 17:12:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236607AbjABRLu (ORCPT ); Mon, 2 Jan 2023 12:11:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236509AbjABRLB (ORCPT ); Mon, 2 Jan 2023 12:11:01 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FD5755BE; Mon, 2 Jan 2023 09:10:52 -0800 (PST) Received: from toolbox.int.toradex.com ([104.59.205.51]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LynwX-1oi6Hf01zj-0166VZ; Mon, 02 Jan 2023 18:10:32 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Max Krummenacher , Philippe Schenker , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v2 2/5] arm64: dts: fsl-imx8qm-device.dtsi: add io-channel-cells to adc nodes Date: Mon, 2 Jan 2023 18:10:19 +0100 Message-Id: <20230102171023.33853-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230102171023.33853-1-marcel@ziswiler.com> References: <20230102171023.33853-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:BF6hlveHaNGnK+Rxx9ph72YkG8TkykKQ5KeCyFLo5XKfGpekZcR haP6Zhbsf6zZZwNYcFenxnxQvMLCTGHsPGiNCPZhvkW9a9maxg9AJ9F+YWqVYpZcQ/NZ1vk 24s4kvfKy2VelrpLH9alQx0//8T+uB7ZLxb+ioVb+pfHSjBEadU7mxCHxPMnXfkYjcKk5th DUIqrRjue45+pFoVSadrw== UI-OutboundReport: notjunk:1;M01:P0:d0DKF2BZQEI=;SJDQj5TmV+2O5SLdhNo7Vlz/MX5 bm9+3l+fki/Awn7DY/FiDXcsJzOctneZheHV6zRbMQCjXPZfy/gRpb2xB4yY/eN519yIZ9tt+ DZj4ZvNJvDWFqh/WM02dss2uM8jde/9ujNvHAvInBySfZRy2Vt4WnDVcOTafpHg0h4gnUR3mI 0cKBhPRW+EBI9atNyH7eU1lEV4bU1Abx/OEL/t1b+URbdwJJVzE4VfLuo83jAaqRYshenwxyp FNaJzOuZtERS+9lVEu78VV98HkoVxhdJShLD9D9/wOSIyH7RcfssHRTsbIArpP/0S83ZhCWUl cqEKDtGVkN92DxL39oM3jWW/yuCkGZimy33YfBmoHozkFLo07BoxA3dCYbE/Xlhg+W/5OOEVy e4ovE/VZklMPEO613uWs0k7P4Hnu0tOwnXMAZ7waCd7AsPKkDJeQ24hVjE/OxRkB5s9gjh3l9 ugxiH178qCbuwMEPrhJM6hoW9uuvGmY281SEHejeSDKRNZgHY7TQ+R0wFaf7YaDE5GS1B7ag0 NTrqZnAMYHfKCyl5Qn5j5Ea9XMWxtbdOuQVDV6eCFxL26Qv/GCFRC2nKKqPWRIOmetZqdxByO /aoyooDho3JI5OL9yN5X/bWGIwFEEgNSCEaGsTnPEFT3Ui3ACT7Hj40apafw899fcAlaZBISc l+OOXYvIIPmy6W7iL2CrbLDRt3/qrSufnXL/XamlrA== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher This commit adds io-channel-cells property to the ADC nodes. This property is required in order for an IIO consumer driver to work. Especially required for Apalis iMX8 QM, as the touchscreen driver uses ADC channels with the ADC driver based on IIO framework. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/bo= ot/dts/freescale/imx8-ss-dma.dtsi index a943a1e2797f..6e5ef8b69bf8 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -270,6 +270,7 @@ i2c3: i2c@5a830000 { =20 adc0: adc@5a880000 { compatible =3D "nxp,imx8qxp-adc"; + #io-channel-cells =3D <1>; reg =3D <0x5a880000 0x10000>; interrupts =3D ; interrupt-parent =3D <&gic>; @@ -284,6 +285,7 @@ adc0: adc@5a880000 { =20 adc1: adc@5a890000 { compatible =3D "nxp,imx8qxp-adc"; + #io-channel-cells =3D <1>; reg =3D <0x5a890000 0x10000>; interrupts =3D ; interrupt-parent =3D <&gic>; --=20 2.35.1 From nobody Tue Sep 16 14:11:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61DCCC3DA7A for ; Mon, 2 Jan 2023 17:11:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236476AbjABRLL (ORCPT ); Mon, 2 Jan 2023 12:11:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236543AbjABRK6 (ORCPT ); Mon, 2 Jan 2023 12:10:58 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B2101147; Mon, 2 Jan 2023 09:10:51 -0800 (PST) Received: from toolbox.int.toradex.com ([104.59.205.51]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MdsFf-1pSgIX3UCL-00PZd1; Mon, 02 Jan 2023 18:10:32 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Philippe Schenker , Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v2 3/5] arm64: dts: freescale: imx8-ss-dma: set lpspi0 max frequency to 60mhz Date: Mon, 2 Jan 2023 18:10:20 +0100 Message-Id: <20230102171023.33853-4-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230102171023.33853-1-marcel@ziswiler.com> References: <20230102171023.33853-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:jpgyUorgs+0IidkM+eK6IH865pHwT9pfiQJkayIVCa5/d5Nhbeh RqTYjPVuj33YauccSM96zLCpOarNEqFpYGaaJzaAu9x+DxsPG+QyK9s++MgOyxaN7ok0Jac 5DIcJ/VYfef08zEml457of5VRGYbfKUjLvHN4POvlAg5uv8I89oK9JbZ7BrFysgoDH7aAde wtR5VjVHxhocbelUfsv2Q== UI-OutboundReport: notjunk:1;M01:P0:YH6chr/nMXM=;VuIeU5GGZbrUICdPF4S8C18uYLx wDeF6xSLVbnfhCFhD3lmNN3sbHwAIP3xsJudIYzo4/ekMbC3744KGND+TcwmvQwE0VrCIawBk WpaPDlPZBomzuHG0t1sEw5xiqpUBPj1yuTWFqM6OuDLr/FZEOmjnU3quxjQwQsCISvUuFNMb4 yqecnvQo82CojX5Vol0Vbagn2dBmMr/noVAXxOBQF150gq73rsQrMMaBzFNcyLazD+X1tj1Fx 8Auh9E+390gkOXZFcbMp5pN35hUY57yyPmoBuMxW6zmxURVD8xRIgKg4bZp9iOh73l/Ymb48K hfvJut16N8V83jvBX+ENmZllUmvE7WKc0WvxtiabjdFnj6japfXM6grHCJRLtKR6BEbBMbh5M NT/g2udtUJGmU8dhyGWWWLkHSKFxd5pkTPH+mhppKrPvdMOZ/IHK8M2lN9oL9tR/jABLsJL30 X/gDZUesZS0MYfEuM4JmvU03GWqbkj7/k3otaSiBv5+apoKjHj9QgZE5zF4d2ujX1g0rsQXqD 35Aca4Z3Mf4NxoFUERKPtVF8xOoYglGs5sWja6f6Mq9sQZaLvdGl+pwkmurLW1qFc/fyFL5zY SzI0npwbC3EXkHvWNnlC4lZqDS6bkau6z4kOYB344KeEl2ho+nIwlU82Tu3WY1KT+Ay4c1XpD ZCTeay/JH/hyiV2ZXdo5eXhZTNF6KxZjdzOb1FpToA== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker 60MHz is the maximum frequency mentioned in the datasheet for master mode. Set that to 60MHz to match lpspi2. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/bo= ot/dts/freescale/imx8-ss-dma.dtsi index 6e5ef8b69bf8..6ccf926b77a5 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -31,7 +31,7 @@ lpspi0: spi@5a000000 { <&spi0_lpcg 1>; clock-names =3D "per", "ipg"; assigned-clocks =3D <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>; - assigned-clock-rates =3D <20000000>; + assigned-clock-rates =3D <60000000>; power-domains =3D <&pd IMX_SC_R_SPI_0>; status =3D "disabled"; }; --=20 2.35.1 From nobody Tue Sep 16 14:11:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 467C6C54EF0 for ; Mon, 2 Jan 2023 17:12:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236700AbjABRME (ORCPT ); Mon, 2 Jan 2023 12:12:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236418AbjABRLI (ORCPT ); Mon, 2 Jan 2023 12:11:08 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A86EBEF; Mon, 2 Jan 2023 09:11:00 -0800 (PST) Received: from toolbox.int.toradex.com ([104.59.205.51]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MOgc4-1p8Wz92vcE-00682G; Mon, 02 Jan 2023 18:10:33 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Marcel Ziswiler , Rob Herring , Denys Drozdov , Fabio Estevam , Frieder Schrempf , Krzysztof Kozlowski , Li Yang , Marek Vasut , Matthias Schiffer , Max Krummenacher , Rob Herring , Shawn Guo Subject: [PATCH v2 4/5] dt-bindings: arm: fsl: add toradex,apalis-imx8 et al. Date: Mon, 2 Jan 2023 18:10:21 +0100 Message-Id: <20230102171023.33853-5-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230102171023.33853-1-marcel@ziswiler.com> References: <20230102171023.33853-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:SOWcSrb0Ud3I2qBNZXS4sTZwPznjx53p99pNnHRAOKDko7U/Zru soqr9PjLAb2pXcw3jTINY/l1ClP1NpnGZVgL/iIYTBLbX4NmVlxlpPJumI8zCtLMXj7FmTz KlTBQSlArCS9MLH3Njzo9R+obbinWUh9hh5PqpDKoc2wa/jmDOhiIxEDsxfYUoGNSUhAB2J g7GNldJWoK7By4h4MZGlg== UI-OutboundReport: notjunk:1;M01:P0:JWAvCcA/+Pc=;4zG8FX6A91eg1Z3tgPVBjKe2KdX 7dpcXWXMIJN8+NtCyWJjd0MWze0p92nTxwg/eDoY/BBVoq2bYsnPioNKHX/Ibz+QfnBuRrHt2 rERvj+eukHxyya/ogoMt33iHlJlv4aJICQ21EYxESLhpw8U5Ly7I/5kHpW18w+RgNDnM9bqpm 0ZozuprhiNAd/wZ1mznqZ6ve4UjZavlSR7XSVcvCqImbwTn+SAfqXh/Xi6nfXi5CDsF6pAaXR gs5w7laOR6eixiO+9bUqIiVy6JspwzD2ucJZ4DljMMjho2FUW6hKuU066MBYIto7GjnqmhURX ZxLAmWDrwxa6NSSnYqOlMEwhUXup2+fEXr9iy95QvbkSwS5hfjuYgf3oojf2jeNq4rLPQVMq4 93R2tos+Ka/ymjRMoJNfESV4V5fjDYtiDMQ1GBYnkwGrWnIpLTQuHkZDx1Y0vuQTbH2RdmCXi wD0siZVSMwn3g33a0Znwfj1sDSwRvzpzscjdmxorTlOgbe+LXU4ZqOR3JYTNyv8Guwlg2AStl +Yu8YJwoXNVeNThrv7E+diX4ehLVoo5hh2tX928nKOg99PHSfgSZIBgGn7TM8JLuNybyo5Cnm z0xnyeY49JFZao8ANmHg6qTbmwhw5LuJyi8Q645XKy2o5QtxW/SQa4atSl0JcP3juoiQu/k9r JhwdxdtFTZ0IieBjn08W69ET0/6FowOfhEfayGbPKA== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcel Ziswiler Add toradex,apalis-imx8 for the Apalis iMX8 aka QuadMax modules and the carrier boards (Apalis Evaluation board as well as Ixora V1.1 and V1.2) they may be mated in. Signed-off-by: Marcel Ziswiler Acked-by: Rob Herring --- Changes in v2: - Fixed missing space in the comment V1.1Module curtsey Max. - Added Rob's ack. Documentation/devicetree/bindings/arm/fsl.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 05b5276a0e14..54c030324136 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1035,6 +1035,18 @@ properties: items: - enum: - fsl,imx8qm-mek # i.MX8QM MEK Board + - toradex,apalis-imx8 # Apalis iMX8 Modules + - const: fsl,imx8qm + + - description: i.MX8QM Boards with Toradex Apalis iMX8 Modules + items: + - enum: + - toradex,apalis-imx8-eval # Apalis iMX8 Module o= n Apalis Evaluation Board + - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Mod= ule on Apalis Eval. Board + - toradex,apalis-imx8-ixora-v1.1 # Apalis iMX8 Module o= n Ixora V1.1 Carrier Board + - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Mod= ule on Ixora V1.1 C. Board + - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Mod= ule on Ixora V1.2 C. Board + - const: toradex,apalis-imx8 - const: fsl,imx8qm =20 - description: i.MX8QXP based Boards --=20 2.35.1 From nobody Tue Sep 16 14:11:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56FE2C63707 for ; Mon, 2 Jan 2023 17:12:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236702AbjABRMG (ORCPT ); Mon, 2 Jan 2023 12:12:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236620AbjABRLN (ORCPT ); Mon, 2 Jan 2023 12:11:13 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20A921DB; Mon, 2 Jan 2023 09:11:09 -0800 (PST) Received: from toolbox.int.toradex.com ([104.59.205.51]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MZSPL-1pX68t25U5-00LBuJ; Mon, 02 Jan 2023 18:10:34 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Marcel Ziswiler , Fabio Estevam , Frieder Schrempf , Krzysztof Kozlowski , Marek Vasut , Pengutronix Kernel Team , Reinhold Mueller , Rob Herring , Sascha Hauer , Shawn Guo , Tim Harvey Subject: [PATCH v2 5/5] arm64: dts: freescale: add initial support for apalis imx8 aka quadmax Date: Mon, 2 Jan 2023 18:10:22 +0100 Message-Id: <20230102171023.33853-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230102171023.33853-1-marcel@ziswiler.com> References: <20230102171023.33853-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:uDunk1vFVgcL+LpdC5iWM/h60TfSxz/ZesscwM6l6kFqWrcQ7zK 7jZxQLwuyJBkMPjvEcomSaZGpdT2GvqHziIZR+7CCV5ZThz29pnjVA5ocK1JnrghEb9rMRG B6Aw63fodp0DAhTPYoJ2lR8NQTs/JcwNvUYDJgRJ6yNWgwt66wWRXcnJB4yX4AadGF4lS5J 1b5JiKR211VbgyAPwe1Lw== UI-OutboundReport: notjunk:1;M01:P0:o4+O332TiUw=;2XcuzH5be7+79dud77pBH/15RW7 ZxUAB6e87oDf27Ms8B3Audw51xpVE2wZuVc6LE0iR3cb2TMsg/ApBd1a8GKOteIEsxvjXgxt/ t/Zw8i/TouTjnQ3jSUGYuLBk/jEB7o6S5pmQ9pOgTXyulEsU8b3SDmIKvCSTBb/+nbv+9w5q4 kt4lwz8JA5knNaSQgYsz5fwXSCJEXFlL0ALxmBL4eGqg6f6O56ieadbvoaODxDAocZ41u3Y6o uIMIE3aL2ATrwNBHwKinTW9AoQwTzPXL5qTQRR13qZVArEc7WdA3afATukJW1unZnCnKNCtjL Ny+b7EMv48gjUkFb2O5e6f9gSqrO1ZoDWoulSQxiPcDqz1UkROHuWVQ1c0KVr5SytRleZCZra pdcFqWncVzgiMngnLu8Luc/6I+lKBqILuTtblW7amMOqpgyxXEo5ITR6IjcmwKvy7pnJGe5DH ACncVGDByKkSh58X0NkUR4bKeYliJ0jzhtTL6wnvsFdmVmWQQNU6dF4KDTEmovX+ESuk212ws kiYAJVzeGL1D0kndAi/u5dWL+iZ/A42lfe00jrdYnC9TGgtNM7OPaskP49zKhBRgvsU5Q4Tq1 glWDYtWTK+41Nl3JY0RIzfw425QhBNcB319JXOE/ZAxuQvAyjgvpSaT/7VjoO3vPuG8jyGqQ5 6aHK+r0+tLcyj506sQNt090pRmJCNfgIKmBNK6Mks8ofiDc3g5uFVs/F7wM+YU4= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcel Ziswiler This patch adds the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm64/boot/dts/freescale/Makefile | 5 + .../boot/dts/freescale/imx8-apalis-eval.dtsi | 146 ++ .../dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 214 +++ .../dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 264 +++ .../boot/dts/freescale/imx8-apalis-v1.1.dtsi | 1510 +++++++++++++++++ .../boot/dts/freescale/imx8qm-apalis-eval.dts | 16 + .../freescale/imx8qm-apalis-ixora-v1.1.dts | 16 + .../dts/freescale/imx8qm-apalis-v1.1-eval.dts | 16 + .../imx8qm-apalis-v1.1-ixora-v1.1.dts | 16 + .../imx8qm-apalis-v1.1-ixora-v1.2.dts | 16 + .../dts/freescale/imx8qm-apalis-v1.1.dtsi | 17 + .../boot/dts/freescale/imx8qm-apalis.dtsi | 340 ++++ 12 files changed, 2576 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dt= si create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dt= si create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.= dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.d= ts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-= v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-= v1.2.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index ef6f364eaa18..c0d621d1d86e 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -112,6 +112,11 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8mq-pico-pi.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mq-thor96.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mq-zii-ultra-zest.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-eval.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-v1.1-eval.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-v1.1-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-v1.1-ixora-v1.2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-eval-v3.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm= 64/boot/dts/freescale/imx8-apalis-eval.dtsi new file mode 100644 index 000000000000..010d17fc7309 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + aliases { + rtc0 =3D &rtc_i2c; + rtc1 =3D &rtc; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name =3D "VCC USBH2(ABCD) / USBH(3|4)"; + }; +}; + +&adc0 { + status =3D "okay"; +}; + +&adc1 { + status =3D "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status =3D "okay"; +}; + +/* TODO: CAN */ + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status =3D "okay"; + + atmel_mxt_ts: touch@4a { + compatible =3D "atmel,maxtouch"; + interrupt-parent =3D <&lsio_gpio4>; + interrupts =3D <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio5>, <&pinctrl_gpio6>; + reg =3D <0x4a>; + reset-gpios =3D <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ + status =3D "disabled"; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status =3D "okay"; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status =3D "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status =3D "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status =3D "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status =3D "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status =3D "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status =3D "okay"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status =3D "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status =3D "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status =3D "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status =3D "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC= Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status =3D "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + status =3D "okay"; +}; + +/* Apalis SD1 */ +&usdhc3 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/ar= ch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi new file mode 100644 index 000000000000..13e745ce4ce0 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -0,0 +1,214 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + aliases { + rtc0 =3D &rtc_i2c; + rtc1 =3D &rtc; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_leds_ixora>; + + /* MXM3_188 */ + led4-green { + label =3D "LED_4_GREEN"; + gpios =3D <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* MXM3_178 */ + led4-red { + label =3D "LED_4_RED"; + gpios =3D <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* MXM3_152 */ + led5-green { + label =3D "LED_5_GREEN"; + gpios =3D <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* MXM3_156 */ + led5-red { + label =3D "LED_5_RED"; + gpios =3D <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name =3D "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status =3D "okay"; +}; + +&adc1 { + status =3D "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status =3D "okay"; +}; + +/* TODO: CAN */ + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status =3D "okay"; + + atmel_mxt_ts: touch@4a { + compatible =3D "atmel,maxtouch"; + interrupt-parent =3D <&lsio_gpio4>; + interrupts =3D <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio5>, <&pinctrl_gpio6>; + reg =3D <0x4a>; + reset-gpios =3D <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ + status =3D "disabled"; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status =3D "okay"; +}; + +&iomuxc { + pinctrl-0 =3D <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, + <&pinctrl_sim0_gpios>, <&pinctrl_uart24_forceoff>, + <&pinctrl_usdhc1_gpios>; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins =3D + , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins =3D + ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status =3D "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status =3D "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status =3D "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status =3D "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status =3D "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status =3D "okay"; +}; + +&lsio_gpio5 { + ngpios =3D <32>; + gpio-line-names =3D "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status =3D "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status =3D "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status =3D "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status =3D "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC= Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status =3D "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + bus-width =3D <4>; + pinctrl-0 =3D <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 =3D <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 =3D <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 =3D <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/ar= ch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi new file mode 100644 index 000000000000..61d83f826c3f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi @@ -0,0 +1,264 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + aliases { + rtc0 =3D &rtc_i2c; + rtc1 =3D &rtc; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_leds_ixora>; + + /* MXM3_188 */ + led4-green { + label =3D "LED_4_GREEN"; + gpios =3D <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* MXM3_178 */ + led4-red { + label =3D "LED_4_RED"; + gpios =3D <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* MXM3_152 */ + led5-green { + label =3D "LED_5_GREEN"; + gpios =3D <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* MXM3_156 */ + led5-red { + label =3D "LED_5_RED"; + gpios =3D <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible =3D "regulator-fixed"; + enable-active-high; + /* MMC1_PWR_CTRL */ + gpio =3D <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enable_3v3_vmmc>; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "3v3_vmmc"; + }; + + reg_can1_supply: regulator-can1-supply { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enable_can1_power>; + regulator-name =3D "can1_supply"; + }; + + reg_can2_supply: regulator-can2-supply { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sata1_act>; + regulator-name =3D "can2_supply"; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name =3D "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status =3D "okay"; +}; + +&adc1 { + status =3D "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status =3D "okay"; +}; + +/* TODO: CAN */ + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status =3D "okay"; + + atmel_mxt_ts: touch@4a { + compatible =3D "atmel,maxtouch"; + interrupt-parent =3D <&lsio_gpio4>; + interrupts =3D <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio5>, <&pinctrl_gpio6>; + reg =3D <0x4a>; + reset-gpios =3D <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ + status =3D "disabled"; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; + + eeprom: eeprom@50 { + compatible =3D "atmel,24c02"; + pagesize =3D <16>; + reg =3D <0x50>; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status =3D "okay"; +}; + +&iomuxc { + pinctrl-0 =3D <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>, + <&pinctrl_uart24_forceoff>, <&pinctrl_usdhc1_gpios>; + + /* PMIC MMC1 power-switch */ + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins =3D + ; /* MXM3_148, PMIC */ + }; + + /* FlexCAN PMIC */ + pinctrl_enable_can1_power: enablecan1powergrp { + fsl,pins =3D + ; /* MXM3_158, PMIC */ + }; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins =3D + , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins =3D + ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status =3D "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status =3D "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status =3D "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status =3D "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status =3D "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status =3D "okay"; +}; + +&lsio_gpio5 { + ngpios =3D <32>; + gpio-line-names =3D "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status =3D "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status =3D "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status =3D "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status =3D "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC= Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status =3D "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + bus-width =3D <4>; + cap-power-off-card; + /delete-property/ no-1-8-v; + pinctrl-0 =3D <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 =3D <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 =3D <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 =3D <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + vmmc-supply =3D <®_3v3_vmmc>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm= 64/boot/dts/freescale/imx8-apalis-v1.1.dtsi new file mode 100644 index 000000000000..0b6ff8c893e1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -0,0 +1,1510 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + chosen { + stdout-path =3D &lpuart1; + }; + + /* Apalis BKL1 */ + backlight: backlight { + compatible =3D "pwm-backlight"; + brightness-levels =3D <0 45 63 88 119 158 203 255>; + default-brightness-level =3D <4>; + enable-gpios =3D <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_bkl_on>; + /* TODO: hook-up to Apalis BKL1_PWM */ + status =3D "disabled"; + }; + + gpio_fan: gpio-fan { + compatible =3D "gpio-fan"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio8>; + gpios =3D <&lsio_gpio3 28 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map =3D < 0 0 + 3000 1>; + }; + +/* TODO: LVDS Panel */ + +/* TODO: Shared PCIe/SATA Reference Clock */ + +/* TODO: PCIe Wi-Fi Reference Clock */ + + /* + * Power management bus used to control LDO1OUT of the + * second PMIC PF8100. This is used for controlling voltage levels of + * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS. + * + * IMX_SC_R_BOARD_R1 for 3.3V + * IMX_SC_R_BOARD_R2 for 1.8V + * IMX_SC_R_BOARD_R3 for 2.5V + * Note that for 2.5V operation the pad muxing needs to be changed, + * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_= PAD. + * + * those power domains are mutually exclusive. + */ + reg_ext_rgmii: regulator-ext-rgmii { + compatible =3D "regulator-fixed"; + regulator-name =3D "VDD_EXT_RGMII (LDO1)"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + power-domains =3D <&pd IMX_SC_R_BOARD_R1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "+V3.3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "+V3.3_AUDIO"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_module_wifi: regulator-module-wifi { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_wifi_pdn>; + regulator-name =3D "wifi_pwrdn_fake_regulator"; + regulator-settling-time-us =3D <100>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + reg_pcie_switch: regulator-pcie-switch { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio7>; + enable-active-high; + gpio =3D <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>; + regulator-name =3D "pcie_switch"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + startup-delay-us =3D <100000>; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usbh_en>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + /* Apalis USBH_EN */ + gpio =3D <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>; + regulator-always-on; + }; + + reg_usb_hsic: regulator-usb-hsic { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb-hsic-dummy"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + }; + + reg_usb_phy: regulator-usb-hsic1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb-phy-dummy"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + }; + + reg_vref_1v8: regulator-vref-1v8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "+V1.8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + decoder_boot: decoder_boot@84000000 { + no-map; + reg =3D <0 0x84000000 0 0x2000000>; + }; + + encoder1_boot: encoder1_boot@86000000 { + no-map; + reg =3D <0 0x86000000 0 0x200000>; + }; + + encoder2_boot: encoder2_boot@86200000 { + no-map; + reg =3D <0 0x86200000 0 0x200000>; + }; + + /* + * reserved-memory layout + * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 + * Shouldn't be used at A core and Linux side. + * + */ + m4_reserved: m4@88000000 { + no-map; + reg =3D <0 0x88000000 0 0x8000000>; + }; + + rpmsg_reserved: rpmsg@90000000 { + no-map; + reg =3D <0 0x90200000 0 0x200000>; + }; + + vdevbuffer: vdevbuffer@90400000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x90400000 0 0x100000>; + no-map; + }; + + decoder_rpc: decoder_rpc@92000000 { + no-map; + reg =3D <0 0x92000000 0 0x200000>; + }; + + dsp_reserved: dsp@92400000 { + no-map; + reg =3D <0 0x92400000 0 0x2000000>; + }; + + encoder1_rpc: encoder1_rpc@94400000 { + no-map; + reg =3D <0 0x94400000 0 0x700000>; + }; + + encoder2_rpc: encoder2_rpc@94b00000 { + no-map; + reg =3D <0 0x94b00000 0 0x700000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible =3D "shared-dma-pool"; + reusable; + size =3D <0 0x3c000000>; + alloc-ranges =3D <0 0xc0000000 0 0x3c000000>; + linux,cma-default; + }; + }; + + /* TODO: Apalis Analogue Audio */ + + /* TODO: HDMI Audio */ + + /* TODO: Apalis SPDIF1 */ + + touchscreen: vf50-touchscreen { + compatible =3D "toradex,vf50-touchscreen"; + io-channels =3D <&adc1 2>,<&adc1 1>, + <&adc1 0>,<&adc1 3>; + interrupt-parent =3D <&lsio_gpio3>; + interrupts =3D <22 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "idle","default"; + pinctrl-0 =3D <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>; + pinctrl-1 =3D <&pinctrl_adc1>, <&pinctrl_touchctrl_gpios>; + vf50-ts-min-pressure =3D <200>; + xp-gpios =3D <&lsio_gpio2 4 GPIO_ACTIVE_LOW>; + xm-gpios =3D <&lsio_gpio2 5 GPIO_ACTIVE_HIGH>; + yp-gpios =3D <&lsio_gpio2 17 GPIO_ACTIVE_LOW>; + ym-gpios =3D <&lsio_gpio2 21 GPIO_ACTIVE_HIGH>; + /* + * NOTE: you must remove the pinctrl-adc1 from the adc1 + * node below to use the touchscreen + */ + status =3D "disabled"; + }; + +}; + +&adc0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc0>; + vref-supply =3D <®_vref_1v8>; +}; + +&adc1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc1>; + vref-supply =3D <®_vref_1v8>; +}; + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* Apalis ETH1 */ +&fec1 { + fsl,magic-packet; + phy-handle =3D <ðphy0>; + phy-mode =3D "rgmii-id"; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_fec1>; + pinctrl-1 =3D <&pinctrl_fec1_sleep>; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ethphy0: ethernet-phy@7 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + interrupt-parent =3D <&lsio_gpio1>; + interrupts =3D <29 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode =3D <0>; + reg =3D <7>; + reset-assert-us =3D <2>; + reset-deassert-us =3D <2>; + reset-gpios =3D <&lsio_gpio1 11 GPIO_ACTIVE_LOW>; + reset-names =3D "phy-reset"; + }; + }; +}; + +/* TODO: Apalis CAN1 (driver upstream but device tree part missing) */ + +/* TODO: Apalis CAN2 (driver upstream but device tree part missing) */ + +/* TODO: Apalis CAN3 (optional, driver upstream but device tree part missi= ng) */ + +/* TODO: Apalis HDMI1 */ + +/* On-module I2C */ +&i2c1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c1>; + status =3D "okay"; + + /* TODO: Audio Codec */ + + /* USB3503A */ + usb3503@8 { + compatible =3D "smsc,usb3503a"; + connect-gpios =3D <&lsio_gpio0 31 GPIO_ACTIVE_LOW>; + initial-mode =3D <1>; + intn-gpios =3D <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usb3503a>; + refclk-frequency =3D <25000000>; + reg =3D <0x08>; + reset-gpios =3D <&lsio_gpio1 2 GPIO_ACTIVE_LOW>; + }; +}; + +/* Apalis I2C1 */ +&i2c2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c2>; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c3>; +}; + +&jpegdec { + status =3D "okay"; +}; + +&jpegenc { + status =3D "okay"; +}; + +/* TODO: Apalis LVDS1 */ + +/* Apalis SPI1 */ +&lpspi0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + cs-gpios =3D <&lsio_gpio3 5 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpspi0>; +}; + +/* Apalis SPI2 */ +&lpspi2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + cs-gpios =3D <&lsio_gpio3 10 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpspi2>; +}; + +/* Apalis UART3 */ +&lpuart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart0>; +}; + +/* Apalis UART1 */ +&lpuart1 { + dma-names =3D "",""; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart1>; +}; + +/* Apalis UART4 */ +&lpuart2 { + dma-names =3D "",""; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart2>; +}; + +/* Apalis UART2 */ +&lpuart3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart3>; +}; + +&lsio_gpio0 { + gpio-line-names =3D "MXM3_279", + "MXM3_277", + "MXM3_135", + "MXM3_203", + "MXM3_201", + "MXM3_275", + "MXM3_110", + "MXM3_120", + "MXM3_1/GPIO1", + "MXM3_3/GPIO2", + "MXM3_124", + "MXM3_122", + "MXM3_5/GPIO3", + "MXM3_7/GPIO4", + "", + "", + "MXM3_4", + "MXM3_211", + "MXM3_209", + "MXM3_2", + "MXM3_136", + "MXM3_134", + "MXM3_6", + "MXM3_8", + "MXM3_112", + "MXM3_118", + "MXM3_114", + "MXM3_116"; +}; + +&lsio_gpio1 { + gpio-line-names =3D "", + "", + "", + "", + "MXM3_286", + "", + "MXM3_87", + "MXM3_99", + "MXM3_138", + "MXM3_140", + "MXM3_239", + "", + "MXM3_281", + "MXM3_283", + "MXM3_126", + "MXM3_132", + "", + "", + "", + "", + "MXM3_173", + "MXM3_175", + "MXM3_123"; + + hdmi-ctrl-hog { + gpio-hog; + gpios =3D <30 GPIO_ACTIVE_HIGH>; + line-name =3D "CONNECTOR_IS_HDMI"; + /* Set signals depending on HDP device type, 0 DP, 1 HDMI */ + output-high; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_hdmi_ctrl>; + }; +}; + +&lsio_gpio2 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "MXM3_198", + "MXM3_35", + "MXM3_164", + "", + "", + "", + "", + "MXM3_217", + "MXM3_215", + "", + "", + "MXM3_193", + "MXM3_194", + "MXM3_37", + "", + "MXM3_271", + "MXM3_273", + "MXM3_195", + "MXM3_197", + "MXM3_177", + "MXM3_179", + "MXM3_181", + "MXM3_183", + "MXM3_185", + "MXM3_187"; + + /* + * Add GPIO2_20 as a wakeup source: + * Pin: 101 SC_P_SPI3_CS0 (MXM3_37/WAKE1_MICO) + * Type: 5 SC_PAD_WAKEUP_FALL_EDGE + * Line: 20 + */ + pad-wakeup =3D ; + pad-wakeup-num =3D <1>; + + pcie_wifi_hog { + gpio-hog; + gpios =3D <11 GPIO_ACTIVE_HIGH>; + line-name =3D "PCIE_WIFI_CLK"; + output-high; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcie_wifi_refclk>; + }; +}; + +&lsio_gpio3 { + gpio-line-names =3D "MXM3_191", + "", + "MXM3_221", + "MXM3_225", + "MXM3_223", + "MXM3_227", + "MXM3_200", + "MXM3_235", + "MXM3_231", + "MXM3_229", + "MXM3_233", + "MXM3_204", + "MXM3_196", + "", + "MXM3_202", + "", + "", + "", + "MXM3_305", + "MXM3_307", + "MXM3_309", + "MXM3_311", + "MXM3_315", + "MXM3_317", + "MXM3_319", + "MXM3_321", + "MXM3_15/GPIO7", + "MXM3_63", + "MXM3_17/GPIO8", + "MXM3_12", + "MXM3_14", + "MXM3_16"; +}; + +&lsio_gpio4 { + gpio-line-names =3D "MXM3_18", + "MXM3_11/GPIO5", + "MXM3_13/GPIO6", + "MXM3_274", + "MXM3_84", + "MXM3_262", + "MXM3_96", + "", + "", + "", + "", + "", + "MXM3_190", + "", + "", + "", + "MXM3_269", + "MXM3_251", + "MXM3_253", + "MXM3_295", + "MXM3_299", + "MXM3_301", + "MXM3_297", + "MXM3_293", + "MXM3_291", + "MXM3_289", + "MXM3_287"; + + /* Enable pcie root / sata ref clock unconditionally */ + pcie_sata_hog { + gpio-hog; + gpios =3D <11 GPIO_ACTIVE_HIGH>; + line-name =3D "PCIE_SATA_CLK"; + output-high; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcie_sata_refclk>; + }; +}; + +&lsio_gpio5 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_150", + "MXM3_160", + "MXM3_162", + "MXM3_144", + "MXM3_146", + "MXM3_148", + "MXM3_152", + "MXM3_156", + "MXM3_158", + "MXM3_159", + "MXM3_184", + "MXM3_180", + "MXM3_186", + "MXM3_188", + "MXM3_176", + "MXM3_178"; +}; + +&lsio_gpio6 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_261", + "MXM3_263", + "MXM3_259", + "MXM3_257", + "MXM3_255", + "MXM3_128", + "MXM3_130", + "MXM3_265", + "MXM3_249", + "MXM3_247", + "MXM3_245", + "MXM3_243"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm0>; + #pwm-cells =3D <3>; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm1>; + #pwm-cells =3D <3>; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm2>; + #pwm-cells =3D <3>; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm3>; + #pwm-cells =3D <3>; +}; + +/* TODO: Messaging Units */ + +/* TODO: Apalis PCIE1 */ + +/* TODO: On-module Wi-Fi */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Thermal Zones */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC= Hub */ + +/* TODO: Apalis USBH4 */ + +/* Apalis USBO1 */ +&usbphy1 { + phy-3p0-supply =3D <®_usb_phy>; + status =3D "okay"; +}; + +&usbotg1 { + adp-disable; + ci-disable-lpm; + hnp-disable; + over-current-active-low; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usbotg1>; + power-active-high; + srp-disable; +}; + +/* On-module eMMC */ +&usdhc1 { + bus-width =3D <8>; + non-removable; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc1>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + status =3D "okay"; +}; + +/* Apalis MMC1 */ +&usdhc2 { + bus-width =3D <8>; + cd-gpios =3D <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ + no-1-8-v; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc2_4bit>, + <&pinctrl_usdhc2_8bit>, + <&pinctrl_mmc1_cd>; + pinctrl-1 =3D <&pinctrl_usdhc2_4bit_100mhz>, + <&pinctrl_usdhc2_8bit_100mhz>, + <&pinctrl_mmc1_cd>; + pinctrl-2 =3D <&pinctrl_usdhc2_4bit_200mhz>, + <&pinctrl_usdhc2_8bit_200mhz>, + <&pinctrl_mmc1_cd>; + pinctrl-3 =3D <&pinctrl_usdhc2_4bit_sleep>, + <&pinctrl_usdhc2_8bit_sleep>, + <&pinctrl_mmc1_cd_sleep>; +}; + +/* Apalis SD1 */ +&usdhc3 { + bus-width =3D <4>; + cd-gpios =3D <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */ + no-1-8-v; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>; + pinctrl-1 =3D <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>; + pinctrl-2 =3D <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; +}; + +/* TODO: Video Processing Unit (driver upstream but device tree part missi= ng) */ + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>, + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, + <&pinctrl_usdhc1_gpios>; + + /* Apalis AN1_ADC */ + pinctrl_adc0: adc0grp { + fsl,pins =3D + /* Apalis AN1_ADC0 */ + , + /* Apalis AN1_ADC1 */ + , + /* Apalis AN1_ADC2 */ + , + /* Apalis AN1_TSWIP_ADC3 */ + ; + }; + + /* Apalis AN1_TS */ + pinctrl_adc1: adc1grp { + fsl,pins =3D + /* Apalis AN1_TSPX */ + , + /* Apalis AN1_TSMX */ + , + /* Apalis AN1_TSPY */ + , + /* Apalis AN1_TSMY */ + ; + }; + + /* Apalis CAM1 */ + pinctrl_cam1_gpios: cam1gpiosgrp { + fsl,pins =3D + /* Apalis CAM1_D7 */ + , + /* Apalis CAM1_D6 */ + , + /* Apalis CAM1_D5 */ + , + /* Apalis CAM1_D4 */ + , + /* Apalis CAM1_D3 */ + , + /* Apalis CAM1_D2 */ + , + /* Apalis CAM1_D1 */ + , + /* Apalis CAM1_D0 */ + , + /* Apalis CAM1_PCLK */ + , + /* Apalis CAM1_MCLK */ + , + /* Apalis CAM1_VSYNC */ + , + /* Apalis CAM1_HSYNC */ + ; + }; + + /* Apalis DAP1 */ + pinctrl_dap1_gpios: dap1gpiosgrp { + fsl,pins =3D + /* Apalis DAP1_MCLK */ + , + /* Apalis DAP1_D_OUT */ + , + /* Apalis DAP1_RESET */ + , + /* Apalis DAP1_BIT_CLK */ + , + /* Apalis DAP1_D_IN */ + , + /* Apalis DAP1_SYNC */ + , + /* On-module Wi-Fi_I2S_EN# */ + ; + }; + + /* Apalis LCD1_G1+2 */ + pinctrl_esai0_gpios: esai0gpiosgrp { + fsl,pins =3D + /* Apalis LCD1_G1 */ + , + /* Apalis LCD1_G2 */ + ; + }; + + /* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */ + pinctrl_fec1: fec1grp { + fsl,pins =3D + /* Use pads in 3.3V mode */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + /* On-module ETH_RESET# */ + , + /* On-module ETH_INT# */ + ; + }; + + pinctrl_fec1_sleep: fec1-sleepgrp { + fsl,pins =3D + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + /* Apalis LCD1_ */ + pinctrl_fec2_gpios: fec2gpiosgrp { + fsl,pins =3D + , + /* Apalis LCD1_R1 */ + , + /* Apalis LCD1_R0 */ + , + /* Apalis LCD1_G0 */ + , + /* Apalis LCD1_R7 */ + , + /* Apalis LCD1_DE */ + , + /* Apalis LCD1_HSYNC */ + , + /* Apalis LCD1_VSYNC */ + , + /* Apalis LCD1_PCLK */ + , + /* Apalis LCD1_R6 */ + , + /* Apalis LCD1_R5 */ + , + /* Apalis LCD1_R4 */ + , + /* Apalis LCD1_R3 */ + , + /* Apalis LCD1_R2 */ + ; + }; + + /* Apalis CAN1 */ + pinctrl_flexcan1: flexcan0grp { + fsl,pins =3D + , + ; + }; + + /* Apalis CAN2 */ + pinctrl_flexcan2: flexcan1grp { + fsl,pins =3D + , + ; + }; + + /* Apalis CAN3 (optional) */ + pinctrl_flexcan3: flexcan2grp { + fsl,pins =3D + , + ; + }; + + /* Apalis GPIO1 */ + pinctrl_gpio1: gpio1grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO2 */ + pinctrl_gpio2: gpio2grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO3 */ + pinctrl_gpio3: gpio3grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO4 */ + pinctrl_gpio4: gpio4grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO5 */ + pinctrl_gpio5: gpio5grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO6 */ + pinctrl_gpio6: gpio6grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO7 */ + pinctrl_gpio7: gpio7grp { + fsl,pins =3D + ; + }; + + /* Apalis GPIO8 */ + pinctrl_gpio8: gpio8grp { + fsl,pins =3D + ; + }; + + /* Apalis BKL1_ON */ + pinctrl_gpio_bkl_on: gpiobklongrp { + fsl,pins =3D + ; + }; + + /* Apalis WAKE1_MICO */ + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins =3D + ; + }; + + /* Apalis USBH_OC# */ + pinctrl_gpio_usbh_oc_n: gpiousbhocngrp { + fsl,pins =3D + ; + }; + + /* On-module HDMI_CTRL */ + pinctrl_hdmi_ctrl: hdmictrlgrp { + fsl,pins =3D + ; + }; + + /* On-module I2C */ + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins =3D + , + ; + }; + + /* Apalis I2C1 */ + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins =3D + , + ; + }; + + /* Apalis I2C3 (CAM) */ + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins =3D + , + ; + }; + + /* Apalis SPI1 */ + pinctrl_lpspi0: lpspi0grp { + fsl,pins =3D + , + , + , + ; + }; + + /* Apalis SPI2 */ + pinctrl_lpspi2: lpspi2grp { + fsl,pins =3D + , + , + , + ; + }; + + /* Apalis UART3 */ + pinctrl_lpuart0: lpuart0grp { + fsl,pins =3D + , + ; + }; + + /* Apalis UART1 */ + pinctrl_lpuart1: lpuart1grp { + fsl,pins =3D + , + , + , + ; + }; + + /* Apalis UART1 */ + pinctrl_lpuart1ctrl: lpuart1ctrlgrp { + fsl,pins =3D + /* Apalis UART1_DTR */ + , + /* Apalis UART1_DSR */ + , + /* Apalis UART1_DCD */ + , + /* Apalis UART1_RI */ + ; + }; + + /* Apalis UART4 */ + pinctrl_lpuart2: lpuart2grp { + fsl,pins =3D + , + ; + }; + + /* Apalis UART2 */ + pinctrl_lpuart3: lpuart3grp { + fsl,pins =3D + , + , + , + ; + }; + + /* Apalis TS_2 */ + pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpiogrp { + fsl,pins =3D + ; + }; + + /* Apalis LCD1_G6+7 */ + pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp { + fsl,pins =3D + /* Apalis LCD1_G6 */ + , + /* Apalis LCD1_G7 */ + ; + }; + + /* Apalis TS_3 */ + pinctrl_mipi_dsi_0_1_en: mipidsi0-1engrp { + fsl,pins =3D + ; + }; + + /* Apalis TS_4 */ + pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp { + fsl,pins =3D + ; + }; + + /* Apalis TS_1 */ + pinctrl_mlb_gpios: mlbgpiosgrp { + fsl,pins =3D + ; + }; + + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd: mmc1cdgrp { + fsl,pins =3D + ; + }; + + pinctrl_mmc1_cd_sleep: mmc1cdsleepgrp { + fsl,pins =3D + ; + }; + + /* On-module PCIe_Wi-Fi */ + pinctrl_pcieb: pciebgrp { + fsl,pins =3D + , + , + ; + }; + + /* On-module PCIe_CLK_EN1 */ + pinctrl_pcie_sata_refclk: pciesatarefclkgrp { + fsl,pins =3D + ; + }; + + /* On-module PCIe_CLK_EN2 */ + pinctrl_pcie_wifi_refclk: pciewifirefclkgrp { + fsl,pins =3D + ; + }; + + /* Apalis PWM3 */ + pinctrl_pwm0: pwm0grp { + fsl,pins =3D + ; + }; + + /* Apalis PWM4 */ + pinctrl_pwm1: pwm1grp { + fsl,pins =3D + ; + }; + + /* Apalis PWM1 */ + pinctrl_pwm2: pwm2grp { + fsl,pins =3D + ; + }; + + /* Apalis PWM2 */ + pinctrl_pwm3: pwm3grp { + fsl,pins =3D + ; + }; + + /* Apalis BKL1_PWM */ + pinctrl_pwm_bkl: pwmbklgrp { + fsl,pins =3D + ; + }; + + /* Apalis LCD1_ */ + pinctrl_qspi1a_gpios: qspi1agpiosgrp { + fsl,pins =3D + /* Apalis LCD1_B0 */ + , + /* Apalis LCD1_B1 */ + , + /* Apalis LCD1_B2 */ + , + /* Apalis LCD1_B3 */ + , + /* Apalis LCD1_B5 */ + , + /* Apalis LCD1_B7 */ + , + /* Apalis LCD1_B4 */ + , + /* Apalis LCD1_B6 */ + ; + }; + + /* On-module RESET_MOCI#_DRV */ + pinctrl_reset_moci: resetmocigrp { + fsl,pins =3D + ; + }; + + /* On-module I2S SGTL5000 for Apalis Analogue Audio */ + pinctrl_sai1: sai1grp { + fsl,pins =3D + , + , + , + ; + }; + + /* Apalis SATA1_ACT# */ + pinctrl_sata1_act: sata1actgrp { + fsl,pins =3D + ; + }; + + /* Apalis SD1_CD# */ + pinctrl_sd1_cd: sd1cdgrp { + fsl,pins =3D + ; + }; + + /* On-module I2S SGTL5000 SYS_MCLK */ + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins =3D + ; + }; + + /* Apalis LCD1_ */ + pinctrl_sim0_gpios: sim0gpiosgrp { + fsl,pins =3D + /* Apalis LCD1_G5 */ + , + /* Apalis LCD1_G3 */ + , + /* Apalis TS_5 */ + , + /* Apalis LCD1_G4 */ + ; + }; + + /* Apalis SPDIF */ + pinctrl_spdif0: spdif0grp { + fsl,pins =3D + , + ; + }; + + pinctrl_touchctrl_gpios: touchctrlgpiosgrp { + fsl,pins =3D + , + , + , + ; + }; + + pinctrl_touchctrl_idle: touchctrlidlegrp { + fsl,pins =3D + , + , + , + ; + }; + + /* On-module USB HSIC HUB (active) */ + pinctrl_usb_hsic_active: usbh1activegrp { + fsl,pins =3D + , + ; + }; + + /* On-module USB HSIC HUB (idle) */ + pinctrl_usb_hsic_idle: usbh1idlegrp { + fsl,pins =3D + , + ; + }; + + /* On-module USB HSIC HUB */ + pinctrl_usb3503a: usb3503agrp { + fsl,pins =3D + /* On-module HSIC_HUB_CONNECT */ + , + /* On-module HSIC_INT_N */ + , + /* On-module HSIC_RESET_N */ + ; + }; + + /* Apalis USBH_EN */ + pinctrl_usbh_en: usbhengrp { + fsl,pins =3D + ; + }; + + /* Apalis USBO1 */ + pinctrl_usbotg1: usbotg1grp { + fsl,pins =3D + /* Apalis USBO1_EN */ + , + /* Apalis USBO1_OC# */ + ; + }; + + /* On-module eMMC */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins =3D + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins =3D + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + /* Apalis TS_6 */ + pinctrl_usdhc1_gpios: usdhc1gpiosgrp { + fsl,pins =3D + ; + }; + + /* Apalis MMC1 */ + pinctrl_usdhc2_4bit: usdhc2grp4bitgrp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_4bit_100mhz: usdhc2-4bit100mhzgrp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_4bit_200mhz: usdhc2-4bit200mhzgrp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_8bit: usdhc2grp8bitgrp { + fsl,pins =3D + , + , + , + ; + }; + + pinctrl_usdhc2_8bit_100mhz: usdhc2-8bit100mhzgrp { + fsl,pins =3D + , + , + , + ; + }; + + pinctrl_usdhc2_8bit_200mhz: usdhc2-8bit200mhzgrp { + fsl,pins =3D + , + , + , + ; + }; + + pinctrl_usdhc2_4bit_sleep: usdhc2-4bitsleepgrp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_8bit_sleep: usdhc2-8bitsleepgrp { + fsl,pins =3D + , + , + , + ; + }; + + /* Apalis SD1 */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins =3D + , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + /* On-module Wi-Fi */ + pinctrl_wifi: wifigrp { + fsl,pins =3D + /* On-module Wi-Fi_SUSCLK_32k */ + , + /* On-module Wi-Fi_PCIE_W_DISABLE */ + ; + }; + + pinctrl_wifi_pdn: wifipdngrp { + fsl,pins =3D + /* On-module Wi-Fi_POWER_DOWN */ + ; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts b/arch/ar= m64/boot/dts/freescale/imx8qm-apalis-eval.dts new file mode 100644 index 000000000000..5ab0921eb599 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board"; + compatible =3D "toradex,apalis-imx8-eval", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts b/a= rch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts new file mode 100644 index 000000000000..68ce58dc7102 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board"; + compatible =3D "toradex,apalis-imx8-ixora-v1.1", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts b/ar= ch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts new file mode 100644 index 000000000000..c8ff75831556 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board"; + compatible =3D "toradex,apalis-imx8-v1.1-eval", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dt= s b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts new file mode 100644 index 000000000000..ad7f644968fa --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board"; + compatible =3D "toradex,apalis-imx8-v1.1-ixora-v1.1", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dt= s b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts new file mode 100644 index 000000000000..3b2e8c93b846 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.2.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board"; + compatible =3D "toradex,apalis-imx8-v1.1-ixora-v1.2", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi b/arch/a= rm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi new file mode 100644 index 000000000000..d6a9701efa23 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include +#include "imx8qm.dtsi" +#include "imx8-apalis-v1.1.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM V1.1"; + compatible =3D "toradex,apalis-imx8-v1.1", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; + +/* TODO: Cooling Maps */ diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi b/arch/arm64/= boot/dts/freescale/imx8qm-apalis.dtsi new file mode 100644 index 000000000000..a0cc1b4c135d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi @@ -0,0 +1,340 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include "imx8qm-apalis-v1.1.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QM"; + compatible =3D "toradex,apalis-imx8", + "fsl,imx8qm"; +}; + +ðphy0 { + interrupts =3D <5 IRQ_TYPE_LEVEL_LOW>; +}; + +/* + * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver + * doesn't support setting internal PHY delay for TXC line for + * this PHY model. Use delay on MAC side instead. + */ +&fec1 { + fsl,rgmii_txc_dly; + phy-mode =3D "rgmii-rxid"; +}; + +/* TODO: Apalis HDMI1 */ + +/* Apalis I2C2 (DDC) */ +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; +}; + +&lsio_gpio0 { + gpio-line-names =3D "MXM3_279", + "MXM3_277", + "MXM3_135", + "MXM3_203", + "MXM3_201", + "MXM3_275", + "MXM3_110", + "MXM3_120", + "MXM3_1/GPIO1", + "MXM3_3/GPIO2", + "MXM3_124", + "MXM3_122", + "MXM3_5/GPIO3", + "MXM3_7/GPIO4", + "", + "", + "MXM3_4", + "MXM3_211", + "MXM3_209", + "MXM3_2", + "MXM3_136", + "MXM3_134", + "MXM3_6", + "MXM3_8", + "MXM3_112", + "MXM3_118", + "MXM3_114", + "MXM3_116"; +}; + +&lsio_gpio1 { + gpio-line-names =3D "", + "", + "", + "", + "MXM3_286", + "", + "MXM3_87", + "MXM3_99", + "MXM3_138", + "MXM3_140", + "MXM3_239", + "", + "MXM3_281", + "MXM3_283", + "MXM3_126", + "MXM3_132", + "", + "", + "", + "", + "MXM3_173", + "MXM3_175", + "MXM3_123"; +}; + +&lsio_gpio2 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "MXM3_198", + "MXM3_35", + "MXM3_164", + "", + "", + "", + "", + "MXM3_217", + "MXM3_215", + "", + "", + "MXM3_193", + "MXM3_194", + "MXM3_37", + "", + "MXM3_271", + "MXM3_273", + "MXM3_195", + "MXM3_197", + "MXM3_177", + "MXM3_179", + "MXM3_181", + "MXM3_183", + "MXM3_185", + "MXM3_187"; +}; + +&lsio_gpio3 { + gpio-line-names =3D "MXM3_191", + "", + "MXM3_221", + "MXM3_225", + "MXM3_223", + "MXM3_227", + "MXM3_200", + "MXM3_235", + "MXM3_231", + "MXM3_229", + "MXM3_233", + "MXM3_204", + "MXM3_196", + "", + "MXM3_202", + "", + "", + "", + "MXM3_305", + "MXM3_307", + "MXM3_309", + "MXM3_311", + "MXM3_315", + "MXM3_317", + "MXM3_319", + "MXM3_321", + "MXM3_15/GPIO7", + "MXM3_63", + "MXM3_17/GPIO8", + "MXM3_12", + "MXM3_14", + "MXM3_16"; +}; + +&lsio_gpio4 { + gpio-line-names =3D "MXM3_18", + "MXM3_11/GPIO5", + "MXM3_13/GPIO6", + "MXM3_274", + "MXM3_84", + "MXM3_262", + "MXM3_96", + "", + "", + "", + "", + "", + "MXM3_190", + "", + "", + "", + "MXM3_269", + "MXM3_251", + "MXM3_253", + "MXM3_295", + "MXM3_299", + "MXM3_301", + "MXM3_297", + "MXM3_293", + "MXM3_291", + "MXM3_289", + "MXM3_287"; + + /* Enable pcie root / sata ref clock unconditionally */ + pcie_sata_hog { + gpios =3D <27 GPIO_ACTIVE_HIGH>; + }; + +}; + +&lsio_gpio5 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_150", + "MXM3_160", + "MXM3_162", + "MXM3_144", + "MXM3_146", + "MXM3_148", + "MXM3_152", + "MXM3_156", + "MXM3_158", + "MXM3_159", + "MXM3_184", + "MXM3_180", + "MXM3_186", + "MXM3_188", + "MXM3_176", + "MXM3_178"; +}; + +&lsio_gpio6 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_261", + "MXM3_263", + "MXM3_259", + "MXM3_257", + "MXM3_255", + "MXM3_128", + "MXM3_130", + "MXM3_265", + "MXM3_249", + "MXM3_247", + "MXM3_245", + "MXM3_243"; +}; + +&pinctrl_fec1 { + fsl,pins =3D + /* Use pads in 1.8V mode */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + /* On-module ETH_RESET# */ + , + /* On-module ETH_INT# */ + ; +}; + +&pinctrl_fec1_sleep { + fsl,pins =3D + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; +}; + +&iomuxc { + /* Apalis I2C2 (DDC) */ + pinctrl_lpi2c0: lpi2c0grp { + fsl,pins =3D + , + ; + }; +}; + +/* On-module PCIe_CTRL0_CLKREQ */ +&pinctrl_pcie_sata_refclk { + fsl,pins =3D + ; +}; + +/* TODO: On-module Wi-Fi */ + +/* Apalis MMC1 */ +&usdhc2 { + /* + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates + * issues with certain SD cards, disable 1.8V signaling for now. + */ + no-1-8-v; +}; + +/* Apalis SD1 */ +&usdhc3 { + /* + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates + * issues with certain SD cards, disable 1.8V signaling for now. + */ + no-1-8-v; +}; --=20 2.35.1