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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id y22-20020a1c4b16000000b003d01b84e9b2sm27638432wma.27.2022.12.30.03.32.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Dec 2022 03:32:22 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= , Martijn Braam , Sam Ravnborg , Robert Mader , Tom Fitzhenry , Peter Robinson , Onuralp Sezer , dri-devel@lists.freedesktop.org, Ondrej Jirman , Maya Matuszczyk , Neal Gompa , linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Jagan Teki , Javier Martinez Canillas , Caleb Connolly , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v4 4/4] arm64: dts: rk3399-pinephone-pro: Add internal display support Date: Fri, 30 Dec 2022 12:31:54 +0100 Message-Id: <20221230113155.3430142-5-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221230113155.3430142-1-javierm@redhat.com> References: <20221230113155.3430142-1-javierm@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ondrej Jirman The phone's display is using Hannstar LCD panel, and Goodix based touchscreen. Support it. Signed-off-by: Ondrej Jirman Co-developed-by: Martijn Braam Signed-off-by: Martijn Braam Co-developed-by: Kamil Trzci=C5=84ski Signed-off-by: Kamil Trzci=C5=84ski Signed-off-by: Javier Martinez Canillas Tested-by: Tom Fitzhenry --- Changes in v4: - Add Tom Fitzhenry's Tested-by tag. - Keep the DTS nodes sorted alphabetically (Tom Fitzhenry). Changes in v2: - Fix regulator node names (Maya Matuszczyk). - Drop non-existent "poweroff-in-suspend" property (Maya Matuszczyk). - Remove unnecessary comments in panel node (Maya Matuszczyk). .../dts/rockchip/rk3399-pinephone-pro.dts | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/a= rm64/boot/dts/rockchip/rk3399-pinephone-pro.dts index 04403a76238b..0d48fbc5dbe4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts @@ -25,6 +25,12 @@ aliases { mmc2 =3D &sdhci; }; =20 + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm0 0 1000000 0>; + pwm-delay-us =3D <10000>; + }; + chosen { stdout-path =3D "serial2:115200n8"; }; @@ -82,6 +88,32 @@ vcc1v8_codec: vcc1v8-codec-regulator { vin-supply =3D <&vcc3v3_sys>; }; =20 + /* MIPI DSI panel 1.8v supply */ + vcc1v8_lcd: vcc1v8-lcd-regulator { + compatible =3D "regulator-fixed"; + enable-active-high; + regulator-name =3D "vcc1v8_lcd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + gpio =3D <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&display_pwren1>; + }; + + /* MIPI DSI panel 2.8v supply */ + vcc2v8_lcd: vcc2v8-lcd-regulator { + compatible =3D "regulator-fixed"; + enable-active-high; + regulator-name =3D "vcc2v8_lcd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <&vcc3v3_sys>; + gpio =3D <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&display_pwren>; + }; + wifi_pwrseq: sdio-wifi-pwrseq { compatible =3D "mmc-pwrseq-simple"; clocks =3D <&rk818 1>; @@ -132,6 +164,11 @@ &emmc_phy { status =3D "okay"; }; =20 +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + &i2c0 { clock-frequency =3D <400000>; i2c-scl-rising-time-ns =3D <168>; @@ -214,6 +251,9 @@ vcc3v0_touch: LDO_REG2 { regulator-name =3D "vcc3v0_touch"; regulator-min-microvolt =3D <3000000>; regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; =20 vcca1v8_codec: LDO_REG3 { @@ -347,6 +387,25 @@ opp07 { }; }; =20 +&i2c3 { + i2c-scl-rising-time-ns =3D <450>; + i2c-scl-falling-time-ns =3D <15>; + status =3D "okay"; + + touchscreen@14 { + compatible =3D "goodix,gt917s"; + reg =3D <0x14>; + interrupt-parent =3D <&gpio3>; + interrupts =3D ; + irq-gpios =3D <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; + AVDD28-supply =3D <&vcc3v0_touch>; + VDDIO-supply =3D <&vcc3v0_touch>; + touchscreen-size-x =3D <720>; + touchscreen-size-y =3D <1440>; + }; +}; + &io_domains { bt656-supply =3D <&vcc1v8_dvp>; audio-supply =3D <&vcca1v8_codec>; @@ -355,6 +414,40 @@ &io_domains { status =3D "okay"; }; =20 +&mipi_dsi { + status =3D "okay"; + clock-master; + + ports { + mipi_out: port@1 { + #address-cells =3D <0>; + #size-cells =3D <0>; + reg =3D <1>; + + mipi_out_panel: endpoint { + remote-endpoint =3D <&mipi_in_panel>; + }; + }; + }; + + panel@0 { + compatible =3D "hannstar,hsd060bhw4", "himax,hx8394"; + reg =3D <0>; + backlight =3D <&backlight>; + reset-gpios =3D <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; + vcc-supply =3D <&vcc2v8_lcd>; + iovcc-supply =3D <&vcc1v8_lcd>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&display_rst_l>; + + port { + mipi_in_panel: endpoint { + remote-endpoint =3D <&mipi_out_panel>; + }; + }; + }; +}; + &pmu_io_domains { pmu1830-supply =3D <&vcc_1v8>; status =3D "okay"; @@ -367,6 +460,20 @@ pwrbtn_pin: pwrbtn-pin { }; }; =20 + dsi { + display_rst_l: display-rst-l { + rockchip,pins =3D <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + display_pwren: display-pwren { + rockchip,pins =3D <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + display_pwren1: display-pwren1 { + rockchip,pins =3D <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins =3D <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; @@ -408,6 +515,10 @@ bt_reset_pin: bt-reset-pin { }; }; =20 +&pwm0 { + status =3D "okay"; +}; + &sdio0 { bus-width =3D <4>; cap-sd-highspeed; @@ -472,3 +583,15 @@ bluetooth { &uart2 { status =3D "okay"; }; + +&vopb { + status =3D "okay"; + assigned-clocks =3D <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, + <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; + assigned-clock-rates =3D <0>, <0>, <400000000>, <100000000>; + assigned-clock-parents =3D <&cru PLL_CPLL>, <&cru DCLK_VOP0_FRAC>; +}; + +&vopb_mmu { + status =3D "okay"; +}; --=20 2.38.1