From nobody Tue Feb 10 01:15:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69067C3DA7C for ; Fri, 30 Dec 2022 09:55:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234946AbiL3JzL (ORCPT ); Fri, 30 Dec 2022 04:55:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229505AbiL3JzF (ORCPT ); Fri, 30 Dec 2022 04:55:05 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 872231A807 for ; Fri, 30 Dec 2022 01:55:04 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id o2so16277621pjh.4 for ; Fri, 30 Dec 2022 01:55:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nQ3SWUnwOxxOnluQcCUMkWWYY8S0x44bkExbOVLaC48=; b=PIewojQzM9gdaK16yPowjVkvS9gJxGqd0smybnMugXbwyRtcY9H2OninVnk985ilXH TMWVfHPA6BRCAnxu5fpX77ZfejmB4fbFbMB4bZCf4KFAroubnEKJHZk11sW0q7kA5nIs 4AiXg5tEX7bf5/QTRMAMlAsnF/sR5DdLlV11Hz22LrvJp6XBYdpK0ojD6wIdst2/HdoE h5k+/ypI8nAiyoWOTPOamgGfAJG+2fJQjM6Y3EmvQOda/slt8HZszf64VtPkmYWabqpz QvMutBmXygyO0yarbfhdi5U9YqE/M2I+OzeWzKt1l/uzbgi6eArPebW5MjKoXgrdrxha Vtxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nQ3SWUnwOxxOnluQcCUMkWWYY8S0x44bkExbOVLaC48=; b=5OKnIVUeDf3eiZ2bzV8De1hQGHXJO8ESg/Ujh/LMwx3bAfks+xTtIo//DN59j5neiX +gr38xdySGqVj8Lf9ASFhWeRw0wEOdHICdyg4W7JgfR37INOGIt5SHBGszomq5klqrPD UI/5T/AfnsbxKW4025KpjNSP71WqnlEC2FXhMk4UB35s35lUyaCMs7OZfCaw5jz//APO tes7yaEK72Kjw3XSfQaPKMlzTx4clTEyrRqfFwUl+CZzRAqstqPmHrvxCNCv0dSh7TVU 6ckWDTYdTmf1JxRoLz50AdXv33olPUJaXw+4IdEoHzagqZvyUZzvrIQJxyj5YVNMfm/d 3Nog== X-Gm-Message-State: AFqh2kpHJFK+P/P8DrWHAAiAz1BUpLyx5bu6PRAILMvrqcMcEy4dsN0z fudUftwcqQq1fdoW8eFGsby7AQ== X-Google-Smtp-Source: AMrXdXuxZ5ubvMzAbz1wWO3szh7+ngbcZbwRzttK2BodjwDPRZsxol/hmIC/5rFy4F52A/m9VNKV9A== X-Received: by 2002:a17:902:f38c:b0:189:5f5c:da1f with SMTP id f12-20020a170902f38c00b001895f5cda1fmr25292169ple.5.1672394104051; Fri, 30 Dec 2022 01:55:04 -0800 (PST) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id b7-20020a170902650700b00189c536c72asm14487719plk.148.2022.12.30.01.55.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Dec 2022 01:55:03 -0800 (PST) From: Akihiko Odaki Cc: Mark Brown , Marc Zyngier , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Mathieu Poirier , Oliver Upton , Suzuki K Poulose , Alexandru Elisei , James Morse , Will Deacon , Catalin Marinas , asahi@lists.linux.dev, Alyssa Rosenzweig , Sven Peter , Hector Martin , Akihiko Odaki Subject: [PATCH v5 1/7] arm64: Allow the definition of UNKNOWN system register fields Date: Fri, 30 Dec 2022 18:54:46 +0900 Message-Id: <20221230095452.181764-2-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221230095452.181764-1-akihiko.odaki@daynix.com> References: <20221230095452.181764-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marc Zyngier The CCSIDR_EL1 register contains an UNKNOWN field (which replaces fields that were actually defined in previous revisions of the architecture). Define an 'Unkn' field type modeled after the Res0/Res1 types to allow such description. This allows the generation of #define CCSIDR_EL1_UNKN (UL(0) | GENMASK_ULL(31, 28)) which may have its use one day. Hopefully the architecture doesn't add too many of those in the future. Signed-off-by: Marc Zyngier Signed-off-by: Akihiko Odaki Reviewed-by: Mark Brown --- arch/arm64/tools/gen-sysreg.awk | 20 +++++++++++++++++++- arch/arm64/tools/sysreg | 2 ++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm64/tools/gen-sysreg.awk b/arch/arm64/tools/gen-sysreg.= awk index db461921d256..f6909a6b8380 100755 --- a/arch/arm64/tools/gen-sysreg.awk +++ b/arch/arm64/tools/gen-sysreg.awk @@ -98,6 +98,7 @@ END { =20 res0 =3D "UL(0)" res1 =3D "UL(0)" + unkn =3D "UL(0)" =20 next_bit =3D 63 =20 @@ -112,11 +113,13 @@ END { =20 define(reg "_RES0", "(" res0 ")") define(reg "_RES1", "(" res1 ")") + define(reg "_UNKN", "(" unkn ")") print "" =20 reg =3D null res0 =3D null res1 =3D null + unkn =3D null =20 next } @@ -134,6 +137,7 @@ END { =20 res0 =3D "UL(0)" res1 =3D "UL(0)" + unkn =3D "UL(0)" =20 define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2) define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")") @@ -161,7 +165,9 @@ END { define(reg "_RES0", "(" res0 ")") if (res1 !=3D null) define(reg "_RES1", "(" res1 ")") - if (res0 !=3D null || res1 !=3D null) + if (unkn !=3D null) + define(reg "_UNKN", "(" unkn ")") + if (res0 !=3D null || res1 !=3D null || unkn !=3D null) print "" =20 reg =3D null @@ -172,6 +178,7 @@ END { op2 =3D null res0 =3D null res1 =3D null + unkn =3D null =20 next } @@ -190,6 +197,7 @@ END { next_bit =3D 0 res0 =3D null res1 =3D null + unkn =3D null =20 next } @@ -215,6 +223,16 @@ END { next } =20 +/^Unkn/ && (block =3D=3D "Sysreg" || block =3D=3D "SysregFields") { + expect_fields(2) + parse_bitdef(reg, "UNKN", $2) + field =3D "UNKN_" msb "_" lsb + + unkn =3D unkn " | GENMASK_ULL(" msb ", " lsb ")" + + next +} + /^Field/ && (block =3D=3D "Sysreg" || block =3D=3D "SysregFields") { expect_fields(3) field =3D $3 diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 384757a7eda9..8f26fe1bedc6 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -15,6 +15,8 @@ =20 # Res1 [:] =20 +# Unkn [:] + # Field [:] =20 # Enum [:] --=20 2.38.1