From nobody Wed Sep 17 08:52:47 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FBEEC4332F for ; Wed, 21 Dec 2022 05:52:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234367AbiLUFwM (ORCPT ); Wed, 21 Dec 2022 00:52:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229652AbiLUFwI (ORCPT ); Wed, 21 Dec 2022 00:52:08 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2C661DA6F; Tue, 20 Dec 2022 21:52:06 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2BL5pvaX088946; Tue, 20 Dec 2022 23:51:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1671601918; bh=3S4ZeUleyG+PnGNO2verHlttc0+y095lVFPc0EWwtkw=; h=From:To:CC:Subject:Date; b=bm9rMRRtJ/3eFqO0KuWIurW22/fIrzbeO/ymAzxLdvHUG+Zy34u/nh6S75g/yCVDq qgagMHxS0OEJf7A6L4Tp7QO9h3wM/FiH/8UrUISR6Y2YhNWAUH2BXB4bsn0nXwt6h8 U9ou12Wj085q+4MX2OcGnymuAJWrB3NSBCqRJhns= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2BL5pvOC027818 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Dec 2022 23:51:57 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Tue, 20 Dec 2022 23:51:57 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 20 Dec 2022 23:51:57 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2BL5poGD003821; Tue, 20 Dec 2022 23:51:55 -0600 From: Bhavya Kapoor To: , CC: , , , , Subject: [PATCH v2] arm64: dts: ti: k3-j721s2: Add support for ADC nodes Date: Wed, 21 Dec 2022 11:21:44 +0530 Message-ID: <20221221055144.7181-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" J721s2 has two instances of 8 channel ADCs in MCU domain. Add DT nodes for 8 channel ADCs for J721s2 SoC. Signed-off-by: Bhavya Kapoor --- Changelog v1 -> v2: - Updated Interrupt Values for tscadc .../dts/ti/k3-j721s2-common-proc-board.dts | 14 +++++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 42 ++++++++++++++++++- 2 files changed, 55 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/= arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index a7aa6cf08acd..67593aa69327 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -309,3 +309,17 @@ &mcu_mcan1 { pinctrl-0 =3D <&mcu_mcan1_pins_default>; phys =3D <&transceiver2>; }; + +&tscadc0 { + status =3D "okay"; + adc { + ti,adc-channels =3D <0 1 2 3 4 5 6 7>; + }; +}; + +&tscadc1 { + status =3D "okay"; + adc { + ti,adc-channels =3D <0 1 2 3 4 5 6 7>; + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 0af242aa9816..8673eb1309c3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -306,4 +306,44 @@ cpts@3d000 { ti,cpts-periodic-outputs =3D <2>; }; }; -}; + + tscadc0: tscadc@40200000 { + compatible =3D "ti,am3359-tscadc"; + reg =3D <0x0 0x40200000 0x0 0x1000>; + interrupts =3D ; + power-domains =3D <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 0 0>; + assigned-clocks =3D <&k3_clks 0 2>; + assigned-clock-rates =3D <60000000>; + clock-names =3D "adc_tsc_fck"; + dmas =3D <&main_udmap 0x7400>, + <&main_udmap 0x7401>; + dma-names =3D "fifo0", "fifo1"; + status =3D "disabled"; + + adc { + #io-channel-cells =3D <1>; + compatible =3D "ti,am3359-adc"; + }; + }; + + tscadc1: tscadc@40210000 { + compatible =3D "ti,am3359-tscadc"; + reg =3D <0x0 0x40210000 0x0 0x1000>; + interrupts =3D ; + power-domains =3D <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 1 0>; + assigned-clocks =3D <&k3_clks 1 2>; + assigned-clock-rates =3D <60000000>; + clock-names =3D "adc_tsc_fck"; + dmas =3D <&main_udmap 0x7402>, + <&main_udmap 0x7403>; + dma-names =3D "fifo0", "fifo1"; + status =3D "disabled"; + + adc { + #io-channel-cells =3D <1>; + compatible =3D "ti,am3359-adc"; + }; + }; + }; \ No newline at end of file --=20 2.37.2