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[73.214.169.22]) by smtp.gmail.com with ESMTPSA id gd15-20020a05622a5c0f00b003a82ca4e81csm744348qtb.80.2022.12.20.11.29.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Dec 2022 11:29:04 -0800 (PST) From: Brian Masney To: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: quic_shazhuss@quicinc.com, konrad.dybcio@linaro.org, robh+dt@kernel.org, johan+linaro@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ahalaney@redhat.com, echanude@redhat.com Subject: [PATCH v3 2/7] arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21 Date: Tue, 20 Dec 2022 14:28:49 -0500 Message-Id: <20221220192854.521647-3-bmasney@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220192854.521647-1-bmasney@redhat.com> References: <20221220192854.521647-1-bmasney@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation for adding the missing SPI and I2C nodes to sc8280xp.dtsi, it was decided to rename all of the existing qupX_ uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th index under qup2, which starts at index 16. Note that some nodes are moved in the file by this patch to preserve the expected sort order in the file. Additionally, the properties within the pinctrl state node are sorted to match the expected order that's typically done in other DTs. Signed-off-by: Brian Masney Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.= com/ Reviewed-by: Konrad Dybcio Reviewed-by: Johan Hovold --- Changes from v2 to v3: - Reordered properties on renamed state node to match order typically done elsewhere (Konrod) - Add Konrad's R-b Patch introduced in v2 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 89 +++++++------ .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 120 +++++++++--------- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 3 files changed, 105 insertions(+), 106 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dt= s/qcom/sc8280xp-crd.dts index db273face248..03e3814f2722 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -228,6 +228,43 @@ vreg_l9d: ldo9 { }; }; =20 +&i2c21 { + clock-frequency =3D <400000>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c21_default>; + + status =3D "okay"; + + touchpad@15 { + compatible =3D "hid-over-i2c"; + reg =3D <0x15>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 182 IRQ_TYPE_LEVEL_LOW>; + vdd-supply =3D <&vreg_misc_3p3>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&tpad_default>; + + wakeup-source; + }; + + keyboard@68 { + compatible =3D "hid-over-i2c"; + reg =3D <0x68>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; + vdd-supply =3D <&vreg_misc_3p3>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&kybd_default>; + + wakeup-source; + }; +}; + &pcie2a { perst-gpios =3D <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios =3D <&tlmm 145 GPIO_ACTIVE_LOW>; @@ -326,43 +363,6 @@ &qup2 { status =3D "okay"; }; =20 -&qup2_i2c5 { - clock-frequency =3D <400000>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&qup2_i2c5_default>; - - status =3D "okay"; - - touchpad@15 { - compatible =3D "hid-over-i2c"; - reg =3D <0x15>; - - hid-descr-addr =3D <0x1>; - interrupts-extended =3D <&tlmm 182 IRQ_TYPE_LEVEL_LOW>; - vdd-supply =3D <&vreg_misc_3p3>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&tpad_default>; - - wakeup-source; - }; - - keyboard@68 { - compatible =3D "hid-over-i2c"; - reg =3D <0x68>; - - hid-descr-addr =3D <0x1>; - interrupts-extended =3D <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; - vdd-supply =3D <&vreg_misc_3p3>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&kybd_default>; - - wakeup-source; - }; -}; - &remoteproc_adsp { firmware-name =3D "qcom/sc8280xp/qcadsp8280.mbn"; =20 @@ -494,6 +494,13 @@ hastings_reg_en: hastings-reg-en-state { &tlmm { gpio-reserved-ranges =3D <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; =20 + i2c21_default: i2c21-default-state { + pins =3D "gpio81", "gpio82"; + function =3D "qup21"; + drive-strength =3D <16>; + bias-disable; + }; + kybd_default: kybd-default-state { disable-pins { pins =3D "gpio102"; @@ -598,14 +605,6 @@ qup0_i2c4_default: qup0-i2c4-default-state { drive-strength =3D <16>; }; =20 - qup2_i2c5_default: qup2-i2c5-default-state { - pins =3D "gpio81", "gpio82"; - function =3D "qup21"; - - bias-disable; - drive-strength =3D <16>; - }; - tpad_default: tpad-default-state { int-n-pins { pins =3D "gpio182"; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/a= rch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 568c6be1ceaa..ad66a87141be 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -282,6 +282,59 @@ vreg_l9d: ldo9 { }; }; =20 +&i2c21 { + clock-frequency =3D <400000>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c21_default>; + + status =3D "okay"; + + touchpad@15 { + compatible =3D "hid-over-i2c"; + reg =3D <0x15>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 182 IRQ_TYPE_LEVEL_LOW>; + vdd-supply =3D <&vreg_misc_3p3>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&tpad_default>; + + wakeup-source; + + status =3D "disabled"; + }; + + touchpad@2c { + compatible =3D "hid-over-i2c"; + reg =3D <0x2c>; + + hid-descr-addr =3D <0x20>; + interrupts-extended =3D <&tlmm 182 IRQ_TYPE_LEVEL_LOW>; + vdd-supply =3D <&vreg_misc_3p3>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&tpad_default>; + + wakeup-source; + }; + + keyboard@68 { + compatible =3D "hid-over-i2c"; + reg =3D <0x68>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; + vdd-supply =3D <&vreg_misc_3p3>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&kybd_default>; + + wakeup-source; + }; +}; + &pcie2a { perst-gpios =3D <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios =3D <&tlmm 145 GPIO_ACTIVE_LOW>; @@ -531,59 +584,6 @@ &qup2 { status =3D "okay"; }; =20 -&qup2_i2c5 { - clock-frequency =3D <400000>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&qup2_i2c5_default>; - - status =3D "okay"; - - touchpad@15 { - compatible =3D "hid-over-i2c"; - reg =3D <0x15>; - - hid-descr-addr =3D <0x1>; - interrupts-extended =3D <&tlmm 182 IRQ_TYPE_LEVEL_LOW>; - vdd-supply =3D <&vreg_misc_3p3>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&tpad_default>; - - wakeup-source; - - status =3D "disabled"; - }; - - touchpad@2c { - compatible =3D "hid-over-i2c"; - reg =3D <0x2c>; - - hid-descr-addr =3D <0x20>; - interrupts-extended =3D <&tlmm 182 IRQ_TYPE_LEVEL_LOW>; - vdd-supply =3D <&vreg_misc_3p3>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&tpad_default>; - - wakeup-source; - }; - - keyboard@68 { - compatible =3D "hid-over-i2c"; - reg =3D <0x68>; - - hid-descr-addr =3D <0x1>; - interrupts-extended =3D <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; - vdd-supply =3D <&vreg_misc_3p3>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&kybd_default>; - - wakeup-source; - }; -}; - &remoteproc_adsp { firmware-name =3D "qcom/sc8280xp/LENOVO/21BX/qcadsp8280.mbn"; =20 @@ -698,6 +698,13 @@ hall_int_n_default: hall-int-n-state { bias-disable; }; =20 + i2c21_default: i2c21-default-state { + pins =3D "gpio81", "gpio82"; + function =3D "qup21"; + drive-strength =3D <16>; + bias-disable; + }; + kybd_default: kybd-default-state { disable-pins { pins =3D "gpio102"; @@ -801,13 +808,6 @@ qup0_i2c4_default: qup0-i2c4-default-state { drive-strength =3D <16>; }; =20 - qup2_i2c5_default: qup2-i2c5-default-state { - pins =3D "gpio81", "gpio82"; - function =3D "qup21"; - bias-disable; - drive-strength =3D <16>; - }; - tpad_default: tpad-default-state { int-n-pins { pins =3D "gpio182"; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 951cb1b6fcc4..929365cff555 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -827,7 +827,7 @@ uart17: serial@884000 { status =3D "disabled"; }; =20 - qup2_i2c5: i2c@894000 { + i2c21: i2c@894000 { compatible =3D "qcom,geni-i2c"; reg =3D <0 0x00894000 0 0x4000>; clock-names =3D "se"; --=20 2.38.1