From nobody Wed Sep 17 19:24:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35D4AC4332F for ; Fri, 16 Dec 2022 14:36:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230271AbiLPOgm (ORCPT ); Fri, 16 Dec 2022 09:36:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230204AbiLPOg3 (ORCPT ); Fri, 16 Dec 2022 09:36:29 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 221FF26571; Fri, 16 Dec 2022 06:36:29 -0800 (PST) Received: from beast.luon.net (simons.connected.by.freedominter.net [45.83.240.172]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sjoerd) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8B6896602C95; Fri, 16 Dec 2022 14:36:27 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1671201387; bh=r7ISVIMrUOeq1YUcc/heo4+dqRfH9+l09wOKOWMWi60=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qx6UC8ITR8ptql3nhJFJP4FsXa3Mm/v0EmU6ZSvDAVHQ2YBhDu1fTuan1NCqZNA/f SEMgQaX7+hh+EgTuUqtFPeKUz9+okmxYD0PooSjtc1QYwSWTdZv0GTzerqeCFWjytR RgctgCpGbgiCNkm6GcaWg/OVOQBGJ1h+7jqJsBH1g0j2hu4MFgs1A7wRvhn8nUMQeT UdhlOkc2PetG2tzgoGZOMFk01tt03oijDBHmjt9BZhGR9X3VOZrP9rt/AOUovS8qXK l5xs0VJakyrJwp2MYN31ZYoBnfofsigl37db7WW4iKNJv8u3geVlr1gzSrz270tbI1 k7qyBYPGl1EYA== Received: by beast.luon.net (Postfix, from userid 1000) id 3C3695E33156; Fri, 16 Dec 2022 15:36:25 +0100 (CET) From: Sjoerd Simons To: Nishanth Menon Cc: martyn.welch@collabora.com, Nitin Yadav , Aswath Govindraju , Krzysztof Kozlowski , Rob Herring , Tero Kristo , Vignesh Raghavendra , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] arm64: dts: ti: k3-am62-main: Update OTAP and ITAP delay select Date: Fri, 16 Dec 2022 15:36:21 +0100 Message-Id: <20221216143624.23708-2-sjoerd@collabora.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221216143624.23708-1-sjoerd@collabora.com> References: <20221216143624.23708-1-sjoerd@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Nitin Yadav UHS Class U1 sd-card are not getting detected due to incorrect OTAP/ITAP delay select values in linux. Update OTAP and ITAP delay select values for various speed modes. For sdhci0, update OTAP delay values for ddr52 & HS200 and add ITAP delay for legacy & mmc-hs. For sdhci1 & sdhci2, update OTAP & ITAP delay select recommended as in RIOT for various speed modes. Signed-off-by: Nitin Yadav [cherry-pick from vendor BSP] Signed-off-by: Sjoerd Simons --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 46 ++++++++++++------------ 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am62-main.dtsi index 03660476364f..28c250a8d1ec 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -391,8 +391,10 @@ sdhci0: mmc@fa10000 { ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-mmc-hs =3D <0x0>; - ti,otap-del-sel-ddr52 =3D <0x9>; - ti,otap-del-sel-hs200 =3D <0x6>; + ti,otap-del-sel-ddr52 =3D <0x5>; + ti,otap-del-sel-hs200 =3D <0x5>; + ti,itap-del-sel-legacy =3D <0xa>; + ti,itap-del-sel-mmc-hs =3D <0x1>; }; =20 sdhci1: mmc@fa00000 { @@ -403,17 +405,17 @@ sdhci1: mmc@fa00000 { clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; ti,trm-icp =3D <0x2>; - ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; - ti,otap-del-sel-sdr12 =3D <0xf>; - ti,otap-del-sel-sdr25 =3D <0xf>; - ti,otap-del-sel-sdr50 =3D <0xc>; - ti,otap-del-sel-sdr104 =3D <0x6>; - ti,otap-del-sel-ddr50 =3D <0x9>; - ti,itap-del-sel-legacy =3D <0x0>; - ti,itap-del-sel-sd-hs =3D <0x0>; - ti,itap-del-sel-sdr12 =3D <0x0>; - ti,itap-del-sel-sdr25 =3D <0x0>; + ti,otap-del-sel-sdr12 =3D <0x0>; + ti,otap-del-sel-sdr25 =3D <0x0>; + ti,otap-del-sel-sdr50 =3D <0x8>; + ti,otap-del-sel-sdr104 =3D <0x7>; + ti,otap-del-sel-ddr50 =3D <0x4>; + ti,itap-del-sel-legacy =3D <0xa>; + ti,itap-del-sel-sd-hs =3D <0x1>; + ti,itap-del-sel-sdr12 =3D <0xa>; + ti,itap-del-sel-sdr25 =3D <0x1>; ti,clkbuf-sel =3D <0x7>; bus-width =3D <4>; }; @@ -426,17 +428,17 @@ sdhci2: mmc@fa20000 { clocks =3D <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names =3D "clk_ahb", "clk_xin"; ti,trm-icp =3D <0x2>; - ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; - ti,otap-del-sel-sdr12 =3D <0xf>; - ti,otap-del-sel-sdr25 =3D <0xf>; - ti,otap-del-sel-sdr50 =3D <0xc>; - ti,otap-del-sel-sdr104 =3D <0x6>; - ti,otap-del-sel-ddr50 =3D <0x9>; - ti,itap-del-sel-legacy =3D <0x0>; - ti,itap-del-sel-sd-hs =3D <0x0>; - ti,itap-del-sel-sdr12 =3D <0x0>; - ti,itap-del-sel-sdr25 =3D <0x0>; + ti,otap-del-sel-sdr12 =3D <0x0>; + ti,otap-del-sel-sdr25 =3D <0x0>; + ti,otap-del-sel-sdr50 =3D <0x8>; + ti,otap-del-sel-sdr104 =3D <0x7>; + ti,otap-del-sel-ddr50 =3D <0x8>; + ti,itap-del-sel-legacy =3D <0xa>; + ti,itap-del-sel-sd-hs =3D <0xa>; + ti,itap-del-sel-sdr12 =3D <0xa>; + ti,itap-del-sel-sdr25 =3D <0x1>; ti,clkbuf-sel =3D <0x7>; }; =20 --=20 2.39.0