From nobody Wed Nov 13 08:10:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DFFAC4332F for ; Thu, 15 Dec 2022 12:00:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230053AbiLOMAw (ORCPT ); Thu, 15 Dec 2022 07:00:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229854AbiLOMAf (ORCPT ); Thu, 15 Dec 2022 07:00:35 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D96A2A43E; Thu, 15 Dec 2022 04:00:29 -0800 (PST) X-UUID: cbba2d44e9e3436f8e709ea19c5d8a6a-20221215 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=8i5DSmAxTmfCANOGSKNu3P+/BEjO2MHm4RiH6/g3zxc=; b=jg/YxsC9p4XjgGIBdaSg4QKXoLNrnbW/vjzpH80CJ5pBbvv+2QOsCDRlXIPL68XUoLViflKgqGVSkeMolL+RQRpX7R1jOrb2+Jl5iSPXEV0ZzRLWVBvwJ5oXmpYdMWque5TSqST/FpJGRKTPJYh/tUjJDvBx+P0i3ChpIH7yO8M=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:f1aa6a34-1f2c-4ea7-b317-f75d1ce6f6ca,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.14,REQID:f1aa6a34-1f2c-4ea7-b317-f75d1ce6f6ca,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:dcaaed0,CLOUDID:6d725635-a6a3-44f7-8aad-08fee1939a08,B ulkID:221215200024ZJAXDO3V,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: cbba2d44e9e3436f8e709ea19c5d8a6a-20221215 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1988709582; Thu, 15 Dec 2022 20:00:21 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 15 Dec 2022 20:00:20 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 15 Dec 2022 20:00:20 +0800 From: Allen-KH Cheng To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Chun-Jie Chen , Stephen Boyd , Ikjoon Jang CC: , , , , , , Chen-Yu Tsai , Allen-KH Cheng Subject: [PATCH 3/4] dt-bindings: arm: mediatek: Add missing power-domains property Date: Thu, 15 Dec 2022 20:00:15 +0800 Message-ID: <20221215120016.26611-4-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221215120016.26611-1-allen-kh.cheng@mediatek.com> References: <20221215120016.26611-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The "mediatek,mt8192-scp_adsp" binding requires a power domain to be specified. Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document bindings= of MT8192 clock") Signed-off-by: Allen-KH Cheng --- .../arm/mediatek/mediatek,mt8192-clock.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192= -clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt819= 2-clock.yaml index b57cc2e69efb..cbedef114103 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.= yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.= yaml @@ -40,6 +40,9 @@ properties: reg: maxItems: 1 =20 + power-domains: + maxItems: 1 + '#clock-cells': const: 1 =20 @@ -49,11 +52,25 @@ required: =20 additionalProperties: false =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8192-scp_adsp + then: + required: + - power-domains + examples: - | + #include + scp_adsp: clock-controller@10720000 { compatible =3D "mediatek,mt8192-scp_adsp"; reg =3D <0x10720000 0x1000>; + power-domains =3D <&spm MT8192_POWER_DOMAIN_ADSP>; #clock-cells =3D <1>; }; =20 --=20 2.18.0