From nobody Thu Sep 18 00:11:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA01FC4332F for ; Wed, 14 Dec 2022 23:21:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229674AbiLNXVy (ORCPT ); Wed, 14 Dec 2022 18:21:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229844AbiLNXVX (ORCPT ); Wed, 14 Dec 2022 18:21:23 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DD3927143; Wed, 14 Dec 2022 15:21:19 -0800 (PST) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id C252020397; Thu, 15 Dec 2022 00:21:17 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org, Bjorn Andersson Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno , Luca Weiss , Adam Skladowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/6] arm64: dts: qcom: msm8976: Declare and use SDC2 pins Date: Thu, 15 Dec 2022 00:20:48 +0100 Message-Id: <20221214232049.703484-6-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221214232049.703484-1-marijn.suijten@somainline.org> References: <20221214232049.703484-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the pinctrl states for SDC2 and use them on sdhc_2 to support SD Cards on the currently mainlined Sony Loire platform. Signed-off-by: Marijn Suijten --- .../qcom/msm8956-sony-xperia-loire-kugo.dts | 6 +++ .../dts/qcom/msm8956-sony-xperia-loire.dtsi | 6 +++ arch/arm64/boot/dts/qcom/msm8976.dtsi | 45 +++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts b/= arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts index 3fb8e23e4330..9178943e2ee1 100644 --- a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts +++ b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts @@ -33,3 +33,9 @@ &pm8950_l1 { regulator-min-microvolt =3D <1100000>; regulator-max-microvolt =3D <1300000>; }; + +&sdc2_on_state { + data-pins { + drive-strength =3D <8>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi b/arch= /arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi index 700583a56a0e..2253fb05f1c9 100644 --- a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi @@ -264,6 +264,12 @@ &sdhc_1 { status =3D "okay"; }; =20 +&sdc2_on_state { + clk-pins { + drive-strength =3D <10>; + }; +}; + &sdhc_2 { bus-width =3D <4>; cd-gpios =3D <&tlmm 100 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qc= om/msm8976.dtsi index 7d4c7548882c..f3371eaa2940 100644 --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi @@ -558,6 +558,46 @@ rclk-pins { }; }; =20 + sdc2_off_state: sdc2-off-state { + clk-pins { + pins =3D "sdc2_clk"; + drive-strength =3D <2>; + bias-disable; + }; + + cmd-pins { + pins =3D "sdc2_cmd"; + drive-strength =3D <2>; + bias-pull-up; + }; + + data-pins { + pins =3D "sdc2_data"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + sdc2_on_state: sdc2-on-state { + clk-pins { + pins =3D "sdc2_clk"; + drive-strength =3D <16>; + bias-disable; + }; + + cmd-pins { + pins =3D "sdc2_cmd"; + drive-strength =3D <10>; + bias-pull-up; + }; + + data-pins { + pins =3D "sdc2_data"; + drive-strength =3D <10>; + bias-pull-up; + }; + }; + spi1_default: spi0-default-state { spi-pins { pins =3D "gpio0", "gpio1", "gpio3"; @@ -751,6 +791,11 @@ sdhc_2: mmc@7864000 { <&gcc GCC_SDCC2_APPS_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names =3D "iface", "core", "xo"; + + pinctrl-0 =3D <&sdc2_on_state>; + pinctrl-1 =3D <&sdc2_off_state>; + pinctrl-names =3D "default", "sleep"; + status =3D "disabled"; }; =20 --=20 2.39.0