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[2.7.42.160]) by smtp.gmail.com with ESMTPSA id d22-20020a05600c34d600b003cfa80443a0sm2741896wmq.35.2022.12.14.06.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 06:33:22 -0800 (PST) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Alexandre Ghiti Subject: [PATCH] riscv: Allow to downgrade paging mode from the command line Date: Wed, 14 Dec 2022 15:33:11 +0100 Message-Id: <20221214143311.960266-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add 2 early command line parameters called "no5lvl" and "no4lvl" (using the same naming as x86) to allow a user to downgrade from sv57 (the default mode if the hardware supports it) to sv48 or sv39. Note that going through the device tree to get the kernel command line works with ACPI too since the efi stub creates a device tree anyway with the command line. Also, as those params are treated very early in the boot process and we use standard device tree functions that may be kasan instrumented, we only enable them for !KASAN configurations. Signed-off-by: Alexandre Ghiti --- Tested on both DT/ACPI kernel successfully .../admin-guide/kernel-parameters.txt | 5 ++- arch/riscv/mm/init.c | 43 ++++++++++++++++++- 2 files changed, 45 insertions(+), 3 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index a465d5242774..6741524aa980 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3548,7 +3548,10 @@ emulation library even if a 387 maths coprocessor is present. =20 - no5lvl [X86-64] Disable 5-level paging mode. Forces + no4lvl [RISCV] Disable 4-level paging mode. Forces + kernel to use 3-level paging instead. + + no5lvl [X86-64,RISCV] Disable 5-level paging mode. Forces kernel to use 4-level paging instead. =20 nofsgsbase [X86] Disables FSGSBASE instructions. diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index b56a0a75533f..8140fefe0e57 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -752,12 +752,35 @@ static void __init disable_pgtable_l4(void) * then read SATP to see if the configuration was taken into account * meaning sv48 is supported. */ -static __init void set_satp_mode(void) +static __init void set_satp_mode(uintptr_t dtb_pa) { u64 identity_satp, hw_satp; uintptr_t set_satp_mode_pmd =3D ((unsigned long)set_satp_mode) & PMD_MASK; bool check_l4 =3D false; =20 +#ifndef CONFIG_KASAN + /* + * The below fdt functions are kasan instrumented, since at this point + * there is no mapping for the kasan shadow memory, this can't be used + * when kasan is enabled. + */ + int chosen_node; + + chosen_node =3D fdt_path_offset((void *)dtb_pa, "/chosen"); + if (chosen_node >=3D 0) { + const char *cmdline =3D fdt_getprop((void *)dtb_pa, chosen_node, + "bootargs", NULL); + if (strstr(cmdline, "no5lvl")) { + disable_pgtable_l5(); + check_l4 =3D true; + } else if (strstr(cmdline, "no4lvl")) { + disable_pgtable_l5(); + disable_pgtable_l4(); + return; + } + } +#endif + create_p4d_mapping(early_p4d, set_satp_mode_pmd, (uintptr_t)early_pud, P4D_SIZE, PAGE_TABLE); @@ -800,6 +823,22 @@ static __init void set_satp_mode(void) memset(early_pud, 0, PAGE_SIZE); memset(early_pmd, 0, PAGE_SIZE); } + +#ifndef CONFIG_KASAN +static int __init print_no4lvl(char *p) +{ + pr_info("Disabled 4-level and 5-level paging"); + return 0; +} +early_param("no4lvl", print_no4lvl); + +static int __init print_no5lvl(char *p) +{ + pr_info("Disabled 5-level paging"); + return 0; +} +early_param("no5lvl", print_no5lvl); +#endif #endif =20 /* @@ -979,7 +1018,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) #endif =20 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL) - set_satp_mode(); + set_satp_mode(dtb_pa); #endif =20 kernel_map.va_pa_offset =3D PAGE_OFFSET - kernel_map.phys_addr; --=20 2.37.2