From nobody Thu Sep 18 03:58:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2EECC4332F for ; Fri, 9 Dec 2022 22:47:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiLIWr2 (ORCPT ); Fri, 9 Dec 2022 17:47:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229626AbiLIWrT (ORCPT ); Fri, 9 Dec 2022 17:47:19 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51EC21C433; Fri, 9 Dec 2022 14:47:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670626037; x=1702162037; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=br/M5WmvwdwxFySfGnmU52+djJ0iOGc1/k2tY+9cOwU=; b=d2fDZWAQSDLvSzlpy2YM37lyqnwnrz9UDT3tAaQgBJkOf8h7mtsahMdv khd3cNX9hwNq4dpxyDjVu8U0aVWPtoRh7VE9AOxFGFkMYUCt9LMr169d/ RcT4DOLX8PtQx10Qy8ngPVqy0wvkw2AfIO07mFF7gV35TeE+Dy0XthHmA lTPAh7dLatzd/I/bSf+5zaOUkmYmQrBx9tzDLTv2K5hQ+SO00PfeerJbg AGHRNSJ2rXP20hIfwAF61bmOLkfFMIbz9dTR9qEwwa5OmAhtAAMR4pIS6 D5l9o7FqJrWqeeP48Dwh+0XSeaSnqtFXHpAwFUz65cUPOqnkRVAD+hzhM w==; X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="192458900" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2022 15:47:17 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Dec 2022 15:47:16 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Dec 2022 15:47:15 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , , Jerry Ray Subject: [PATCH net-next v5 1/6] dsa: lan9303: align dsa_switch_ops members Date: Fri, 9 Dec 2022 16:47:08 -0600 Message-ID: <20221209224713.19980-2-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221209224713.19980-1-jerry.ray@microchip.com> References: <20221209224713.19980-1-jerry.ray@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Whitespace preparatory patch, making the dsa_switch_ops table consistent. No code is added or removed. Signed-off-by: Jerry Ray --- v4->v5: changed patch title to be less generic Addressed space-tab issue missed in the initial patch. --- drivers/net/dsa/lan9303-core.c | 38 +++++++++++++++++----------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 80f07bd20593..5a21fc96d479 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -1280,25 +1280,25 @@ static int lan9303_port_mdb_del(struct dsa_switch *= ds, int port, } =20 static const struct dsa_switch_ops lan9303_switch_ops =3D { - .get_tag_protocol =3D lan9303_get_tag_protocol, - .setup =3D lan9303_setup, - .get_strings =3D lan9303_get_strings, - .phy_read =3D lan9303_phy_read, - .phy_write =3D lan9303_phy_write, - .adjust_link =3D lan9303_adjust_link, - .get_ethtool_stats =3D lan9303_get_ethtool_stats, - .get_sset_count =3D lan9303_get_sset_count, - .port_enable =3D lan9303_port_enable, - .port_disable =3D lan9303_port_disable, - .port_bridge_join =3D lan9303_port_bridge_join, - .port_bridge_leave =3D lan9303_port_bridge_leave, - .port_stp_state_set =3D lan9303_port_stp_state_set, - .port_fast_age =3D lan9303_port_fast_age, - .port_fdb_add =3D lan9303_port_fdb_add, - .port_fdb_del =3D lan9303_port_fdb_del, - .port_fdb_dump =3D lan9303_port_fdb_dump, - .port_mdb_add =3D lan9303_port_mdb_add, - .port_mdb_del =3D lan9303_port_mdb_del, + .get_tag_protocol =3D lan9303_get_tag_protocol, + .setup =3D lan9303_setup, + .get_strings =3D lan9303_get_strings, + .phy_read =3D lan9303_phy_read, + .phy_write =3D lan9303_phy_write, + .adjust_link =3D lan9303_adjust_link, + .get_ethtool_stats =3D lan9303_get_ethtool_stats, + .get_sset_count =3D lan9303_get_sset_count, + .port_enable =3D lan9303_port_enable, + .port_disable =3D lan9303_port_disable, + .port_bridge_join =3D lan9303_port_bridge_join, + .port_bridge_leave =3D lan9303_port_bridge_leave, + .port_stp_state_set =3D lan9303_port_stp_state_set, + .port_fast_age =3D lan9303_port_fast_age, + .port_fdb_add =3D lan9303_port_fdb_add, + .port_fdb_del =3D lan9303_port_fdb_del, + .port_fdb_dump =3D lan9303_port_fdb_dump, + .port_mdb_add =3D lan9303_port_mdb_add, + .port_mdb_del =3D lan9303_port_mdb_del, }; =20 static int lan9303_register_switch(struct lan9303 *chip) --=20 2.17.1 From nobody Thu Sep 18 03:58:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2A6EC4332F for ; Fri, 9 Dec 2022 22:47:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbiLIWrg (ORCPT ); Fri, 9 Dec 2022 17:47:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229655AbiLIWrU (ORCPT ); Fri, 9 Dec 2022 17:47:20 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC50121830; Fri, 9 Dec 2022 14:47:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670626038; x=1702162038; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=NxICK9YEAX5kiUZz9Kaz68Sx6I6kNikV7yxiKfqD0gQ=; b=HurkNQeA64dxssepArH1PUj4sRDrclHXbCxB0zWxyv4mZxIzDwwRDw9H 0h8rqMFLm0oDH3A69YRoRLAwVSi7eQ9u6P2ziT+e1x/a+bSAsun959PCw hgj+0cRtEfAzdAX8d56tXHqxt6NFwD5ya/SEM+NCVE5gyqVPbsYznkTbq LM+tl8jTUJhjpk3SevNVVvRw22r873CjxuLVy7aLkjsAY/i2ZBVjAzQSe VqrutDNVP8Fq1vMGgn0TwWdUGZNw3XJBhco0tmrry41wsUEKP9wlb2xSa UCAaV4zg0FgMavbk7aQ92FW1VqHtpB7DrZJGYGasPVgxxo0/Gk6nKf1yt A==; X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="203381000" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2022 15:47:18 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Dec 2022 15:47:17 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Dec 2022 15:47:16 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , , Jerry Ray Subject: [PATCH net-next v5 2/6] dsa: lan9303: move Turbo Mode bit initialization Date: Fri, 9 Dec 2022 16:47:09 -0600 Message-ID: <20221209224713.19980-3-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221209224713.19980-1-jerry.ray@microchip.com> References: <20221209224713.19980-1-jerry.ray@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparing to remove the .adjust_link api, I am moving the one-time initialization of the device's Turbo Mode bit into a different execution path. This code clears (disables) the Turbo Mode bit which is never used by this driver. Turbo Mode is a non-standard mode that would allow the 100Mbps RMII interface to run at 200Mbps. Signed-off-by: Jerry Ray --- drivers/net/dsa/lan9303-core.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 5a21fc96d479..20fc2af62531 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -886,6 +886,12 @@ static int lan9303_check_device(struct lan9303 *chip) return ret; } =20 + /* Virtual Phy: Remove Turbo 200Mbit mode */ + lan9303_read(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, ®); + + reg &=3D ~LAN9303_VIRT_SPECIAL_TURBO; + regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, reg); + return 0; } =20 @@ -1073,14 +1079,6 @@ static void lan9303_adjust_link(struct dsa_switch *d= s, int port, ctl &=3D ~BMCR_FULLDPLX; =20 lan9303_phy_write(ds, port, MII_BMCR, ctl); - - if (port =3D=3D chip->phy_addr_base) { - /* Virtual Phy: Remove Turbo 200Mbit mode */ - lan9303_read(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, &ctl); - - ctl &=3D ~LAN9303_VIRT_SPECIAL_TURBO; - regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, ctl); - } } =20 static int lan9303_port_enable(struct dsa_switch *ds, int port, --=20 2.17.1 From nobody Thu Sep 18 03:58:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45D6FC4332F for ; Fri, 9 Dec 2022 22:47:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229938AbiLIWrn (ORCPT ); Fri, 9 Dec 2022 17:47:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229876AbiLIWrV (ORCPT ); Fri, 9 Dec 2022 17:47:21 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54C52A5DDC; Fri, 9 Dec 2022 14:47:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670626040; x=1702162040; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=B2lfXxHngQm03n83AdhmQkCAaE+4zb2T+WSAC7zt58o=; b=UanF4I5ghcQex1rlFV0NZZfYDT/Kl+4h3Vx/pDW9gxbv1HNln03R0+SO 5OQEdb0Aly1ZqhUrhVwHBYEn8ZeapnVN/BvVn1K5l6Z6JZGSOcyurbGNF Gv0nIM61dG3LYBau8vhWtPGcBH8J3/GGvXCfUlBr9eT6hkw06nO5WLFj9 y2dUKlNJdxJfi0DPZUTi9z2+f7peJZCHlNa9xcolhjy5jG8bUcoabNPtG 7H4qyvU+xZ6vjLXIAJmlDwSMfMlfJZuth/aLzrIvkDGCVZ6PXdK7/vfWD +84MLyPFgZDCZ/qbhOIEIf7Zle1EeAQM0xHeMVaujQUrZhQ4KwruO3c9A A==; X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="203381007" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2022 15:47:19 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Dec 2022 15:47:18 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Dec 2022 15:47:17 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , , Jerry Ray Subject: [PATCH net-next v5 3/6] dsa: lan9303: Add exception logic for read failure Date: Fri, 9 Dec 2022 16:47:10 -0600 Message-ID: <20221209224713.19980-4-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221209224713.19980-1-jerry.ray@microchip.com> References: <20221209224713.19980-1-jerry.ray@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" While it is highly unlikely a read will ever fail, This code fragment is now in a function that allows us to return an error code. A read failure here will cause the lan9303_probe to fail. Signed-off-by: Jerry Ray --- drivers/net/dsa/lan9303-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 20fc2af62531..b0f49d9c3d0c 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -887,7 +887,9 @@ static int lan9303_check_device(struct lan9303 *chip) } =20 /* Virtual Phy: Remove Turbo 200Mbit mode */ - lan9303_read(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, ®); + ret =3D lan9303_read(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, ®); + if (ret) + return (ret); =20 reg &=3D ~LAN9303_VIRT_SPECIAL_TURBO; regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, reg); --=20 2.17.1 From nobody Thu Sep 18 03:58:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58618C04FDE for ; Fri, 9 Dec 2022 22:47:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229950AbiLIWrp (ORCPT ); Fri, 9 Dec 2022 17:47:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229885AbiLIWrV (ORCPT ); Fri, 9 Dec 2022 17:47:21 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69499A5DE4; Fri, 9 Dec 2022 14:47:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670626040; x=1702162040; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=01J1GdfGeDpMqj5EEuZPKItLr8DiKEKk/dDza5yX0co=; b=PpkHHs37s77kPHiDMUJG1YQGSUS+MiBZ2E+Jf6VbtXjRAiljUCmj5oo+ cjsPXbxXjqvAhAIlBbBzJ+WYfvJ6x82IUwthUfgpuArnZ0JKpknFnXxyb 4bameXe1tJOqbyg2CjDRSYhs4yePjTgi62/acZfhX+TX+LLVc4B3FPKs/ azJ9revQuxKwR2qNZdLxLbc/4HZ5GBiNCbvyTyhTCR3Qe69nHacNCim2o XXK0JrpQdF1JBkHRetziDjzBAT//ybYUYGKK4yyKjkQP2CLVUQNHHmhTb 27t5Oi8slqJ1ujO4bQa+tv51YDcs9QyU+LjroP1BjLIp6mZf7seKw32hs Q==; X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="203381009" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2022 15:47:19 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Dec 2022 15:47:19 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Dec 2022 15:47:18 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , , Jerry Ray Subject: [PATCH net-next v5 4/6] dsa: lan9303: Performance Optimization Date: Fri, 9 Dec 2022 16:47:11 -0600 Message-ID: <20221209224713.19980-5-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221209224713.19980-1-jerry.ray@microchip.com> References: <20221209224713.19980-1-jerry.ray@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As the regmap_write() is over a slow bus that will sleep, we can speed up the boot-up time a bit my not bothering to clear a bit that is already clear. Signed-off-by: Jerry Ray --- drivers/net/dsa/lan9303-core.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index b0f49d9c3d0c..694249aa1f19 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -891,8 +891,11 @@ static int lan9303_check_device(struct lan9303 *chip) if (ret) return (ret); =20 - reg &=3D ~LAN9303_VIRT_SPECIAL_TURBO; - regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, reg); + /* Clear the TURBO Mode bit if it was set. */ + if (reg & LAN9303_VIRT_SPECIAL_TURBO) { + reg &=3D ~LAN9303_VIRT_SPECIAL_TURBO; + regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, reg); + } =20 return 0; } --=20 2.17.1 From nobody Thu Sep 18 03:58:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DDF0C4332F for ; Fri, 9 Dec 2022 22:47:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229917AbiLIWrt (ORCPT ); Fri, 9 Dec 2022 17:47:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229891AbiLIWrW (ORCPT ); Fri, 9 Dec 2022 17:47:22 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 533761C12A; Fri, 9 Dec 2022 14:47:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670626042; x=1702162042; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=l7YBKmMzDz1O5Koq1YvREF/7MqTU5nkmnxEBATNyr3s=; b=zXWENwvKe+AaZCmmgO5cFca27no0p2e9STU1IIYln6Y0esS1ttIZ8QtU SSJLTuKazA+I1/XmUKr2gTjHB3y5nAPL//yAgxujAiP8kKtTUvW8ivrWx PCoAnOSzmW1niG9mlCQ2ejNI0ODRy7QtZbeBucAHS4uEC55MuGqLw26FG 3EQtQmye+YdTketwjv6qnyyee2u9Gdyk3PvOUr4zTUrpsihRd1eHY9peU PXqInpwBAYJn1/DgaZ4/B5MQpnxR25pmCKaCKis1H2N9Fz5FkVNZME3a2 qsO8B1iwMvdirH+ZuuVcE37jg8nuMKqkkpqKmNA8vvvHszoO13unOj/ve Q==; X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="192458907" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2022 15:47:21 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Dec 2022 15:47:20 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Dec 2022 15:47:19 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , , Jerry Ray Subject: [PATCH net-next v5 5/6] dsa: lan9303: Determine CPU port based on dsa_switch ptr Date: Fri, 9 Dec 2022 16:47:12 -0600 Message-ID: <20221209224713.19980-6-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221209224713.19980-1-jerry.ray@microchip.com> References: <20221209224713.19980-1-jerry.ray@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparing to move the adjust_link logic into the phylink_mac_link_up api, change the macro used to check for the cpu port. Signed-off-by: Jerry Ray --- drivers/net/dsa/lan9303-core.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 694249aa1f19..1d22e4b74308 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -1064,7 +1064,11 @@ static void lan9303_adjust_link(struct dsa_switch *d= s, int port, struct lan9303 *chip =3D ds->priv; int ctl; =20 - if (!phy_is_pseudo_fixed_link(phydev)) + /* On this device, we are only interested in doing something here if + * this is the CPU port. All other ports are 10/100 phys using MDIO + * to control there link settings. + */ + if (!dsa_is_cpu_port(ds, port)) return; =20 ctl =3D lan9303_phy_read(ds, port, MII_BMCR); --=20 2.17.1 From nobody Thu Sep 18 03:58:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5A4EC4332F for ; Fri, 9 Dec 2022 22:47:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230014AbiLIWrx (ORCPT ); Fri, 9 Dec 2022 17:47:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbiLIWrX (ORCPT ); Fri, 9 Dec 2022 17:47:23 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79B201C12A; Fri, 9 Dec 2022 14:47:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670626042; x=1702162042; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=kjBJ1T++jGq2uuDcVYJJloH539ccBnmbGCsz+c3/b0g=; b=oWIjY+Ck9rbXsBoT7RajY5umG2wc3mWtv5LipU4Ov5YS49hAXT13gGWr TJcBL3prhwfNqhtknE+fMqlytkKqTUJIwdcOzs32bGWESk6CUA4+95Xka xjK3am8KnQcC6TIEXRM9Lt4VyVz/bNveP/b+70QINUod/aNu3/WZzgr76 BoxuMq4NFuxq1Dkq48JK8B4GjQm2ff8EFEQ7SK9TIJFlFOtlpIWSFlNte MvUtK0ucvZ99fIJyaVc8oIbZirnQKam0goo+E7t+u39TC2ioZDYL2wLL9 NcWGF3xWoq7k8kk4Xq6JezYOCGUvmovr+tKieUxpjxG/mnmOQzMtPhRd6 A==; X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="203381022" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2022 15:47:22 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Dec 2022 15:47:21 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Dec 2022 15:47:20 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , , Jerry Ray Subject: [PATCH net-next v5 6/6] dsa: lan9303: Migrate to PHYLINK Date: Fri, 9 Dec 2022 16:47:13 -0600 Message-ID: <20221209224713.19980-7-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221209224713.19980-1-jerry.ray@microchip.com> References: <20221209224713.19980-1-jerry.ray@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch replaces the adjust_link api with the phylink apis that provide equivalent functionality. The remaining functionality from the adjust_link is now covered in the phylink_mac_link_up api. Removes: .adjust_link Adds: .phylink_get_caps .phylink_mac_link_up Signed-off-by: Jerry Ray --- v4->v5: - Added various prep patches to better show the movement of the logic. v3->v4: - Reworked the implementation to preserve the adjust_link functionality by including it in the phylink_mac_link_up api. v2->v3: Added back in disabling Turbo Mode on the CPU MII interface. Removed the unnecessary clearing of the phy supported interfaces. --- drivers/net/dsa/lan9303-core.c | 104 ++++++++++++++++++++++----------- 1 file changed, 71 insertions(+), 33 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 1d22e4b74308..810aef527fe1 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -1058,38 +1058,6 @@ static int lan9303_phy_write(struct dsa_switch *ds, = int phy, int regnum, return chip->ops->phy_write(chip, phy, regnum, val); } =20 -static void lan9303_adjust_link(struct dsa_switch *ds, int port, - struct phy_device *phydev) -{ - struct lan9303 *chip =3D ds->priv; - int ctl; - - /* On this device, we are only interested in doing something here if - * this is the CPU port. All other ports are 10/100 phys using MDIO - * to control there link settings. - */ - if (!dsa_is_cpu_port(ds, port)) - return; - - ctl =3D lan9303_phy_read(ds, port, MII_BMCR); - - ctl &=3D ~BMCR_ANENABLE; - - if (phydev->speed =3D=3D SPEED_100) - ctl |=3D BMCR_SPEED100; - else if (phydev->speed =3D=3D SPEED_10) - ctl &=3D ~BMCR_SPEED100; - else - dev_err(ds->dev, "unsupported speed: %d\n", phydev->speed); - - if (phydev->duplex =3D=3D DUPLEX_FULL) - ctl |=3D BMCR_FULLDPLX; - else - ctl &=3D ~BMCR_FULLDPLX; - - lan9303_phy_write(ds, port, MII_BMCR, ctl); -} - static int lan9303_port_enable(struct dsa_switch *ds, int port, struct phy_device *phy) { @@ -1286,13 +1254,83 @@ static int lan9303_port_mdb_del(struct dsa_switch *= ds, int port, return 0; } =20 +static void lan9303_phylink_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) +{ + struct lan9303 *chip =3D ds->priv; + + dev_dbg(chip->dev, "%s(%d) entered.", __func__, port); + + config->mac_capabilities =3D MAC_10 | MAC_100 | MAC_ASYM_PAUSE | + MAC_SYM_PAUSE; + + if (dsa_port_is_cpu(dsa_to_port(ds, port))) { + /* cpu port */ + __set_bit(PHY_INTERFACE_MODE_RMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_MII, + config->supported_interfaces); + } else { + /* internal ports */ + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); + /* Compatibility for phylib's default interface type when the + * phy-mode property is absent + */ + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + } + + /* This driver does not make use of the speed, duplex, pause or the + * advertisement in its mac_config, so it is safe to mark this driver + * as non-legacy. + */ + config->legacy_pre_march2020 =3D false; +} + +static void lan9303_phylink_mac_link_up(struct dsa_switch *ds, int port, + unsigned int mode, + phy_interface_t interface, + struct phy_device *phydev, int speed, + int duplex, bool tx_pause, + bool rx_pause) +{ + u32 ctl; + + /* On this device, we are only interested in doing something here if + * this is the CPU port. All other ports are 10/100 phys using MDIO + * to control there link settings. + */ + if (!dsa_is_cpu_port(ds, port)) + return; + + ctl =3D lan9303_phy_read(ds, port, MII_BMCR); + + ctl &=3D ~BMCR_ANENABLE; + + if (speed =3D=3D SPEED_100) + ctl |=3D BMCR_SPEED100; + else if (speed =3D=3D SPEED_10) + ctl &=3D ~BMCR_SPEED100; + else + dev_err(ds->dev, "unsupported speed: %d\n", speed); + + if (duplex =3D=3D DUPLEX_FULL) + ctl |=3D BMCR_FULLDPLX; + else + ctl &=3D ~BMCR_FULLDPLX; + + lan9303_phy_write(ds, port, MII_BMCR, ctl); +} + static const struct dsa_switch_ops lan9303_switch_ops =3D { .get_tag_protocol =3D lan9303_get_tag_protocol, .setup =3D lan9303_setup, .get_strings =3D lan9303_get_strings, .phy_read =3D lan9303_phy_read, .phy_write =3D lan9303_phy_write, - .adjust_link =3D lan9303_adjust_link, + .phylink_get_caps =3D lan9303_phylink_get_caps, + .phylink_mac_link_up =3D lan9303_phylink_mac_link_up, .get_ethtool_stats =3D lan9303_get_ethtool_stats, .get_sset_count =3D lan9303_get_sset_count, .port_enable =3D lan9303_port_enable, --=20 2.17.1