From nobody Thu Sep 18 05:38:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB9A4C4332F for ; Fri, 9 Dec 2022 02:06:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229572AbiLICGh (ORCPT ); Thu, 8 Dec 2022 21:06:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230094AbiLICG3 (ORCPT ); Thu, 8 Dec 2022 21:06:29 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67C299230B for ; Thu, 8 Dec 2022 18:06:28 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id 3-20020a17090a098300b00219041dcbe9so3452439pjo.3 for ; Thu, 08 Dec 2022 18:06:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M88P4SMh5VCPJCyuLc/w2B8fWJUsM71IvdRT7VAjmHQ=; b=XIV9gS7alHxSUtR0tKaSg1ZlTvjuvanMhkxu9gP+QpjiM2dNoCFBdqxhXqHxm0gQxK fiG35WMYsI4gJmDpVdNgZQIe+pWpRzesNMP0PihtGP8T7c2YYBxNcXh1lAAHS87CMrD3 naYNadu9ysQ3fHsQ1mFE0avh4w5DRqRtW5ZYY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M88P4SMh5VCPJCyuLc/w2B8fWJUsM71IvdRT7VAjmHQ=; b=rCidU4OgvhZB8oMaOyMxKM4WfVTXmZJAbdC4tuzOEQSz+rEkemPh2U9dtWbfPWu6tG tWi3lp9MAKg33YHzHPJfZB08/vjSmarWMr2MyeEyFqVHN9naS43rLVy9Ik3vaf5HKBYf ieVlKsW+qo6h16WC9crhklztW3JyWxfdCFHaiU9/98RDTQdwIGR16brOGUWuR9Bo8yEM HmLIN3iuq6waFhex0DvBb8nEKBgKnUeLqGYLAD+HrNFH6urXApJScVrpASBy+igE5gXF bFkEwzEq3x3DlPrU/fwqyU74tN8srtHJCsj0wg/T/abBvZlcqSXJ6LQACeq7TFreinh7 y/Pw== X-Gm-Message-State: ANoB5pl4VWmM2nG4Xt7TRydW69k/Fz5C/rvcHQxKkTPSpjUA61vCeoqd kDJZ49xnuZUaGGwSxFp7YmNlIw== X-Google-Smtp-Source: AA0mqf7krx9sgecPRwfwbatLdx7a2LUAZpwNfCjIW4cK+SLxXzqoatENDBySUKpqsRQPnNfvmPf3cQ== X-Received: by 2002:a17:90a:f614:b0:218:87cf:1bed with SMTP id bw20-20020a17090af61400b0021887cf1bedmr4772786pjb.2.1670551587920; Thu, 08 Dec 2022 18:06:27 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id h3-20020a17090a648300b00218ddc8048bsm233473pjj.34.2022.12.08.18.06.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:27 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: linux-arm-msm@vger.kernel.org, mka@chromium.org, Yunlong Jia , Konrad Dybcio , linux-input@vger.kernel.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5] arm64: dts: qcom: sc7180: Bump up trogdor ts_reset_l drive strength Date: Thu, 8 Dec 2022 18:06:08 -0800 Message-Id: <20221208180603.v2.1.I39c387f1e3176fcf340039ec12d54047de9f8526@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209020612.1303267-1-dianders@chromium.org> References: <20221209020612.1303267-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" On at least one board (pazquel360) the reset line for the touchscreen was scoped and found to take almost 2 ms to fall when we drove it low. This wasn't great because the Linux driver for the touchscreen (the elants_i2c driver) thinks it can do a 500 us reset pulse. If we bump the drive strength to 8 mA then the reset line went down in ~421 us. NOTE: we could apply this fix just for pazquel360, but: * Probably other trogdor devices have similar timings and it's just that nobody has noticed it before. * There are other trogdor boards using the same elan driver that tries to do 500 us reset pulses. * Bumping the drive strength to 8mA across the board won't hurt. This isn't a high speed signal or anything. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- (no changes since v1) arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot= /dts/qcom/sc7180-trogdor.dtsi index f1defb94d670..ff1c7aa6a722 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -1376,7 +1376,15 @@ ts_reset_l: ts-reset-l-state { pins =3D "gpio8"; function =3D "gpio"; bias-disable; - drive-strength =3D <2>; + + /* + * The reset GPIO to the touchscreen takes almost 2ms to drop + * at the default drive strength. When we bump it up to 8mA it + * falls in under 500us. We want this to be fast since the Elan + * datasheet (and any drivers written based on it) talk about using + * a 500 us reset pulse. + */ + drive-strength =3D <8>; }; =20 sdc1_on: sdc1-on-state { --=20 2.39.0.rc1.256.g54fd8350bd-goog From nobody Thu Sep 18 05:38:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A3C3C4167B for ; Fri, 9 Dec 2022 02:06:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230086AbiLICGk (ORCPT ); Thu, 8 Dec 2022 21:06:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230111AbiLICGb (ORCPT ); Thu, 8 Dec 2022 21:06:31 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 132F37D09F for ; Thu, 8 Dec 2022 18:06:30 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id k88-20020a17090a4ce100b00219d0b857bcso3471793pjh.1 for ; Thu, 08 Dec 2022 18:06:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VheF3QaaF2exP1BBRM3nf5LuJc1NkNdCQqtMnYJ/9kg=; b=JhH5QWI4fDvw6CK0ooJ1jAUGCVa2TJ2L4YPH3WJ33TpDW1aNUQy6OBN6UDsX7k3vSW hb85z+ffV5H2emu8I+9J0FKxNDC5dhJkEZz+dYfWyzhXjDrxyFPQcAzz/SqZLag6rv0u JhET5YQSpY9ESn3sIh1jLQFEzrCcTCfJZpPpg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VheF3QaaF2exP1BBRM3nf5LuJc1NkNdCQqtMnYJ/9kg=; b=Hchz2Cz15K1I/sMUrOnrRdjtYXzZLbBeSmko68SDxYoYj267RC0yyE5tzZwxPuogGb fjvBRIp7aQJEK8bv3D1ymfWc4M9X/UliJ5XIlEwecCffSd6eh6TvMqg6bbspz7MAtO8n QPLr2erMqX48iU7I/Rzy74H8eUdUf2Fr0xiQAxXZOnKQ9L/UwL6LNpMPZYCLkt1OZCN0 APkvvNpcoA5zeZFKoVF4KrkqQOQzhvyvpjOie5TrcWiXrnUTkMqPYV8gwKDUeyx7F9VS /7tTAMoEjp5UURRTFx0E2h+4/Im1OJtfi5b60SfjwNcpq6vBaqDBAsLBPv95Lyr8QjiL ZsdA== X-Gm-Message-State: ANoB5pm/LQYxY2fSjvtMLss762igeO/vkam3glmFNk3TD14kaRPkHTw0 YedCce1bvEx8saHcMT+heLFoLA== X-Google-Smtp-Source: AA0mqf5ZPcXEMtKwPfze121M3Bof+c5ifljUBFjVB9NrSrfEF7Mjl8XKULe5dHHXKGLGmF8zfOEfyQ== X-Received: by 2002:a05:6a21:2d8b:b0:a0:462f:8e3e with SMTP id ty11-20020a056a212d8b00b000a0462f8e3emr5900754pzb.55.1670551589597; Thu, 08 Dec 2022 18:06:29 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id h3-20020a17090a648300b00218ddc8048bsm233473pjj.34.2022.12.08.18.06.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:29 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: linux-arm-msm@vger.kernel.org, mka@chromium.org, Yunlong Jia , Konrad Dybcio , linux-input@vger.kernel.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5] arm64: dts: qcom: sc7180: Add trogdor eDP/touchscreen regulator off-on-time Date: Thu, 8 Dec 2022 18:06:09 -0800 Message-Id: <20221208180603.v2.2.I65ac577411b017eff50e7a4fda254e5583ccdc48@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209020612.1303267-1-dianders@chromium.org> References: <20221209020612.1303267-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In general, the timing diagrams for components specify a minimum time for power cycling the component. When we remove power from a device we need to let the device fully discharge and get to a quiescent state before applying power again. If we power a device on too soon then it might not have fully powered off and might be in a weird in-between / invalid state. eDP panels typically have a time that's at least 500 ms here. You can see that in Linux's panel-edp driver nearly every device specifies a "unprepare" time of at least 500 ms. This is a common minimum and the 500 ms is even in the example in the eDP spec. In Linux, the "panel-edp" driver enforces this delay for its own control of the regulator, but the "panel-edp" driver can't do anything about other control of the regulator (for instance, by the touchpanel driver). Let's add 500 ms as a board constraint for the regulator that's used for eDP/touchpanel on trogdor boards. If a given trogdor board stuffs only panels that can use a shorter time or stuff some panels that need a larger time then they can manually adjust this timing. We'll only do this minimum delay for trogdor devices with eDP (ones that use either bridge chip), not for devices with MIPI panels. MIPI panels could have similar constraints but the 500 ms isn't necessarily as standard and there are no known cases where this delay is needed. For most trogdor boards, this doesn't actually seem to affect anything when testing against shipping Linux. However, with pazqel360 it seems that this does make a difference. It seems that the touchscreen on this board _also_ needs some time for the regulator to discharge. That time is much less than 500 ms, so we'll just put the eDP panel 500 ms in there since the board constraint should be the "max" of the components. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- Changes in v2: - Fix typo in commit message (Matthias) .../boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi | 12 ++++++++++++ .../boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/a= rch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi index ebd6765e2afa..e27a769f8cd4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -26,6 +26,18 @@ pp3300_brij_ps8640: pp3300-brij-ps8640-regulator { }; }; =20 +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before childr= en). + */ + +&pp3300_dx_edp { + off-on-delay-us =3D <500000>; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + &dsi0_out { remote-endpoint =3D <&ps8640_in>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/ar= ch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi index 65333709e529..3188788306d0 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -7,6 +7,18 @@ =20 #include =20 +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before childr= en). + */ + +&pp3300_dx_edp { + off-on-delay-us =3D <500000>; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + &dsi0_out { remote-endpoint =3D <&sn65dsi86_in>; }; --=20 2.39.0.rc1.256.g54fd8350bd-goog From nobody Thu Sep 18 05:38:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 850ADC4332F for ; Fri, 9 Dec 2022 02:06:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229523AbiLICGp (ORCPT ); Thu, 8 Dec 2022 21:06:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230112AbiLICGd (ORCPT ); Thu, 8 Dec 2022 21:06:33 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD6027D0A3 for ; Thu, 8 Dec 2022 18:06:31 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id m4so3395568pls.4 for ; Thu, 08 Dec 2022 18:06:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O0omoS8MV63r00CQ4nuB53paFZYXNiG9HsPf+U2WQ9E=; b=O4yy6UsxnWqGe50OUXK/YusUbzxacCc+N5R9BOXPdal/QmHY1KoPpyZctKQLKDv0ak MptSgrP4NdoW4dHXcnnvPBYuym7kvA3eWaJ4mYZRA2SJpD6izPHnjseMkvsn/kEZ04Hz cfhvD39RtRENpEb5HAg0O0mLSi/ZUKvxYYYMU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O0omoS8MV63r00CQ4nuB53paFZYXNiG9HsPf+U2WQ9E=; b=554rPZYtRXAOI6UypqNoRtuZdaX4zAlkhulGp3kI7mDcr77wezyLcs/XNSEeY909p9 75p8zgK7Uhr19S5WC0who/2NlOd42TSCkHLk7tBW4eTQvfVZ8WEvpgCMaKGQHCSpSsn0 1c/v2P34WL/miGC9AZhyEK+ob9LOP77j1YBJ23JqMgprosCY4s0ihU5eEKhPz8nadkDE 5A2LQyccD2WPN6kjdi5XVNyDl4x7+wFHcTRDSCO9LXDgL8i++XPTOK/B4xzW3vGFk5RT i++S8nTDCZJxunS347V4m7jvivddUoH5g51ltZs4dAGN6bX/fQXXO3YW3rHlgMhiH4GI MAbA== X-Gm-Message-State: ANoB5pn3xcutZ85MgKWRJdBlVYaT8LkoRTb9q06DshXdaMcvIcSNlnXf B0Sh4I4waJ3FVFAPbY3eqeW1Xw== X-Google-Smtp-Source: AA0mqf64PcrLWIDFYeS/Kz+OWZHuGTsz4ytUjwNxhf1DM0bLkNvNuYQBcOrll7VfVp2FVwLXX3/ZHg== X-Received: by 2002:a05:6a20:d903:b0:a3:9dd1:6d38 with SMTP id jd3-20020a056a20d90300b000a39dd16d38mr5453853pzb.25.1670551591279; Thu, 08 Dec 2022 18:06:31 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id h3-20020a17090a648300b00218ddc8048bsm233473pjj.34.2022.12.08.18.06.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:30 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: linux-arm-msm@vger.kernel.org, mka@chromium.org, Yunlong Jia , Konrad Dybcio , linux-input@vger.kernel.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] arm64: dts: qcom: sc7180: Start the trogdor eDP/touchscreen regulator on Date: Thu, 8 Dec 2022 18:06:10 -0800 Message-Id: <20221208180603.v2.3.I7050a61ba3a48e44b86053f265265b5e3c0cee31@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209020612.1303267-1-dianders@chromium.org> References: <20221209020612.1303267-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that we've added the `off-on-delay-us` for the touchpanel regulator, we can see that we're actually hitting that delay at bootup. I saw about 200 ms of delay. Let's avoid that delay by starting the regulator on. We'll only do this for eDP devices for the time being. NOTE: we _won't_ do this for homestar. Homestar's panel really likes to be power cycled. It's why the Linux driver for this panel has a pm_runtime_put_sync_suspend() when the panel is being unprepared but the normal panel-edp driver doesn't. It's also why this hardware has a separate power rail for eDP vs. touchscreen, unlike all the other trogdor boards. We won't start homestar's regulator on. While this could mean a slight delay on homestar, it is probably a _correct_ delay. The bootloader might have left the regulator on (it does so in dev and recovery modes), so if we turned the regulator off at probe time and we actually hit the delay then we were probably violating T12 in the panel spec. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- (no changes since v1) .../boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 18 ++++++++++++++++++ .../dts/qcom/sc7180-trogdor-parade-ps8640.dtsi | 8 ++++++++ .../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 8 ++++++++ 3 files changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/a= rm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi index d3cf64c16dcd..b3ba23a88a0b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi @@ -85,6 +85,24 @@ map1 { }; }; =20 +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before childr= en). + */ + +&pp3300_dx_edp { + /* + * The atna33xc20 really likes to be power cycled to keep it from + * getting in a bad state. This is the reason that the touchscreen + * rail and eDP rails are separate from each other on homestar (but + * not other trogdor devices) Make sure it starts "off" at bootup. + */ + /delete-property/ regulator-boot-on; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + ap_ts_pen_1v8: &i2c4 { status =3D "okay"; clock-frequency =3D <400000>; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/a= rch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi index e27a769f8cd4..5aa7949b5328 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -34,6 +34,14 @@ pp3300_brij_ps8640: pp3300-brij-ps8640-regulator { =20 &pp3300_dx_edp { off-on-delay-us =3D <500000>; + + /* + * It's nicer to start with this regulator enabled. The + * bootloader may have left it on and it's nice not to cause an + * extra power cycle of the touchscreen and eDP panel at bootup. + * This should help speed bootup because we have off-on-delay-us. + */ + regulator-boot-on; }; =20 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/ar= ch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi index 3188788306d0..e52b8776755d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -15,6 +15,14 @@ =20 &pp3300_dx_edp { off-on-delay-us =3D <500000>; + + /* + * It's nicer to start with this regulator enabled. The + * bootloader may have left it on and it's nice not to cause an + * extra power cycle of the touchscreen and eDP panel at bootup. + * This should help speed bootup because we have off-on-delay-us. + */ + regulator-boot-on; }; =20 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ --=20 2.39.0.rc1.256.g54fd8350bd-goog From nobody Thu Sep 18 05:38:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 165D2C4332F for ; Fri, 9 Dec 2022 02:06:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230132AbiLICGw (ORCPT ); Thu, 8 Dec 2022 21:06:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229816AbiLICGe (ORCPT ); Thu, 8 Dec 2022 21:06:34 -0500 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 646F19B292 for ; Thu, 8 Dec 2022 18:06:33 -0800 (PST) Received: by mail-pl1-x62f.google.com with SMTP id a9so3380984pld.7 for ; Thu, 08 Dec 2022 18:06:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=riB7LtyZ0lleKlmY9G6ocrA6pcHo/IAGW1ay3iZp0eQ=; b=X+JYtgj8sgUEsF7jToHxDCYTMglL0aIOZ4+loh9W8HStvg47PVkIykK/WViQN8qXBK GjYQ508/LrXK1k0wxNZCEu3/JqnBdZOnrAFBorD3+i/CA07NkAFrocN78evZiRColHr5 uftETNCdoUP898da50ms6V//mnUDPs9xOTcmU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=riB7LtyZ0lleKlmY9G6ocrA6pcHo/IAGW1ay3iZp0eQ=; b=2Qdgv8Etk7uuonBut6tr3MBn0h0xMsxb6uca3+QCGZZWERknzVtHqTtD5+5gKxEMDr ONJtbZY4HbBPuJEZxYU1SO4I9RpD9E5M1cyA2i2kw6y0MPRgZ20qLWk83pk79l3HV1BQ L3Tni68sJUC8rYzQkrz4mFMYNat/GgsabPBP932sBzgIhvJe3+RRRdW8aFxmYPO4oz35 IfwiCwV5VhEUoETkl/Y/xP/e65uRrZ7XxQq819m3h8rOQ+pfBkmW+IbWsfM0LVTwx8TA 749vNgW9+IT5JpvEDgJ1obsBkkt4WG4AQKR6FcdhJTOVP+RQ6KDXV2OdK0ymRL0MLV/W 4v6w== X-Gm-Message-State: ANoB5pl/9Sy9x7UT9sxVDwI6hgyXHtWvutxKE/myY6pYeElrNQg+a2R8 Udck19xh3r5QKnkuy5mtz5gGFQ== X-Google-Smtp-Source: AA0mqf5e81mya60xEl8F+ZSr8VdEDiUyt7BQLEsWUnydTPCssdcQFKXLZ9EuWMLf5QY19GrOyKTGFw== X-Received: by 2002:a17:90a:199b:b0:218:72de:1f77 with SMTP id 27-20020a17090a199b00b0021872de1f77mr4054831pji.6.1670551592946; Thu, 08 Dec 2022 18:06:32 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id h3-20020a17090a648300b00218ddc8048bsm233473pjj.34.2022.12.08.18.06.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:32 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: linux-arm-msm@vger.kernel.org, mka@chromium.org, Yunlong Jia , Konrad Dybcio , linux-input@vger.kernel.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dts: qcom: sc7180: Add pazquel360 touschreen Date: Thu, 8 Dec 2022 18:06:11 -0800 Message-Id: <20221208180603.v2.4.Id132522bda31fd97684cb076a44a0907cd28097d@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209020612.1303267-1-dianders@chromium.org> References: <20221209020612.1303267-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The touchscreen was supposed to have been added when pazquel360 first was added upstream but was missed. Add it now. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- (no changes since v1) .../dts/qcom/sc7180-trogdor-pazquel360.dtsi | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi b/arch= /arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi index 5702325d0c7b..54b89def8402 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi @@ -14,6 +14,27 @@ &alc5682 { realtek,dmic-clk-rate-hz =3D <2048000>; }; =20 +ap_ts_pen_1v8: &i2c4 { + status =3D "okay"; + clock-frequency =3D <400000>; + + ap_ts: touchscreen@10 { + compatible =3D "elan,ekth3915", "elan,ekth3500"; + reg =3D <0x10>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&ts_int_l>, <&ts_reset_l>; + + interrupt-parent =3D <&tlmm>; + interrupts =3D <9 IRQ_TYPE_LEVEL_LOW>; + + hid-descr-addr =3D <0x0001>; + + vcc33-supply =3D <&pp3300_ts>; + vccio-supply =3D <&pp1800_l10a>; + reset-gpios =3D <&tlmm 8 GPIO_ACTIVE_LOW>; + }; +}; + &keyboard_controller { function-row-physmap =3D < MATRIX_KEY(0x00, 0x02, 0) /* T1 */ --=20 2.39.0.rc1.256.g54fd8350bd-goog From nobody Thu Sep 18 05:38:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E31E0C4167B for ; Fri, 9 Dec 2022 02:07:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230130AbiLICHD (ORCPT ); Thu, 8 Dec 2022 21:07:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229631AbiLICGf (ORCPT ); Thu, 8 Dec 2022 21:06:35 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBD72A0F85 for ; Thu, 8 Dec 2022 18:06:34 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id m4so3395670pls.4 for ; Thu, 08 Dec 2022 18:06:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EYHKt7eErryFsunPtjvbbKSRjv/mzx815uk+wD/pTQA=; b=d49/UoZlVE5w3d9YzUdP39J9v1X4sYnfWRYbfkz4kRMG3f3MBGnFZoF8oeyfpj09BG cFP+PcSftvmWByGj00bsk6B8QOC0edfwZ/94cvliN5dhM3a6QtVOi6KQzImXE4Xu1ie/ gkorIwsbpNx6+8bg3nBEGTwD/wgAQHl4nCDkE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EYHKt7eErryFsunPtjvbbKSRjv/mzx815uk+wD/pTQA=; b=aLOEA/lHKhTn2+cmVrlxnIFYjFNz1xdQVeKpKOWeTBY4fzXtNM6O7sJVWw/hlmn6GO sm0ICmBjItoR+LHGrVjXpqd7AHa0c9ZX80u0TcN7UVJFDmJx5thBijtYUFd7qlfE33wJ FRFN92gejCKMPakWI71iJ1SjJ2NHmY7YmSBfeyECFpKuwIg6ZuVf1z39fnMGLIwIqAgG rCIAm3T18Wld9Q9jWnMrkxPZLcRKSKlTj5gVIee8nUjlYkYWyw5YuwurapdS5xLYvTzA UEIWwMdchdXhJdUmwSWVTg8q0QPLD4rkfEaTnheXds0+C0gUMB8KakeB0uU66l9YOWS3 908w== X-Gm-Message-State: ANoB5pmaBkMsGknHHJxsUmsEloFHhP7mN9DyVRT/FbKx5ZRMalUCfxSc U5RmOv+fLmnrniL8ms7iE8rANw== X-Google-Smtp-Source: AA0mqf7uDUzumlQz01jBVxnxyEVFcy0Yo5fQx0dH1g79MUe7PgisOwmPsSg6vsxK4/zwUphVR1W31w== X-Received: by 2002:a17:90a:5281:b0:212:f0fe:bb45 with SMTP id w1-20020a17090a528100b00212f0febb45mr4080802pjh.40.1670551594503; Thu, 08 Dec 2022 18:06:34 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id h3-20020a17090a648300b00218ddc8048bsm233473pjj.34.2022.12.08.18.06.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:34 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: linux-arm-msm@vger.kernel.org, mka@chromium.org, Yunlong Jia , Konrad Dybcio , linux-input@vger.kernel.org, swboyd@chromium.org, Douglas Anderson , Johnny Chuang , linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] Input: elants_i2c: Delay longer with reset asserted Date: Thu, 8 Dec 2022 18:06:12 -0800 Message-Id: <20221208180603.v2.5.I6edfb3f459662c041563a54e5b7df727c27caaba@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209020612.1303267-1-dianders@chromium.org> References: <20221209020612.1303267-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The elan touchscreen datasheet says that the reset GPIO only needs to be asserted for 500us in order to reset the regulator. The problem is that some boards need a level shifter between the signals on the GPIO controller and the signals on the touchscreen. All of these extra components on the line can slow the transition of the signals. On one board, we measured the reset line and saw that it took almost 1.8ms to go low. Even after we bumped up the "drive strength" of the signal from the default 2mA to 8mA we still saw it take 421us for the signal to go low. In order to account for this let's lengthen the amount of time that we keep the reset asserted. Let's bump it up from 500us to 5000us. That's still a relatively short amount of time and is much safer. It should be noted that this fixes real problems. Case in point: 1. The touchscreen power rail may be shared with another device (like an eDP panel). That means that at probe time power might already be on. 2. In probe we grab the reset GPIO and assert it (make it low). 3. We turn on power (a noop since it was already on). 4. We wait 500us. 5. We deassert the reset GPIO. With the above case and only a 500us delay we saw only a partial reset asserted, which is bad. Giving it 5ms is overkill but feels safer in case someone else has a different level shifter setup. Note that bumping up the delay to 5000 means that some configs yell about using udelay(). We'll change to using usleep_range(). We give a small range here because: - This isn't a delay that happens very often so we don't need to worry about giving a big range to allow for power efficiency. - usleep_range() is known to almost always pick the upper bound and delay that long and we really don't want to slow down the power on of the touchscreen that much. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- Changes in v2: - Fix typo in commit message (Matthias) - udelay -> usleep_range (Patches Robot, Dmitry) drivers/input/touchscreen/elants_i2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/input/touchscreen/elants_i2c.c b/drivers/input/touchsc= reen/elants_i2c.c index 879a4d984c90..192d543e5aa9 100644 --- a/drivers/input/touchscreen/elants_i2c.c +++ b/drivers/input/touchscreen/elants_i2c.c @@ -114,7 +114,7 @@ /* calibration timeout definition */ #define ELAN_CALI_TIMEOUT_MSEC 12000 =20 -#define ELAN_POWERON_DELAY_USEC 500 +#define ELAN_POWERON_DELAY_USEC 5000 #define ELAN_RESET_DELAY_MSEC 20 =20 /* FW boot code version */ @@ -1352,7 +1352,7 @@ static int elants_i2c_power_on(struct elants_data *ts) * We need to wait a bit after powering on controller before * we are allowed to release reset GPIO. */ - udelay(ELAN_POWERON_DELAY_USEC); + usleep_range(ELAN_POWERON_DELAY_USEC, ELAN_POWERON_DELAY_USEC + 100); =20 release_reset_gpio: gpiod_set_value_cansleep(ts->reset_gpio, 0); --=20 2.39.0.rc1.256.g54fd8350bd-goog