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[82.54.95.136]) by smtp.gmail.com with ESMTPSA id n11-20020a170906118b00b007be696512ecsm9780614eja.187.2022.12.08.08.54.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 08:54:13 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , Dario Binacchi , Arnd Bergmann , Fabio Estevam , Martin Kaiser , NXP Linux Team , Pengutronix Kernel Team , Russell King , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/1] ARM: imx: add missing of_node_put() Date: Thu, 8 Dec 2022 17:54:03 +0100 Message-Id: <20221208165404.1512014-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20221208165404.1512014-1-dario.binacchi@amarulasolutions.com> References: <20221208165404.1512014-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Calling of_find_compatible_node() returns a node pointer with refcount incremented. Use of_node_put() on it when done. The patch fixes the same problem on different i.MX platforms. Fixes: 8b88f7ef31dde ("ARM: mx25: Retrieve IIM base from dt") Fixes: 94b2bec1b0e05 ("ARM: imx27: Retrieve the SYSCTRL base address from d= evicetree") Fixes: 3172225d45bd9 ("ARM: imx31: Retrieve the IIM base address from devic= etree") Fixes: f68ea682d1da7 ("ARM: imx35: Retrieve the IIM base address from devic= etree") Fixes: ee18a7154ee08 ("ARM: imx5: retrieve iim base from device tree") Signed-off-by: Dario Binacchi Reviewed-by: Fabio Estevam Reviewed-by: Martin Kaiser --- Changes in v2: - Combine the 5 patches (one for each platform) into one patch as suggested by Arnd Bergmann. arch/arm/mach-imx/cpu-imx25.c | 1 + arch/arm/mach-imx/cpu-imx27.c | 1 + arch/arm/mach-imx/cpu-imx31.c | 1 + arch/arm/mach-imx/cpu-imx35.c | 1 + arch/arm/mach-imx/cpu-imx5.c | 1 + 5 files changed, 5 insertions(+) diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c index 3e63445cde06..cc86977d0a34 100644 --- a/arch/arm/mach-imx/cpu-imx25.c +++ b/arch/arm/mach-imx/cpu-imx25.c @@ -23,6 +23,7 @@ static int mx25_read_cpu_rev(void) =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx25-iim"); iim_base =3D of_iomap(np, 0); + of_node_put(np); BUG_ON(!iim_base); rev =3D readl(iim_base + MXC_IIMSREV); iounmap(iim_base); diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c index bf70e13bbe9e..1d2893908368 100644 --- a/arch/arm/mach-imx/cpu-imx27.c +++ b/arch/arm/mach-imx/cpu-imx27.c @@ -28,6 +28,7 @@ static int mx27_read_cpu_rev(void) =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm"); ccm_base =3D of_iomap(np, 0); + of_node_put(np); BUG_ON(!ccm_base); /* * now we have access to the IO registers. As we need diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c index b9c24b851d1a..35c544924e50 100644 --- a/arch/arm/mach-imx/cpu-imx31.c +++ b/arch/arm/mach-imx/cpu-imx31.c @@ -39,6 +39,7 @@ static int mx31_read_cpu_rev(void) =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx31-iim"); iim_base =3D of_iomap(np, 0); + of_node_put(np); BUG_ON(!iim_base); =20 /* read SREV register from IIM module */ diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c index 80e7d8ab9f1b..1fe75b39c2d9 100644 --- a/arch/arm/mach-imx/cpu-imx35.c +++ b/arch/arm/mach-imx/cpu-imx35.c @@ -21,6 +21,7 @@ static int mx35_read_cpu_rev(void) =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx35-iim"); iim_base =3D of_iomap(np, 0); + of_node_put(np); BUG_ON(!iim_base); =20 rev =3D imx_readl(iim_base + MXC_IIMSREV); diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index ad56263778f9..a67c89bf155d 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c @@ -28,6 +28,7 @@ static u32 imx5_read_srev_reg(const char *compat) =20 np =3D of_find_compatible_node(NULL, NULL, compat); iim_base =3D of_iomap(np, 0); + of_node_put(np); WARN_ON(!iim_base); =20 srev =3D readl(iim_base + IIM_SREV) & 0xff; --=20 2.32.0