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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id a3-20020adffac3000000b0024245e543absm9012700wrs.88.2022.12.05.05.52.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Dec 2022 05:52:11 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, krzysztof.kozlowski@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, khilman@baylibre.com, linux-gpio@vger.kernel.org Subject: [PATCH v4 3/3] ARM: dts: stm32: Remove the pins-are-numbered property Date: Mon, 5 Dec 2022 14:51:58 +0100 Message-Id: <20221205135158.1842465-4-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221205135158.1842465-1-bero@baylibre.com> References: <20221205135158.1842465-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove the pins-are-numbered property from STM32 DeviceTrees Signed-off-by: Bernhard Rosenkr=C3=A4nzer Reviewed-by: Matthias Brugger --- arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 1 - arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 1 - arch/arm/boot/dts/stm32h743.dtsi | 1 - arch/arm/boot/dts/stm32mp131.dtsi | 1 - arch/arm/boot/dts/stm32mp151.dtsi | 2 -- 5 files changed, 6 deletions(-) diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm= 32f4-pinctrl.dtsi index 500bcc302d422..4523c63475e4c 100644 --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi @@ -51,7 +51,6 @@ pinctrl: pinctrl@40020000 { ranges =3D <0 0x40020000 0x3000>; interrupt-parent =3D <&exti>; st,syscfg =3D <&syscfg 0x8>; - pins-are-numbered; =20 gpioa: gpio@40020000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm= 32f7-pinctrl.dtsi index 8f37aefa73150..c8e6c52fb248e 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -15,7 +15,6 @@ pinctrl: pinctrl@40020000 { ranges =3D <0 0x40020000 0x3000>; interrupt-parent =3D <&exti>; st,syscfg =3D <&syscfg 0x8>; - pins-are-numbered; =20 gpioa: gpio@40020000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743= .dtsi index 28e3deb20e1e1..f30796f7adf36 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -588,7 +588,6 @@ pinctrl: pinctrl@58020000 { ranges =3D <0 0x58020000 0x3000>; interrupt-parent =3D <&exti>; st,syscfg =3D <&syscfg 0x8>; - pins-are-numbered; =20 gpioa: gpio@58020000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp1= 31.dtsi index accc3824f7e98..6b86e031f60e6 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -547,7 +547,6 @@ pinctrl: pinctrl@50002000 { ranges =3D <0 0x50002000 0x8400>; interrupt-parent =3D <&exti>; st,syscfg =3D <&exti 0x60 0xff>; - pins-are-numbered; =20 gpioa: gpio@50002000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp1= 51.dtsi index 5491b6c4dec20..4e437d3f2ed66 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1660,7 +1660,6 @@ pinctrl: pinctrl@50002000 { ranges =3D <0 0x50002000 0xa400>; interrupt-parent =3D <&exti>; st,syscfg =3D <&exti 0x60 0xff>; - pins-are-numbered; =20 gpioa: gpio@50002000 { gpio-controller; @@ -1789,7 +1788,6 @@ pinctrl_z: pinctrl@54004000 { #size-cells =3D <1>; compatible =3D "st,stm32mp157-z-pinctrl"; ranges =3D <0 0x54004000 0x400>; - pins-are-numbered; interrupt-parent =3D <&exti>; st,syscfg =3D <&exti 0x60 0xff>; =20 --=20 2.38.1