From nobody Thu Sep 18 20:20:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46A18C63704 for ; Sun, 4 Dec 2022 17:57:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230442AbiLDR5l (ORCPT ); Sun, 4 Dec 2022 12:57:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230363AbiLDR5A (ORCPT ); Sun, 4 Dec 2022 12:57:00 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44DBC140CD; Sun, 4 Dec 2022 09:57:00 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D5A5260ECE; Sun, 4 Dec 2022 17:56:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFD8EC43470; Sun, 4 Dec 2022 17:56:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176619; bh=u5VhYmq8yWH9O8+BoW4qRUe99SmFaRTC5wB7Se/uBJw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QpYNHilCA78Drqked9tH88Z2nzF/SNRZ+5pLsnrohFdVnwFtu9bdnJSV0FtaAjI1a PSjEyjWDHSUFHy1ZNJl1NK5fT1Dhde5Ksxg6GX1w4lv0PEXz5V5ei0maXQ2AczJ8VK 1fUKovAKk1yaTBUYWKpfphDLSQ/EcjAypQw+bPjx7BzRKN3DKc5m0dJFmJFJx4U2o1 mNel4heiGwd54dMFQWIYve0yacnLxTTmgRTCe1t+t446rn5L4AK4I6PxuiWN+O5RSj iuRPG7SrGqujbaILYtf6njMHGQFRUWsAkZ/yMG7X+3eKJ5diDVVKnQa+/dVdFxIGr1 sUplS2CbdsU1A== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Date: Mon, 5 Dec 2022 01:46:30 +0800 Message-Id: <20221204174632.3677-12-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Switch cpu_relax() from statich branch to the new helper riscv_has_extension_likely() Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner Reviewed-by: Guo Ren --- arch/riscv/include/asm/vdso/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/a= sm/vdso/processor.h index fa70cfe507aa..edf0e25e43d1 100644 --- a/arch/riscv/include/asm/vdso/processor.h +++ b/arch/riscv/include/asm/vdso/processor.h @@ -10,7 +10,7 @@ =20 static inline void cpu_relax(void) { - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAU= SE])) { + if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) { #ifdef __riscv_muldiv int dummy; /* In lieu of a halt instruction, induce a long-latency stall. */ --=20 2.37.2