From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36A21C4321E for ; Thu, 1 Dec 2022 09:30:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230181AbiLAJaQ (ORCPT ); Thu, 1 Dec 2022 04:30:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230005AbiLAJ3z (ORCPT ); Thu, 1 Dec 2022 04:29:55 -0500 X-Greylist: delayed 840 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Thu, 01 Dec 2022 01:29:50 PST Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEFDE4F18C; Thu, 1 Dec 2022 01:29:48 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 3E72424E25C; Thu, 1 Dec 2022 17:02:04 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:04 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:02 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 1/7] dt-bindings: net: snps,dwmac: Add compatible string for dwmac-5.20 version. Date: Thu, 1 Dec 2022 17:02:36 +0800 Message-ID: <20221201090242.2381-2-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add dwmac-5.20 version to snps.dwmac.yaml Signed-off-by: Emil Renner Berthing Signed-off-by: Yanhong Wang --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index 13b984076af5..d8779d3de3d6 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -30,6 +30,7 @@ select: - snps,dwmac-4.10a - snps,dwmac-4.20a - snps,dwmac-5.10a + - snps,dwmac-5.20 - snps,dwxgmac - snps,dwxgmac-2.10 =20 --=20 2.17.1 From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CE49C43217 for ; Thu, 1 Dec 2022 09:30:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230099AbiLAJaJ (ORCPT ); Thu, 1 Dec 2022 04:30:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229997AbiLAJ3y (ORCPT ); Thu, 1 Dec 2022 04:29:54 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF65249095; Thu, 1 Dec 2022 01:29:49 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 2947D24E1F0; Thu, 1 Dec 2022 17:02:05 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:05 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:03 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 2/7] net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string Date: Thu, 1 Dec 2022 17:02:37 +0800 Message-ID: <20221201090242.2381-3-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add "snps,dwmac-5.20" compatible string for 5.20 version that can avoid to define some platform data in the glue layer. Signed-off-by: Emil Renner Berthing Signed-off-by: Yanhong Wang --- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/driver= s/net/ethernet/stmicro/stmmac/stmmac_platform.c index 50f6b4a14be4..cc3b701af802 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -519,7 +519,8 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8= *mac) if (of_device_is_compatible(np, "snps,dwmac-4.00") || of_device_is_compatible(np, "snps,dwmac-4.10a") || of_device_is_compatible(np, "snps,dwmac-4.20a") || - of_device_is_compatible(np, "snps,dwmac-5.10a")) { + of_device_is_compatible(np, "snps,dwmac-5.10a") || + of_device_is_compatible(np, "snps,dwmac-5.20")) { plat->has_gmac4 =3D 1; plat->has_gmac =3D 0; plat->pmt =3D 1; --=20 2.17.1 From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C5DAC47088 for ; Thu, 1 Dec 2022 09:02:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229838AbiLAJCP (ORCPT ); Thu, 1 Dec 2022 04:02:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229658AbiLAJCI (ORCPT ); Thu, 1 Dec 2022 04:02:08 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 433DA31DC4; Thu, 1 Dec 2022 01:02:07 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 1F87A24E0AC; Thu, 1 Dec 2022 17:02:06 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:06 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:04 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 3/7] dt-bindings: net: Add bindings for StarFive dwmac Date: Thu, 1 Dec 2022 17:02:38 +0800 Message-ID: <20221201090242.2381-4-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add bindings for the StarFive dwmac module on the StarFive RISC-V SoCs. Signed-off-by: Yanhong Wang --- .../devicetree/bindings/net/snps,dwmac.yaml | 1 + .../bindings/net/starfive,dwmac-plat.yaml | 106 ++++++++++++++++++ MAINTAINERS | 5 + 3 files changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/starfive,dwmac-pl= at.yaml diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index d8779d3de3d6..13c5928d7170 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -33,6 +33,7 @@ select: - snps,dwmac-5.20 - snps,dwxgmac - snps,dwxgmac-2.10 + - starfive,dwmac =20 # Deprecated - st,spear600-gmac diff --git a/Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml= b/Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml new file mode 100644 index 000000000000..561cf2a713ab --- /dev/null +++ b/Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 StarFive Technology Co., Ltd. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/dwmac-starfive.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: StarFive DWMAC glue layer + +maintainers: + - Yanhong Wang + +select: + properties: + compatible: + contains: + enum: + - starfive,dwmac + required: + - compatible + +allOf: + - $ref: "snps,dwmac.yaml#" + +properties: + compatible: + oneOf: + - items: + - enum: + - starfive,dwmac + - const: snps,dwmac-5.20 + + clocks: + items: + - description: GMAC main clock + - description: GMAC AHB clock + - description: PTP clock + - description: TX clock + - description: GTXC clock + - description: GTX clock + + clock-names: + contains: + enum: + - stmmaceth + - pclk + - ptp_ref + - tx + - gtxc + - gtx + +required: + - compatible + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt =3D <4>; + snps,rd_osr_lmt =3D <4>; + snps,blen =3D <256 128 64 32 0 0 0>; + }; + + gmac0: ethernet@16030000 { + compatible =3D "starfive,dwmac", "snps,dwmac-5.20"; + reg =3D <0x16030000 0x10000>; + clocks =3D <&aoncrg_clk JH7110_AONCLK_GMAC0_AXI>, + <&aoncrg_clk JH7110_AONCLK_GMAC0_AHB>, + <&syscrg_clk JH7110_SYSCLK_GMAC0_PTP>, + <&aoncrg_clk JH7110_AONCLK_GMAC0_TX>, + <&syscrg_clk JH7110_SYSCLK_GMAC0_GTXC>, + <&syscrg_clk JH7110_SYSCLK_GMAC0_GTXCLK>; + clock-names =3D "stmmaceth", + "pclk", + "ptp_ref", + "tx", + "gtxc", + "gtx"; + resets =3D <&aoncrg JH7110_AONRST_GMAC0_AXI>, + <&aoncrg JH7110_AONRST_GMAC0_AHB>; + reset-names =3D "stmmaceth", "ahb"; + interrupts =3D <7>, <6>, <5>; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi"; + phy-mode =3D "rgmii-id"; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <8>; + rx-fifo-depth =3D <2048>; + tx-fifo-depth =3D <2048>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,lpi_en; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a70c1d0f303e..7eaaec8d3b96 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19606,6 +19606,11 @@ F: Documentation/devicetree/bindings/clock/starfiv= e* F: drivers/clk/starfive/ F: include/dt-bindings/clock/starfive* =20 +STARFIVE DWMAC GLUE LAYER +M: Yanhong Wang +S: Maintained +F: Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml + STARFIVE PINCTRL DRIVER M: Emil Renner Berthing M: Jianlong Huang --=20 2.17.1 From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 222EAC43217 for ; Thu, 1 Dec 2022 09:02:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230016AbiLAJCW (ORCPT ); Thu, 1 Dec 2022 04:02:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229914AbiLAJCJ (ORCPT ); Thu, 1 Dec 2022 04:02:09 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CFA748775; Thu, 1 Dec 2022 01:02:08 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 0EF8B24E0B4; Thu, 1 Dec 2022 17:02:07 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:06 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:05 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 4/7] net: phy: motorcomm: Add YT8531 phy support Date: Thu, 1 Dec 2022 17:02:39 +0800 Message-ID: <20221201090242.2381-5-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This adds basic support for the Motorcomm YT8531 Gigabit Ethernet PHY. Signed-off-by: Yanhong Wang --- drivers/net/phy/Kconfig | 3 +- drivers/net/phy/motorcomm.c | 185 ++++++++++++++++++++++++++++++++++++ 2 files changed, 187 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index c57a0262fb64..86399254d9ff 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -258,9 +258,10 @@ config MICROSEMI_PHY =20 config MOTORCOMM_PHY tristate "Motorcomm PHYs" + default SOC_STARFIVE help Enables support for Motorcomm network PHYs. - Currently supports the YT8511 gigabit PHY. + Currently supports the YT8511 and YT8531 gigabit PHYs. =20 config NATIONAL_PHY tristate "National Semiconductor PHYs" diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 7e6ac2c5e27e..7f3e22879399 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -3,13 +3,17 @@ * Driver for Motorcomm PHYs * * Author: Peter Geis + * */ =20 +#include #include #include +#include #include =20 #define PHY_ID_YT8511 0x0000010a +#define PHY_ID_YT8531 0x4f51e91b =20 #define YT8511_PAGE_SELECT 0x1e #define YT8511_PAGE 0x1f @@ -17,6 +21,10 @@ #define YT8511_EXT_DELAY_DRIVE 0x0d #define YT8511_EXT_SLEEP_CTRL 0x27 =20 +#define YTPHY_EXT_SMI_SDS_PHY 0xa000 +#define YTPHY_EXT_CHIP_CONFIG 0xa001 +#define YTPHY_EXT_RGMII_CONFIG1 0xa003 + /* 2b00 25m from pll * 2b01 25m from xtl *default* * 2b10 62.m from pll @@ -38,6 +46,34 @@ #define YT8511_DELAY_FE_TX_EN (0xf << 12) #define YT8511_DELAY_FE_TX_DIS (0x2 << 12) =20 +struct ytphy_reg_field { + char *name; + u32 mask; + u8 dflt; /* Default value */ +}; + +struct ytphy_priv_t { + u32 tx_inverted_1000; + u32 tx_inverted_100; + u32 tx_inverted_10; +}; + +static const struct ytphy_reg_field ytphy_rxtxd_grp[] =3D { + { "rx_delay_sel", GENMASK(13, 10), 0x0 }, + { "tx_delay_sel_fe", GENMASK(7, 4), 0xf }, + { "tx_delay_sel", GENMASK(3, 0), 0x1 } +}; + +static const struct ytphy_reg_field ytphy_txinver_grp[] =3D { + { "tx_inverted_1000", BIT(14), 0x0 }, + { "tx_inverted_100", BIT(14), 0x0 }, + { "tx_inverted_10", BIT(14), 0x0 } +}; + +static const struct ytphy_reg_field ytphy_rxden_grp[] =3D { + { "rxc_dly_en", BIT(8), 0x1 } +}; + static int yt8511_read_page(struct phy_device *phydev) { return __phy_read(phydev, YT8511_PAGE_SELECT); @@ -48,6 +84,33 @@ static int yt8511_write_page(struct phy_device *phydev, = int page) return __phy_write(phydev, YT8511_PAGE_SELECT, page); }; =20 +static int ytphy_read_ext(struct phy_device *phydev, u32 regnum) +{ + int ret; + int val; + + ret =3D __phy_write(phydev, YT8511_PAGE_SELECT, regnum); + if (ret < 0) + return ret; + + val =3D __phy_read(phydev, YT8511_PAGE); + + return val; +} + +static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val) +{ + int ret; + + ret =3D __phy_write(phydev, YT8511_PAGE_SELECT, regnum); + if (ret < 0) + return ret; + + ret =3D __phy_write(phydev, YT8511_PAGE, val); + + return ret; +} + static int yt8511_config_init(struct phy_device *phydev) { int oldpage, ret =3D 0; @@ -111,6 +174,116 @@ static int yt8511_config_init(struct phy_device *phyd= ev) return phy_restore_page(phydev, oldpage, ret); } =20 +static int ytphy_config_init(struct phy_device *phydev) +{ + struct device_node *of_node; + u32 val; + u32 mask; + u32 cfg; + int ret; + int i =3D 0; + + of_node =3D phydev->mdio.dev.of_node; + if (of_node) { + ret =3D of_property_read_u32(of_node, ytphy_rxden_grp[0].name, &cfg); + if (!ret) { + mask =3D ytphy_rxden_grp[0].mask; + val =3D ytphy_read_ext(phydev, YTPHY_EXT_CHIP_CONFIG); + + /* check the cfg overflow or not */ + cfg =3D cfg > mask >> (ffs(mask) - 1) ? mask : cfg; + + val &=3D ~mask; + val |=3D FIELD_PREP(mask, cfg); + ytphy_write_ext(phydev, YTPHY_EXT_CHIP_CONFIG, val); + } + + val =3D ytphy_read_ext(phydev, YTPHY_EXT_RGMII_CONFIG1); + for (i =3D 0; i < ARRAY_SIZE(ytphy_rxtxd_grp); i++) { + ret =3D of_property_read_u32(of_node, ytphy_rxtxd_grp[i].name, &cfg); + if (!ret) { + mask =3D ytphy_rxtxd_grp[i].mask; + + /* check the cfg overflow or not */ + cfg =3D cfg > mask >> (ffs(mask) - 1) ? mask : cfg; + + val &=3D ~mask; + val |=3D cfg << (ffs(mask) - 1); + } + } + return ytphy_write_ext(phydev, YTPHY_EXT_RGMII_CONFIG1, val); + } + + phydev_err(phydev, "Get of node fail\n"); + + return -EINVAL; +} + +static void ytphy_link_change_notify(struct phy_device *phydev) +{ + u32 val; + struct ytphy_priv_t *ytphy_priv =3D phydev->priv; + + if (phydev->speed < 0) + return; + + val =3D ytphy_read_ext(phydev, YTPHY_EXT_RGMII_CONFIG1); + switch (phydev->speed) { + case SPEED_1000: + val &=3D ~ytphy_txinver_grp[0].mask; + val |=3D FIELD_PREP(ytphy_txinver_grp[0].mask, + ytphy_priv->tx_inverted_1000); + break; + + case SPEED_100: + val &=3D ~ytphy_txinver_grp[1].mask; + val |=3D FIELD_PREP(ytphy_txinver_grp[1].mask, + ytphy_priv->tx_inverted_100); + break; + + case SPEED_10: + val &=3D ~ytphy_txinver_grp[2].mask; + val |=3D FIELD_PREP(ytphy_txinver_grp[2].mask, + ytphy_priv->tx_inverted_10); + break; + + default: + break; + } + + ytphy_write_ext(phydev, YTPHY_EXT_RGMII_CONFIG1, val); +} + +static int yt8531_probe(struct phy_device *phydev) +{ + struct ytphy_priv_t *priv; + const struct device_node *of_node; + u32 val; + int ret; + + priv =3D devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + of_node =3D phydev->mdio.dev.of_node; + if (of_node) { + ret =3D of_property_read_u32(of_node, ytphy_txinver_grp[0].name, &val); + if (!ret) + priv->tx_inverted_1000 =3D val; + + ret =3D of_property_read_u32(of_node, ytphy_txinver_grp[1].name, &val); + if (!ret) + priv->tx_inverted_100 =3D val; + + ret =3D of_property_read_u32(of_node, ytphy_txinver_grp[2].name, &val); + if (!ret) + priv->tx_inverted_10 =3D val; + } + phydev->priv =3D priv; + + return 0; +} + static struct phy_driver motorcomm_phy_drvs[] =3D { { PHY_ID_MATCH_EXACT(PHY_ID_YT8511), @@ -120,6 +293,17 @@ static struct phy_driver motorcomm_phy_drvs[] =3D { .resume =3D genphy_resume, .read_page =3D yt8511_read_page, .write_page =3D yt8511_write_page, + }, { + PHY_ID_MATCH_EXACT(PHY_ID_YT8531), + .name =3D "YT8531 Gigabit Ethernet", + .probe =3D yt8531_probe, + .config_init =3D ytphy_config_init, + .read_status =3D genphy_read_status, + .suspend =3D genphy_suspend, + .resume =3D genphy_resume, + .read_page =3D yt8511_read_page, + .write_page =3D yt8511_write_page, + .link_change_notify =3D ytphy_link_change_notify, }, }; =20 @@ -131,6 +315,7 @@ MODULE_LICENSE("GPL"); =20 static const struct mdio_device_id __maybe_unused motorcomm_tbl[] =3D { { PHY_ID_MATCH_EXACT(PHY_ID_YT8511) }, + { PHY_ID_MATCH_EXACT(PHY_ID_YT8531) }, { /* sentinal */ } }; =20 --=20 2.17.1 From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17568C47088 for ; Thu, 1 Dec 2022 09:30:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230142AbiLAJaE (ORCPT ); Thu, 1 Dec 2022 04:30:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229979AbiLAJ3y (ORCPT ); Thu, 1 Dec 2022 04:29:54 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF0744FF86; Thu, 1 Dec 2022 01:29:48 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id E527F24E257; Thu, 1 Dec 2022 17:02:07 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:08 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:06 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 5/7] net: stmmac: Add StarFive dwmac supoort Date: Thu, 1 Dec 2022 17:02:40 +0800 Message-ID: <20221201090242.2381-6-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This adds StarFive dwmac driver support on the StarFive JH7110 SoCs. Signed-off-by: Yanhong Wang --- MAINTAINERS | 1 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../stmicro/stmmac/dwmac-starfive-plat.c | 147 ++++++++++++++++++ 4 files changed, 160 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat= .c diff --git a/MAINTAINERS b/MAINTAINERS index 7eaaec8d3b96..36cb00cf860b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19610,6 +19610,7 @@ STARFIVE DWMAC GLUE LAYER M: Yanhong Wang S: Maintained F: Documentation/devicetree/bindings/net/starfive,dwmac-plat.yaml +F: drivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat.c =20 STARFIVE PINCTRL DRIVER M: Emil Renner Berthing diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethe= rnet/stmicro/stmmac/Kconfig index 31ff35174034..1e29cd3770b9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -235,6 +235,17 @@ config DWMAC_INTEL_PLAT the stmmac device driver. This driver is used for the Intel Keem Bay SoC. =20 +config DWMAC_STARFIVE_PLAT + tristate "StarFive dwmac support" + depends on OF && COMMON_CLK + depends on STMMAC_ETH + default SOC_STARFIVE + help + Support for ethernet controllers on StarFive RISC-V SoCs + + This selects the StarFive platform specific glue layer support for + the stmmac device driver. This driver is used for StarFive RISC-V SoCs. + config DWMAC_VISCONTI tristate "Toshiba Visconti DWMAC support" default ARCH_VISCONTI diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/eth= ernet/stmicro/stmmac/Makefile index d4e12e9ace4f..a63ab0ab5071 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_DWMAC_DWC_QOS_ETH) +=3D dwmac-dwc-qos-eth.o obj-$(CONFIG_DWMAC_INTEL_PLAT) +=3D dwmac-intel-plat.o obj-$(CONFIG_DWMAC_GENERIC) +=3D dwmac-generic.o obj-$(CONFIG_DWMAC_IMX8) +=3D dwmac-imx.o +obj-$(CONFIG_DWMAC_STARFIVE_PLAT) +=3D dwmac-starfive-plat.o obj-$(CONFIG_DWMAC_VISCONTI) +=3D dwmac-visconti.o stmmac-platform-objs:=3D stmmac_platform.o dwmac-altr-socfpga-objs :=3D altr_tse_pcs.o dwmac-socfpga.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat.c b/dr= ivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat.c new file mode 100644 index 000000000000..8fbf584d4e19 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat.c @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * StarFive DWMAC platform driver + * + * Copyright(C) 2022 StarFive Technology Co., Ltd. + * + */ + +#include +#include "stmmac_platform.h" + +struct starfive_dwmac { + struct device *dev; + struct clk *clk_tx; + struct clk *clk_gtx; + struct clk *clk_gtxc; +}; + +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed) +{ + struct starfive_dwmac *dwmac =3D priv; + unsigned long rate; + int err; + + switch (speed) { + case SPEED_1000: + rate =3D 125000000; + break; + case SPEED_100: + rate =3D 25000000; + break; + case SPEED_10: + rate =3D 2500000; + break; + default: + dev_err(dwmac->dev, "invalid speed %u\n", speed); + return; + } + + err =3D clk_set_rate(dwmac->clk_gtx, rate); + if (err) + dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate); +} + +static void dwmac_starfive_clk_disable(void *clk) +{ + clk_disable_unprepare(clk); +} + +static int starfive_eth_plat_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct starfive_dwmac *dwmac; + int err; + + err =3D stmmac_get_platform_resources(pdev, &stmmac_res); + if (err) + return err; + + plat_dat =3D stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) { + dev_err(&pdev->dev, "dt configuration failed\n"); + return PTR_ERR(plat_dat); + } + + dwmac =3D devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL); + if (!dwmac) + return -ENOMEM; + + dwmac->clk_tx =3D devm_clk_get(&pdev->dev, "tx"); + if (IS_ERR(dwmac->clk_tx)) + return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx), + "error getting tx clock\n"); + + err =3D devm_add_action(&pdev->dev, dwmac_starfive_clk_disable, + dwmac->clk_tx); + if (err) + return err; + + err =3D clk_prepare_enable(dwmac->clk_tx); + if (err) + return dev_err_probe(&pdev->dev, err, "error enabling tx clock\n"); + + dwmac->clk_gtx =3D devm_clk_get(&pdev->dev, "gtx"); + if (IS_ERR(dwmac->clk_gtx)) + return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx), + "error getting gtx clock\n"); + + err =3D devm_add_action(&pdev->dev, dwmac_starfive_clk_disable, + dwmac->clk_gtx); + if (err) + return err; + + err =3D clk_prepare_enable(dwmac->clk_gtx); + if (err) + return dev_err_probe(&pdev->dev, err, "error enabling gtx clock\n"); + + dwmac->clk_gtxc =3D devm_clk_get(&pdev->dev, "gtxc"); + if (IS_ERR(dwmac->clk_gtxc)) + return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtxc), + "error getting gtxc clock\n"); + + err =3D devm_add_action(&pdev->dev, dwmac_starfive_clk_disable, + dwmac->clk_gtxc); + if (err) + return err; + + err =3D clk_prepare_enable(dwmac->clk_gtxc); + if (err) + return dev_err_probe(&pdev->dev, err, "error enabling gtxc clock\n"); + + dwmac->dev =3D &pdev->dev; + plat_dat->fix_mac_speed =3D starfive_eth_fix_mac_speed; + plat_dat->init =3D NULL; + plat_dat->bsp_priv =3D dwmac; + plat_dat->dma_cfg->dche =3D true; + + err =3D stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (err) { + stmmac_remove_config_dt(pdev, plat_dat); + return err; + } + + return 0; +} + +static const struct of_device_id starfive_eth_plat_match[] =3D { + {.compatible =3D "starfive,dwmac"}, + { } +}; + +static struct platform_driver starfive_eth_plat_driver =3D { + .probe =3D starfive_eth_plat_probe, + .remove =3D stmmac_pltfr_remove, + .driver =3D { + .name =3D "starfive-eth-plat", + .pm =3D &stmmac_pltfr_pm_ops, + .of_match_table =3D starfive_eth_plat_match, + }, +}; + +module_platform_driver(starfive_eth_plat_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("StarFive DWMAC platform driver"); +MODULE_AUTHOR("Yanhong Wang "); --=20 2.17.1 From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41D7BC43217 for ; Thu, 1 Dec 2022 09:02:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229981AbiLAJCg (ORCPT ); Thu, 1 Dec 2022 04:02:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229959AbiLAJCL (ORCPT ); Thu, 1 Dec 2022 04:02:11 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20E4732B87; Thu, 1 Dec 2022 01:02:10 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id D68DA24E0D6; Thu, 1 Dec 2022 17:02:08 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:08 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:07 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 6/7] riscv: dts: starfive: jh7110: Add ethernet device node Date: Thu, 1 Dec 2022 17:02:41 +0800 Message-ID: <20221201090242.2381-7-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add JH7110 ethernet device node to support gmac driver for the JH7110 RISC-V SoC. Signed-off-by: Yanhong Wang --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 80 ++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts= /starfive/jh7110.dtsi index c22e8f1d2640..97ed5418d91f 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -433,5 +433,85 @@ reg-shift =3D <2>; status =3D "disabled"; }; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt =3D <4>; + snps,rd_osr_lmt =3D <4>; + snps,blen =3D <256 128 64 32 0 0 0>; + }; + + gmac0: ethernet@16030000 { + compatible =3D "starfive,dwmac", "snps,dwmac-5.20"; + reg =3D <0x0 0x16030000 0x0 0x10000>; + clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_AXI>, + <&aoncrg JH7110_AONCLK_GMAC0_AHB>, + <&syscrg JH7110_SYSCLK_GMAC0_PTP>, + <&aoncrg JH7110_AONCLK_GMAC0_TX>, + <&syscrg JH7110_SYSCLK_GMAC0_GTXC>, + <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>; + clock-names =3D "stmmaceth", + "pclk", + "ptp_ref", + "tx", + "gtxc", + "gtx"; + resets =3D <&aoncrg JH7110_AONRST_GMAC0_AXI>, + <&aoncrg JH7110_AONRST_GMAC0_AHB>; + reset-names =3D "stmmaceth", "ahb"; + interrupts =3D <7>, <6>, <5> ; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi"; + phy-mode =3D "rgmii-id"; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <8>; + rx-fifo-depth =3D <2048>; + tx-fifo-depth =3D <2048>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,lpi_en; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + }; + + gmac1: ethernet@16040000 { + compatible =3D "starfive,dwmac", "snps,dwmac-5.20"; + reg =3D <0x0 0x16040000 0x0 0x10000>; + clocks =3D <&syscrg JH7110_SYSCLK_GMAC1_AXI>, + <&syscrg JH7110_SYSCLK_GMAC1_AHB>, + <&syscrg JH7110_SYSCLK_GMAC1_PTP>, + <&syscrg JH7110_SYSCLK_GMAC1_TX>, + <&syscrg JH7110_SYSCLK_GMAC1_GTXC>, + <&syscrg JH7110_SYSCLK_GMAC1_GTXCLK>; + clock-names =3D "stmmaceth", + "pclk", + "ptp_ref", + "tx", + "gtxc", + "gtx"; + resets =3D <&syscrg JH7110_SYSRST_GMAC1_AXI>, + <&syscrg JH7110_SYSRST_GMAC1_AHB>; + reset-names =3D "stmmaceth", "ahb"; + interrupts =3D <78>, <77>, <76> ; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi"; + phy-mode =3D "rgmii-id"; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <8>; + rx-fifo-depth =3D <2048>; + tx-fifo-depth =3D <2048>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,lpi_en; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + }; }; }; --=20 2.17.1 From nobody Thu Sep 18 21:38:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE5B1C47088 for ; Thu, 1 Dec 2022 09:02:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229626AbiLAJCm (ORCPT ); Thu, 1 Dec 2022 04:02:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229966AbiLAJCM (ORCPT ); Thu, 1 Dec 2022 04:02:12 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 275FB4E421; Thu, 1 Dec 2022 01:02:11 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id C011D24E116; Thu, 1 Dec 2022 17:02:09 +0800 (CST) Received: from EXMBX173.cuchost.com (172.16.6.93) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:10 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX173.cuchost.com (172.16.6.93) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 1 Dec 2022 17:02:08 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v1 7/7] riscv: dts: starfive: visionfive-v2: Add phy delay_chain configuration Date: Thu, 1 Dec 2022 17:02:42 +0800 Message-ID: <20221201090242.2381-8-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221201090242.2381-1-yanhong.wang@starfivetech.com> References: <20221201090242.2381-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS065.cuchost.com (172.16.6.25) To EXMBX173.cuchost.com (172.16.6.93) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add phy delay_chain configuration to support motorcomm phy driver for StarFive VisionFive 2 board. Signed-off-by: Yanhong Wang --- .../jh7110-starfive-visionfive-v2.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts index c8946cf3a268..2868ef4c74ef 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts @@ -15,6 +15,8 @@ =20 aliases { serial0 =3D &uart0; + ethernet0=3D&gmac0; + ethernet1=3D&gmac1; }; =20 chosen { @@ -114,3 +116,47 @@ pinctrl-0 =3D <&uart0_pins>; status =3D "okay"; }; + +&gmac0 { + status =3D "okay"; + #address-cells =3D <1>; + #size-cells =3D <0>; + phy-handle =3D <&phy0>; + status =3D "okay"; + mdio0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg =3D <0>; + rxc_dly_en =3D <1>; + tx_delay_sel_fe =3D <5>; + tx_delay_sel =3D <0xa>; + tx_inverted_10 =3D <0x1>; + tx_inverted_100 =3D <0x1>; + tx_inverted_1000 =3D <0x1>; + }; + }; +}; + +&gmac1 { + status =3D "okay"; + #address-cells =3D <1>; + #size-cells =3D <0>; + phy-handle =3D <&phy1>; + status =3D "okay"; + mdio1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + phy1: ethernet-phy@1 { + reg =3D <1>; + tx_delay_sel_fe =3D <5>; + tx_delay_sel =3D <0>; + rxc_dly_en =3D <0>; + tx_inverted_10 =3D <0x1>; + tx_inverted_100 =3D <0x1>; + tx_inverted_1000 =3D <0x0>; + }; + }; +}; --=20 2.17.1