From nobody Fri Sep 19 03:44:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE43AC433FE for ; Tue, 29 Nov 2022 21:09:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236849AbiK2VJg (ORCPT ); Tue, 29 Nov 2022 16:09:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236427AbiK2VJH (ORCPT ); Tue, 29 Nov 2022 16:09:07 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EE94101F2 for ; Tue, 29 Nov 2022 13:09:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669756146; x=1701292146; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aFHPQK+2Oph+JjnPWlBfQ8UflwxbR0mKWG54lIPAftU=; b=Kju5GOzbuX/5maJj+OH88jQB57hEY6ntKq0LAIyDBbn+Ui3z/fd+wvIo 00QKyzaeIrOdmHnRigR7B0nKqLxZo2CZ+6lxuspAABL2+rGvvoFuMa1Nl INTNwc9PIeWmEkI4WKDfKAQX16+ZZew/NSD+BYWujB4gzNXDNyRkkLyyi D+UynJ4oHL4NrSOTnyfGqMOaY63avWzi/zmGuu/EWTPYkTqwA45O5PmOJ p32dSoq6eg29mw5oXt9VsaoB1wvBrsfHUrFpYRCrJv4YnZQ28Xc1cjCAv GbfMxuTF3H5j++EVwazBR41TM20vXIrMm3iVPi9OSd9WJBvBeIxdClQ9L g==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="317083142" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="317083142" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 13:09:05 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="646066216" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="646066216" Received: from araj-ucode.jf.intel.com ([10.23.0.19]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 13:09:04 -0800 From: Ashok Raj To: Borislav Petkov Cc: X86-kernel , LKML Mailing List , Ashok Raj , Dave Hansen , Tony Luck , alison.schofield@intel.com, reinette.chatre@intel.com Subject: [Patch V1 5/7] x86/microcode/intel: Prepare the print_ucode_rev to simply take a rev to print Date: Tue, 29 Nov 2022 13:08:30 -0800 Message-Id: <20221129210832.107850-6-ashok.raj@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221129210832.107850-1-ashok.raj@intel.com> References: <20221129210832.107850-1-ashok.raj@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Instead of passing a struct ucode_cpu_info, just pass the rev to print. Next patch will permit printing old and new revisions after an early update. A subsequent patch will print a message when early loading fails. struct ucode_cpu_info is always the current version in the CPU. When loading fails this is the old rev, when its successfully applied its the new rev. That makes the code bit ugly to read. Remove the struct ucode_cpu_info parameter from print_ucode() and let the caller to pass in the revision number to print. No functional change. Signed-off-by: Ashok Raj Reviewed-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/intel.c | 28 +++++++++------------------ 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index d68b084a17e7..0a4f511e39ea 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -309,10 +309,10 @@ static bool load_builtin_intel_microcode(struct cpio_= data *cp) * Print ucode update info. */ static void -print_ucode_info(struct ucode_cpu_info *uci, unsigned int date) +print_ucode_info(unsigned int new_rev, unsigned int date) { pr_info_once("microcode updated early to revision 0x%x, date =3D %04x-%02= x-%02x\n", - uci->cpu_sig.rev, + new_rev, date & 0xffff, date >> 24, (date >> 16) & 0xff); @@ -332,7 +332,7 @@ void show_ucode_info_early(void) =20 if (delay_ucode_info) { intel_cpu_collect_info(&uci); - print_ucode_info(&uci, current_mc_date); + print_ucode_info(uci.cpu_sig.rev. current_mc_date); delay_ucode_info =3D 0; } } @@ -341,33 +341,23 @@ void show_ucode_info_early(void) * At this point, we can not call printk() yet. Delay printing microcode i= nfo in * show_ucode_info_early() until printk() works. */ -static void print_ucode(struct ucode_cpu_info *uci) +static void print_ucode(int new_rev, int date) { struct microcode_intel *mc; int *delay_ucode_info_p; int *current_mc_date_p; =20 - mc =3D uci->mc; - if (!mc) - return; - delay_ucode_info_p =3D (int *)__pa_nodebug(&delay_ucode_info); current_mc_date_p =3D (int *)__pa_nodebug(¤t_mc_date); =20 *delay_ucode_info_p =3D 1; - *current_mc_date_p =3D mc->hdr.date; + *current_mc_date_p =3D date; } #else =20 -static inline void print_ucode(struct ucode_cpu_info *uci) +static inline void print_ucode(int new_rev, int date) { - struct microcode_intel *mc; - - mc =3D uci->mc; - if (!mc) - return; - - print_ucode_info(uci, mc->hdr.date); + print_ucode_info(new_rev, date); } #endif =20 @@ -407,9 +397,9 @@ static int apply_microcode_early(struct ucode_cpu_info = *uci, bool early) uci->cpu_sig.rev =3D rev; =20 if (early) - print_ucode(uci); + print_ucode(uci->cpu_sig.rev, mc->hdr.date); else - print_ucode_info(uci, mc->hdr.date); + print_ucode_info(uci->cpu_sig.rev, mc->hdr.date); =20 return 0; } --=20 2.34.1