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Mon, 28 Nov 2022 18:34:08 -0800 (PST) Received: from c64.fritz.box ([81.221.122.240]) by smtp.gmail.com with ESMTPSA id a4-20020aa7d744000000b004615f7495e0sm5733817eds.8.2022.11.28.18.34.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Nov 2022 18:34:07 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: devicetree@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, krzysztof.kozlowski@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, khilman@baylibre.com, linux-gpio@vger.kernel.org, linus.walleij@linaro.org Subject: [PATCH v3 5/7] arm64: dts: mediatek: Remove pins-are-numbered property Date: Tue, 29 Nov 2022 03:33:59 +0100 Message-Id: <20221129023401.278780-6-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221129023401.278780-1-bero@baylibre.com> References: <20221129023401.278780-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove the unnecessary pins-are-numbered property from arm64 Mediatek DeviceTrees Signed-off-by: Bernhard Rosenkr=C3=A4nzer Reviewed-by: AngeloGioacchino Del Regno Acked-by: Kevin Hilman --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 1 - arch/arm64/boot/dts/mediatek/mt8167.dtsi | 1 - arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 - arch/arm64/boot/dts/mediatek/mt8173.dtsi | 1 - arch/arm64/boot/dts/mediatek/mt8516.dtsi | 1 - 5 files changed, 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dt= s/mediatek/mt2712e.dtsi index 92212cddd37e6..879dff24dcd3b 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -270,7 +270,6 @@ pio: pinctrl@1000b000 { compatible =3D "mediatek,mt2712-pinctrl"; reg =3D <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap =3D <&syscfg_pctl_a>; - pins-are-numbered; gpio-controller; #gpio-cells =3D <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts= /mediatek/mt8167.dtsi index fbe1a1128cc6a..6a54315cf6502 100644 --- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi @@ -117,7 +117,6 @@ pio: pinctrl@1000b000 { compatible =3D "mediatek,mt8167-pinctrl"; reg =3D <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap =3D <&syscfg_pctl>; - pins-are-numbered; gpio-controller; #gpio-cells =3D <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot= /dts/mediatek/mt8173-elm.dtsi index e21feb85d822b..18e214464a2d3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -929,7 +929,6 @@ clock: mt6397clock { =20 pio6397: pinctrl { compatible =3D "mediatek,mt6397-pinctrl"; - pins-are-numbered; gpio-controller; #gpio-cells =3D <2>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts= /mediatek/mt8173.dtsi index 7640b5158ff9d..c47d7d900f283 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -375,7 +375,6 @@ pio: pinctrl@1000b000 { compatible =3D "mediatek,mt8173-pinctrl"; reg =3D <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap =3D <&syscfg_pctl_a>; - pins-are-numbered; gpio-controller; #gpio-cells =3D <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts= /mediatek/mt8516.dtsi index d1b67c82d7617..118025263a29b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -229,7 +229,6 @@ pio: pinctrl@1000b000 { compatible =3D "mediatek,mt8516-pinctrl"; reg =3D <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap =3D <&syscfg_pctl>; - pins-are-numbered; gpio-controller; #gpio-cells =3D <2>; interrupt-controller; --=20 2.38.1