From nobody Fri Sep 19 05:37:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA078C433FE for ; Mon, 28 Nov 2022 05:50:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229751AbiK1FuA (ORCPT ); Mon, 28 Nov 2022 00:50:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229747AbiK1Ftx (ORCPT ); Mon, 28 Nov 2022 00:49:53 -0500 Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on2058.outbound.protection.outlook.com [40.107.15.58]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3250CBE00; Sun, 27 Nov 2022 21:49:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=L2g4aOsGnZx/vPG9fhFfPwYa+llv5FxMEX6+D7WQrXrCLcJlmX0aQcyfILTwbxs4N8kSIbKJ+/BXjUAHly/q74TowndFoDa4JKOBQX5B8S9AHdiAvmHUWNKCubYxuDayrMPNhqPjLJ6cEsSd2iC8ichz3Ah5+AOEU7lKpmmCWCSE75giEq/cxjbyow4Jk7EXQ2x/3ieytKgtwi4LhQkhfN2mh6EYwq211KP4nP5tTE9pKzopW1wZuMZpHO+rzXN7FD8wf7WT8gtqKbBGJKO+NukLIvjOrsxFxCpjFpgnlCgjWa8RkqFF+NO2h4huFZoL32mwEXH51m11Dyo5/KXhnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gdH3e61WUGMnQzTzPNjZyKhF29vyfTW1EjV9r8NZPco=; b=Urmdidk/DHORXCUFWgV9L62j6imO2vOF4MS0RT3y1gYiF3DMiw+bD2PE8W43A8IEWxIACL+4uOzNwi/K/R+lMjKqHllIogTnhB7mVZT8rjDtsrGKzwbp7t+bfrRtBjexkk7ezPjJtyYLA+OkoL9t7t5+8q4QGXOIrWKBI1dvwhKop/AZ9LWvu6TnloDbCXx4DU2KiDj5sYFhTbNhd4N22IxBuzQYEMMb4gNJntG1s87W5TV53QnR4yeED9b8T2V/XB/XMbcL7Lx+aW/kXgxuacNhVtD2CxOmd/941WDc60lq8n1X+lBOo3MplmIljdYe8iw3DnqiqCKRIqTctEyXyg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=gdH3e61WUGMnQzTzPNjZyKhF29vyfTW1EjV9r8NZPco=; b=rpjOJQDd3+zRddy9qFjcrqCBryhG9MSEXvwfQXAT6SDxSOYPKERKn9+ieJGIUqNiO2+gSzNpZqqZyCsc4pIcvxYtkwsJkgzv9BzHAdXWJgHwXLebIFRNtvWHCdlI6Gx56LXwLMwkI2YZaknniShnPCqlbujuXZ0GmCePGduVBayGbh/wHCL2kp01rGl1roVhqdMIb1uX3A7n8oskD3p6R/q2uJ1aap4uMCkOKAze+SBS7fT2ShHi8v8x9cAT0CMytAZo3s/fE2eJd0GIyUnAO8vRJUuIpRT8U0UwTqCQKvbwabKjEyCm8HjuWUN7hyiftCGlEOIVZuPJpZ5suk+UGQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) by AS8PR04MB7655.eurprd04.prod.outlook.com (2603:10a6:20b:292::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.19; Mon, 28 Nov 2022 05:49:37 +0000 Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5]) by VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5%7]) with mapi id 15.20.5857.023; Mon, 28 Nov 2022 05:49:37 +0000 From: Chester Lin To: Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Rob Herring , Krzysztof Kozlowski Cc: Chester Lin , netdev@vger.kernel.org, s32@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Matthias Brugger , Jan Petrous Subject: [PATCH v2 1/5] dt-bindings: net: snps, dwmac: add NXP S32CC support Date: Mon, 28 Nov 2022 13:49:16 +0800 Message-Id: <20221128054920.2113-2-clin@suse.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221128054920.2113-1-clin@suse.com> References: <20221128054920.2113-1-clin@suse.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: TYCP286CA0144.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:31b::8) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR0402MB3439:EE_|AS8PR04MB7655:EE_ X-MS-Office365-Filtering-Correlation-Id: c6364fc4-c3ec-4107-033d-08dad104557e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jpaavhAZnCEX8rB22Q7P+y01ZSZ1ReWBMfUfm+KWeTnK+QvHq3vd1V2JFmZNtrUJvEiG8rD9T6KXDhCT/P45oXYVAM46wwk4SFc17/8wvtvNj2i0CbvBp6kpcDFrjPZX4o+8VQgL3lYDpY4d61JkIi+wl/Vtkezl9mGEIWYF8GYVqHywOiiXgUZB8pm5S9YkSxNhpIR1rD9XYmBw4asn7+WhWnVPgRARPQprHIiPUZ/ZmdAsR+uNAnxRDovmeooHo82V1tvWMJpfvxgW8XEk64b+1xQudThXlVPYLN3mLte/HPT4HxApK3kTJS5Heuyixd+IDs11y8Pv/w4C68o9AJeiH82NfV8n1zifDh28LiOxuMD/GQKMgUOfoxipwSwdk4LCKEOwQwZWzZjh1pPexg6gkAVy5aFEP+0SQSBSvFdLhINUGiH75bU8eK7SPVs04FInzn5iw/Y1M7bs7DYd4k4yMt3oy+nVoQSf05pDvYpAU3BVG3QQ3bqPa3UmtTbKcyCI+SulO0gdwQah5ex/9yY4WgiXbPmThz7a+KwwU17dw91MkojUtwPjf1GqlF/kw5cCVw9Ca2xb8qFIrHkddIRQK4oqEa3vSbF3FfnvPhuTTfudJKkp2td1OgVjRtOMGHGfMf9eD5SlHeclOw78hg== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR0402MB3439.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(39860400002)(366004)(346002)(136003)(396003)(376002)(451199015)(2616005)(6506007)(6512007)(36756003)(7416002)(1076003)(186003)(5660300002)(54906003)(86362001)(110136005)(66476007)(8676002)(4326008)(66946007)(66556008)(2906002)(41300700001)(38100700002)(316002)(83380400001)(8936002)(478600001)(6486002)(6666004);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?3LC8iTK388pTxMg3MQD5U0BslLZkZSQYJw5AkkUjLPJ5/cS3jCP2+HIKd1Jw?= =?us-ascii?Q?sYB6Alj0yOlzHU91DgLh3e7MVHBZgFgZe2IfbSGNVhjYMopgkw8dvd/22IJ6?= =?us-ascii?Q?TmEgrka6bJW9iE0v5e7EgTrfu/kpt2gHaTQaSw+iq/5YdLpCArGqNHhM/60+?= =?us-ascii?Q?zi8ded6z/gJAAQ8yFRIxIjLOhGzplsL9J2DYR3lf9qQPDZUzDQXsmwJDM4Dw?= =?us-ascii?Q?GOaocAuO/v/159umqw2pxiHtM48P0x0Wks1gLPQr09xlY0f78b9seR42qn2a?= =?us-ascii?Q?HP/980zyRVN/rwMi5Hg5keNk8N+wXcxFpDqLp/mmirJMmUy3T5vNaP5AGLeG?= =?us-ascii?Q?fbfMCwbkFVeVOmOxRo4l++xtc7mZjg97GUbZtMvsnlLYsk8nNCRJZ+WFpZmT?= =?us-ascii?Q?2yXbJ3ooxgpxzQw/f4n6xdRRwtNKkz/l2ISXgMcmnwDe6UgoYEDbQHWM5OXM?= =?us-ascii?Q?ry/4ZuJWl2tZc/8mneYOgbHQbAx3k8+WlKYhheJOdioaUJgYbTWbmrFXIBw9?= =?us-ascii?Q?hmvrtCFqjgN5esdf67zobq8uw2A8FdcMBggvz13ZG4iLRZyP/y9fTpmWzwbv?= =?us-ascii?Q?gsYOgp0yKTevmPg6OcfMzdKwBrW3QxJcVZnU6a00lL/yR8rmq8GdaSF2XE4t?= =?us-ascii?Q?zgrQmFVn+GLfqi2XbhrQF09V88VKRx/o8JlufCvA65i726tvOB6yHskLKNz4?= =?us-ascii?Q?lk6Qkol/4o2ws18VXBRm4v9c2GIYestpWJR6aW0tFYnCzLjI0WbA/+9cObiz?= =?us-ascii?Q?Iz9OzySzfH/5CLxwAAHrCD5XTycb39RtXZwm0jlPPT1xSCi5tYxt045jaopw?= =?us-ascii?Q?0KARzAAWCNY/Y32IxfotqIzf2h80s8/aAYn6Kn4hrsaivJwKGq+RkDLvhr2V?= =?us-ascii?Q?CAlPxDrnq5ivr47o61kaH8Vysi5QT2WC8GytA2mWt+tZiwH3UPMlER0tuVcK?= =?us-ascii?Q?EObT+Ss/H6yr58mvXkFOszSFMsSo/VbcKQu47KCjYPVDfReHlo+zFo53UPF4?= =?us-ascii?Q?r8T8/MrWoDJLCg3XMkyIjgzD1icsxAjo3J7aI9gRXor8L+4u5V1hnvVJMECn?= =?us-ascii?Q?oB4uKx2L8M1SA86J2314Ccpt7NQ0KhximEJQawskxe8HpTrLAlm/sCuXtvJM?= =?us-ascii?Q?EAKW/zC8DvoI2/qEjD2/IGoZxj7E068E22uOv/kCVVg6DgBGSALCTdhxD+1X?= =?us-ascii?Q?X25PdIJB3BTHQtSrYuDDn3izHEJ8A2MhtyhqRVQIZzdSd8rbh/llmdVUUBhm?= =?us-ascii?Q?60D3s9yxk6xXLzMku1G2NWXQRKuXJ+aY6EGicArbrEbhJwFBo5neVGGCaA6E?= =?us-ascii?Q?KURMP+jcRca+xGAlDCpdEj7Snr8sZ35J3W9tqYCGftSBulyQRagd0GFCI/SX?= =?us-ascii?Q?0ITvRTkSfVnVQQ7XV8oUZAUhotA3ubG31mMYaA2fvktWnnU6MHkEfoop1wG+?= =?us-ascii?Q?193+Ea3QvQJXYaXtfSCGlf9Tf2KEoWKxTSqtaZftnaxP88ZrsdWBkgG3R1yw?= =?us-ascii?Q?I3yp9zy90XF6EaNc5Hh1W+lQV/NN/bwkgnEbhCr2sNnNvdg0rOYscjHrXvOD?= =?us-ascii?Q?GMqKBpZjogDguXO1ZkowyeQonxud8dFIwvGiNEKaseoFo1Td+RjbW0Vhi6hc?= =?us-ascii?Q?aNhdMkNw0kL18GjtTZIrBRAmcERwtj2Nx8O9xkE2/wyv?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: c6364fc4-c3ec-4107-033d-08dad104557e X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2022 05:49:37.3554 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /M67qg2EQ/o/wmUMpda+/8+1NLdCqFt+cr0cTBaN4lmU6B93gi3nyD0reePsj35P X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7655 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a new compatible string for NXP S32CC DWMAC glue driver. The maxItems of clock and clock-names need be increased because S32CC has up to 11 clocks for its DWMAC. Signed-off-by: Chester Lin --- No change in v2. Documentation/devicetree/bindings/net/snps,dwmac.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index 13b984076af5..c174d173591e 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -65,6 +65,7 @@ properties: - ingenic,x2000-mac - loongson,ls2k-dwmac - loongson,ls7a-dwmac + - nxp,s32cc-dwmac - renesas,r9a06g032-gmac - renesas,rzn1-gmac - rockchip,px30-gmac @@ -110,7 +111,7 @@ properties: =20 clocks: minItems: 1 - maxItems: 8 + maxItems: 11 additionalItems: true items: - description: GMAC main clock @@ -122,7 +123,7 @@ properties: =20 clock-names: minItems: 1 - maxItems: 8 + maxItems: 11 additionalItems: true contains: enum: --=20 2.37.3 From nobody Fri Sep 19 05:37:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A1AFC4167D for ; Mon, 28 Nov 2022 05:50:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229754AbiK1FuT (ORCPT ); Mon, 28 Nov 2022 00:50:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229683AbiK1FuA (ORCPT ); Mon, 28 Nov 2022 00:50:00 -0500 Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on2087.outbound.protection.outlook.com [40.107.15.87]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5187113F64; Sun, 27 Nov 2022 21:49:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WQp9PXoC5OOcy19E8Z86VgAFjls+H2EIc8G46tpo1ufkzR+k6GyG1tr7DgZt7KjmDtyQlEHmkWU7Biw7u9dTxv0sPc8OCOmK/ZJ1CZ96ezlCBkf6hcv1nBKf5axmKk6QNttJrz1kXB06j30VGuz3rKEzB67OWCzdKJLtDpvlNfhzf9rxSBgVQ2Iv8ST3/ydVsIZXb2eM5M7Lj8Ib/n5/kNuKioS9BoVubnEPiFRsrZAQbCuvJw+k2z9rPwstrpp6sO31NkdJAXs/GGvM7hIn11wrBky1TgzBFuWQM6R2VJmy6Q11q7YW2MJ1QN1Nmu+oYOp6cfr2+yLd25eopXY+uA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=AhXmGvpVPy984cYgkhg8LOOX/aSZ61B1z9C6x92i3Hc=; b=hVpt/lzVlM94MuNDs0iq4ExnbEtxDKGAN4UBok7yDpqEubzJ/WYBpGfi3mpLzTfVooChVt4z946k56Mafj4p/jPQUK+g13JbJBjZ8EZxDO6iT7G3VnmPYLlHS/gYXzVE5DDTxb67f39gKXdU/sqTjiZ5GaH7s4suyXBEpTTOezaDD+Z3uztjb8HmoDMHutx7rxermwe530/iAapMd+XTiek7ofUcVPStpmWXNH1CN16+JZDmAaIpDcEjDbTxZxWncROcFyN0Q4ku4QWVHF1JewfUj+iFERamh8XqPcKGHGYe7Q1SwxkR3fP3F99jOvnP8N3Fs9FEWEohT3taOWxXXQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=AhXmGvpVPy984cYgkhg8LOOX/aSZ61B1z9C6x92i3Hc=; b=3LLJz5WoeCMJWa+c2Q8vZAaEmWBTPRM4kWfiqNQ5NUcElV3LU+ytuHDL3Wqy345xkaqHGRFd3UURnyC4j2hH2KR7EyN4dY46O8vAPcYfPvZMWZekh4h0293YgDGQ1eEqRQ1afIvZeL21+Qha/O8AXZOHjabTIXxf2cNMTuZJywUhlAzs31zi8ysqMK9yGr5JKS8kjguL+A1qTCd91Jf8MSjbRIB3VPb4SX3Nsvn8do24EIDOo0UxJ2b433GdAguv1ZUvgtV5GKujDFI+vSY61Mp4+Aa8apysdVOErx0tYqKYN4QS4Nwj3QNZeZ0XQ681FSC8ZKdUrHfH22Uu13dXlg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) by AS8PR04MB7655.eurprd04.prod.outlook.com (2603:10a6:20b:292::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.19; Mon, 28 Nov 2022 05:49:51 +0000 Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5]) by VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5%7]) with mapi id 15.20.5857.023; Mon, 28 Nov 2022 05:49:51 +0000 From: Chester Lin To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Jan Petrous , Andrew Lunn Cc: Chester Lin , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , netdev@vger.kernel.org, s32@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Matthias Brugger Subject: [PATCH v2 2/5] dt-bindings: net: add schema for NXP S32CC dwmac glue driver Date: Mon, 28 Nov 2022 13:49:17 +0800 Message-Id: <20221128054920.2113-3-clin@suse.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221128054920.2113-1-clin@suse.com> References: <20221128054920.2113-1-clin@suse.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: TYCP286CA0146.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:31b::11) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR0402MB3439:EE_|AS8PR04MB7655:EE_ X-MS-Office365-Filtering-Correlation-Id: f3a04ac4-c047-4de7-c834-08dad1045da8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7t1WENTYLKuiITAQ9eRCK/TpAZbqmFZgbyqFP0bYOmHIoW3/Sa3hyPIT9DD/T8OYKyMIvWFt31GOv2j/YZjgw4GfhL+4LYxLFIGPqOkuOsMNe+HSH2UiXkUPzH22VA/RUqyPRPuPwb8Vf0zAW8qwop0VRC6+KVNsfDmp1KpkCPvMo8H9nd5Pb67eddTpNfBxgoQ07vvQnvBnmmUUh7mH1gvY8yVLD7Gj02hHg43WeDa0g/IVna4fiBvrScDB5x63UJvdjg+Ha6jeLB+JE/1hRflHkMx2/cpArjoDnLcjx5Jemiun3+6KIK6FIhguHzbarouEsYi9IZ6WKq00ozS757NjiVGDCUkWB6ndzf7aGk22oeGDvNfFtPjivJIFyly/3iEGtlNmOGf3b0czvsn49KJNM4K+1+LiO202NSO6XqxjGsZzIG2CEYjqx0fCyFyr5C0rOnRhxH4nmwzZtYL7vQY3KxMaHcav0876hkYMoAuj1l9ow+RvIn7EkDcoYoS1tfOo2c3sUXMU1OFm+5V/+dvEmyY1qawEUaImmHsLLgBemyb89qqgWbbfnWQUL4+YCKAsgZQf10Qu+mNFfZit1ywuQmXBn9hdlBVRY1+u66AZggBa4/G03i4LqCqgmI39d+p4pkiwofm8wVJR5jbQ4PAwXDpMOl2no+rZ7OXOOXY= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR0402MB3439.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(39860400002)(366004)(346002)(136003)(396003)(376002)(451199015)(2616005)(6506007)(6512007)(36756003)(7416002)(1076003)(186003)(5660300002)(54906003)(86362001)(110136005)(66476007)(8676002)(4326008)(66946007)(66556008)(2906002)(41300700001)(38100700002)(316002)(83380400001)(8936002)(478600001)(6486002)(107886003)(6666004);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?VLRxUtXycK94x6kM77Uwc3bkUS3kyXPSqtIQDGFzYUEeQJLUUEbIGNBWYKIP?= =?us-ascii?Q?VHxJKiSeY28lzGoIlAx4ISRMJF08Jf+SVO3N67kSwOH3vmN/eTOdc5+wRYl4?= =?us-ascii?Q?iaiHLdIcmaMZzjnF105SLhu0LvrQqOzUP4Ma7qXxPUgOA5m3LkzqvSmji6XL?= =?us-ascii?Q?PIcC3TzZoCPp+XuWQya3r/lxDHX5r4kr58avhiLprCKRLEbkz6fGM4IJ0yp4?= =?us-ascii?Q?x9hsie6X6M/YV6WJij7UdmANty408ClIwG2b3dJB37HQmAIPuiKhJdYP1EbU?= =?us-ascii?Q?kE/5c8cl9YC8NcG9YARAO0igP4y77N3QL4/7MQZ+b0YuYG6ebkvx5/Ot9oJl?= =?us-ascii?Q?jUn3Pd1HyQVuiQmRqrVk9KO1ztelGxSGi/CyspA7iX1XJkkBADfonoPFl++6?= =?us-ascii?Q?uuxffuHz84TlHEc3XBArc/rwY/gLPkwgQnsk9fadeh/5g6jxiq9u0tpxSn+1?= =?us-ascii?Q?C6fRh+rBrzvomsJ8SSxs4iJvS+dyA6rryDWbN2/GorhkMxJxf5IlMCeGFWJP?= =?us-ascii?Q?qSnyZk3GnjK/ZrXMBKTMmoyy3Qeam9IxflA/YG1XT05jxk2Fowi+7UE4VRM/?= =?us-ascii?Q?DW+6PHA0S83ggMG9P0yySAUXxQtf+bzzRw7u0ITm1XQj7GPZqOKBCHy+mCkb?= =?us-ascii?Q?h9BgUGLbREVQlY3q2Z3gKoNfjr5Egt9dnW9ttQMFUNDY6tQWrsn9QwD+A1u9?= =?us-ascii?Q?kcuaDlDok9w7MirbymT1kJ35dxg+9vitcOkL5MnkC+q8uXE9/GGEu/QWoeEF?= =?us-ascii?Q?4k9O8zHI/luKsAwuWaiC42HMA410aVCA3utbVSU+x/lzilCiVmJfNQ989bma?= =?us-ascii?Q?m0ck8Vy5kWQiWGSV+CWnRhg1pg8lc4oa7V7wnlPzM5Vp36El38VfnZAAxaA/?= =?us-ascii?Q?A7fHbTaY/lx+jO19gzxTMWTn9J2HaVhdxyQmor8+ugAffI5swGCtUONhbJcO?= =?us-ascii?Q?amgZyekZboY1+ioDQkr0SGsz7GgNZRGGVDLSbN/KwtykyhlYtuw54Ga/Pilf?= =?us-ascii?Q?WE1vp1cRLEQg2RLkY8m7Sw/BikfulW7sP1MyL8LHMdkuS7mTwPu8PVzJ/TOl?= =?us-ascii?Q?lncw3u/PyVrcJcVjiBP68IXeP74Jo/SWTpSgFRXMhDe1+uN/VuqiCI7RhyAZ?= =?us-ascii?Q?S4MFHn7PTc605LM7Mqs9hdmtcZQzkUlMx8SRgC/2NoCj4Osk2eD9DGVZP7eV?= =?us-ascii?Q?yAbUi3RqDYC7vgK+KDWApw7Q2DD72HM3I+mnQETgpa8x+o1z2jkhvu5NAmKh?= =?us-ascii?Q?36jbzoUBiToLYDNwEs6ALg8zQ49PB7j/kcSZR7BF8MDWiLeNNwKv0YZAfOVo?= =?us-ascii?Q?61VtUpzp2WAsVfDTf9sJyTl+acJ30z46iAK6bCU82b25RJtanFZdlrqW2reS?= =?us-ascii?Q?4R0/A4zsLBva69cCKM85yAq16qsJDzFg6VLT7AUs1laf5JiGtJQiBjzuCOl8?= =?us-ascii?Q?5c7Pb2VaqVxsWzr5eazqS7MBZrGoU0iSxsSrQHKs/MjEiTrIDjuv8BKsiAus?= =?us-ascii?Q?SEXGFuCibtLAk17g0/JP2gYko1PyNleShYLCFSFMJGtn9N07wwDpfhtKtejQ?= =?us-ascii?Q?nHdyPuPwoEeSAG6UawORmHtZo2dxw+LMWOXrsBom37UQ9Rdbv8i3ARmhP6p2?= =?us-ascii?Q?qU1L7FJM9Mdz7UTWP/Bos8EHPzJOcWOn6dK2C14TVM7H?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: f3a04ac4-c047-4de7-c834-08dad1045da8 X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2022 05:49:51.1200 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zG4gk7q+fFeLbMx7WiBRsW1X0CM4AMkc7C1Eesen0NYWk5EhnpiSNwSzujmVFKPO X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7655 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the DT schema for the DWMAC Ethernet controller on NXP S32 Common Chassis. Signed-off-by: Jan Petrous Signed-off-by: Chester Lin --- Changes in v2: - Fix schema issues. - Add minItems to clocks & clock-names. - Replace all sgmii/SGMII terms with pcs/PCS. .../bindings/net/nxp,s32cc-dwmac.yaml | 135 ++++++++++++++++++ 1 file changed, 135 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.y= aml diff --git a/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml b/D= ocumentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml new file mode 100644 index 000000000000..c6839fd3df40 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2021-2022 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/nxp,s32cc-dwmac.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: NXP S32CC DWMAC Ethernet controller + +maintainers: + - Jan Petrous + - Chester Lin + +allOf: + - $ref: "snps,dwmac.yaml#" + +properties: + compatible: + enum: + - nxp,s32cc-dwmac + + reg: + items: + - description: Main GMAC registers + - description: S32 MAC control registers + + dma-coherent: true + + clocks: + minItems: 5 + items: + - description: Main GMAC clock + - description: Peripheral registers clock + - description: Transmit PCS clock + - description: Transmit RGMII clock + - description: Transmit RMII clock + - description: Transmit MII clock + - description: Receive PCS clock + - description: Receive RGMII clock + - description: Receive RMII clock + - description: Receive MII clock + - description: + PTP reference clock. This clock is used for programming the + Timestamp Addend Register. If not passed then the system + clock will be used. + + clock-names: + minItems: 5 + items: + - const: stmmaceth + - const: pclk + - const: tx_pcs + - const: tx_rgmii + - const: tx_rmii + - const: tx_mii + - const: rx_pcs + - const: rx_rgmii + - const: rx_rmii + - const: rx_mii + - const: ptp_ref + + tx-fifo-depth: + const: 20480 + + rx-fifo-depth: + const: 20480 + +required: + - compatible + - reg + - tx-fifo-depth + - rx-fifo-depth + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + #define S32GEN1_SCMI_CLK_GMAC0_AXI + #define S32GEN1_SCMI_CLK_GMAC0_TX_PCS + #define S32GEN1_SCMI_CLK_GMAC0_TX_RGMII + #define S32GEN1_SCMI_CLK_GMAC0_TX_RMII + #define S32GEN1_SCMI_CLK_GMAC0_TX_MII + #define S32GEN1_SCMI_CLK_GMAC0_RX_PCS + #define S32GEN1_SCMI_CLK_GMAC0_RX_RGMII + #define S32GEN1_SCMI_CLK_GMAC0_RX_RMII + #define S32GEN1_SCMI_CLK_GMAC0_RX_MII + #define S32GEN1_SCMI_CLK_GMAC0_TS + + soc { + #address-cells =3D <1>; + #size-cells =3D <1>; + + gmac0: ethernet@4033c000 { + compatible =3D "nxp,s32cc-dwmac"; + reg =3D <0x4033c000 0x2000>, /* gmac IP */ + <0x4007C004 0x4>; /* S32 CTRL_STS reg */ + interrupt-parent =3D <&gic>; + interrupts =3D ; + interrupt-names =3D "macirq"; + phy-mode =3D "rgmii-id"; + tx-fifo-depth =3D <20480>; + rx-fifo-depth =3D <20480>; + dma-coherent; + clocks =3D <&clks S32GEN1_SCMI_CLK_GMAC0_AXI>, + <&clks S32GEN1_SCMI_CLK_GMAC0_AXI>, + <&clks S32GEN1_SCMI_CLK_GMAC0_TX_PCS>, + <&clks S32GEN1_SCMI_CLK_GMAC0_TX_RGMII>, + <&clks S32GEN1_SCMI_CLK_GMAC0_TX_RMII>, + <&clks S32GEN1_SCMI_CLK_GMAC0_TX_MII>, + <&clks S32GEN1_SCMI_CLK_GMAC0_RX_PCS>, + <&clks S32GEN1_SCMI_CLK_GMAC0_RX_RGMII>, + <&clks S32GEN1_SCMI_CLK_GMAC0_RX_RMII>, + <&clks S32GEN1_SCMI_CLK_GMAC0_RX_MII>, + <&clks S32GEN1_SCMI_CLK_GMAC0_TS>; + clock-names =3D "stmmaceth", "pclk", + "tx_pcs", "tx_rgmii", "tx_rmii", "tx_mii", + "rx_pcs", "rx_rgmii", "rx_rmii", "rx_mii", + "ptp_ref"; + + gmac0_mdio: mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + ethernet-phy@4 { + reg =3D <0x04>; + }; + }; + }; + }; --=20 2.37.3 From nobody Fri Sep 19 05:37:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15EE6C4321E for ; Mon, 28 Nov 2022 05:50:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229810AbiK1Fuf (ORCPT ); Mon, 28 Nov 2022 00:50:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229762AbiK1FuN (ORCPT ); Mon, 28 Nov 2022 00:50:13 -0500 Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on2087.outbound.protection.outlook.com [40.107.15.87]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D103F13F6C; Sun, 27 Nov 2022 21:50:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AT4CsmJTvzA6XlFHD45EuTi8+htFW6f4OreuHd5hM0NX641QHtMtAhMy0vS0TgCmFPgA/QfQasR2ckXPCVXvEul/+vsVbMlFrtGDNJ9qLVdH4bPFuIKcSCSDpvTSud9nAZEghnXEZrkWgtrE7sljYUlHAzov+fcKkwUlzJC7p3cfcE4VTbJ3K3vqTJZi8iF+dZJ83yUnKuiierPWb39cnTEbgL+z2FuUwcu1idZrmkwFxd5h5wX06TfdTIC/dEUAS3GjLN5+eDfzJT6EpFPTQzMQ2usBwCXERTsEhlOPBA5Yzy5vCrKpDAQ5zO7/jBPc/gOqN8XwzgbDwLJ3GLEh+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=wajpRa4Qc6kFuPthEyUrYcTrYe+ifTJ1u2fYtSyGHyg=; b=eLl4F8fjWeAJAuGs0QGeV12pxZRdmc9dY+GQg1Pmt+IcB6ZA5NzYHgI6ElfIus+ZkhdndNi3t5JWK23Ae3dA+TZbYdeN0zEym4QCVLvNCnpT0cDt1qT4bCeB8eMZLXfc9zM9PX5mD3IbuHB3vtPsccQbYl6lfQyxeL5YZ7pe7WmNKvL1XxFMh0KDh91dSDwcp+EC7Kc7n1E2FY1piNXWqsyNwySeP3LsD8lOM8U+iTrj06spPaWwNHfTN/R8o7lXvHxRMgazNNYe2w0YAtoIJ9qQYu55JQXn26MjltJT2ldaB1GEJMhc8Y+poaZigdNy+uk+bBfaKE3gMZH/X5RhUw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=wajpRa4Qc6kFuPthEyUrYcTrYe+ifTJ1u2fYtSyGHyg=; b=ltSqnC9qRsbolxXrEaz1mnJ4bs3fnY9kx3I4xaCYEqfcqA6I00Rr7Y+DoXmd1XIP7w/aemlROU1Ddsoiksm1FkN3iEZb5db36liLExs7J9e5MfdmoomqW/diAkZKbIDHYbhQqm7AsHNPW8AF00aGIICaP6elWB5oLsQMmwba0zUpXbPA8/qDk59kxfKbKrIWIJdSk7dSnalsCM61HfhAXKgLPCWhn1FL+THI67V3NadpAQd4WN5MnMkqI+JlaWhN7HZtCrjBw4XN9bdUstnP8hgTtxSntFFZ/a6WCk58FhTO1B77arV0pf+ZSXM71huZsxTVwgFG7OCeyVl1o5x4+A== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) by AS8PR04MB7655.eurprd04.prod.outlook.com (2603:10a6:20b:292::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.19; Mon, 28 Nov 2022 05:50:00 +0000 Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5]) by VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5%7]) with mapi id 15.20.5857.023; Mon, 28 Nov 2022 05:49:59 +0000 From: Chester Lin To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: Chester Lin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jan Petrous , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Matthias Brugger Subject: [PATCH v2 3/5] net: stmmac: Add CSR clock 500Mhz/800Mhz support Date: Mon, 28 Nov 2022 13:49:18 +0800 Message-Id: <20221128054920.2113-4-clin@suse.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221128054920.2113-1-clin@suse.com> References: <20221128054920.2113-1-clin@suse.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: TYCP286CA0140.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:31b::14) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR0402MB3439:EE_|AS8PR04MB7655:EE_ X-MS-Office365-Filtering-Correlation-Id: 6816db6f-9985-47ab-34fb-08dad10462e2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: e0hgLt4fm3GPA2dgvwTafcAYBBvc5aMsSTvtddOYAdzNTqwFBMlo3MEPYUfBRbybS0fIQG7MkV7XAiSQb6Bk/j0O+wu0aVJNcCBnD6/oYNPe0+rBZVFdsZjPFxg6PwMW5lKdS812tSGDm4fwV73e7VDDHIjQY3cE1tsOxUeZp6pPKh8RlIZRNckXkuRtU4miYligHnhaDwHstPbTvBMWRxYL1EzJu9gKakKIYG6D++vI/xMDwdSuOyK2XkT5UiDaFFGXBEDYK5QsfwZq+HiN4oGu9JEs3plA/az7j/HLi5r25y4v3jrnNmSrozQQBoc/KKifogOUJftrt5VoksyE9zJq+ZoP4zSSTlC3LCORhkD0G3M43hrjGhIUQnISJkDqJ9NaJDcV5n7ACqseKG/8SaDLVTuo3zXfe85XHKzgZTs7hgU5HkdevesSHytR2dNI93HC6O6L7BpeFNXdgYZp3be9zKjOypCqG+nuck2okiH/DKeZj2pI55Ra47PvVK0v22IhQOtQiNEFTaQuLp7Zb8s8iNlU4UZc73NYYf2NdEkCN7TxI5EoC8oas8cJAXcmxas1XKRO5+XLU5pZ6UPzBi771LsF5OAG6mgkN0/ODk6HoNW4HpY6iKSOf8QLhLnubhhW9aByOap7cHHa8Rc2zQ== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR0402MB3439.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(39860400002)(366004)(346002)(136003)(396003)(376002)(451199015)(2616005)(6506007)(6512007)(36756003)(7416002)(1076003)(186003)(5660300002)(54906003)(86362001)(110136005)(66476007)(8676002)(4326008)(66946007)(66556008)(2906002)(41300700001)(38100700002)(316002)(83380400001)(8936002)(478600001)(6486002)(107886003)(6666004);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?HST9Y8B9d+fq1D1c1KxS5gzzMpmBJFWyC6480mDF/dBhEJAxwm9X0hIn690G?= =?us-ascii?Q?QUqJwLy0saJpqDXV1b5U1ROLS/N3jaqFZVmJDNb+q4/X6DYeXLg69zgf6d04?= =?us-ascii?Q?slgfTceNDQxueWOqozKar082wjYsKZ49DY1YzNy8z62XM7Y+sjM3qh6SfCmz?= =?us-ascii?Q?1EpnTJl45w3w2jGzUZFBo3m9qsWUrvB11Yi3Ty9cdhGp+XhnRM3118J5c13I?= =?us-ascii?Q?xbux+W8sMiJvznl63UzcPjmODwqx/9h5Bdu9TZBafMpRRYlzGoPkpp67R8WW?= =?us-ascii?Q?F9kKyhgHmoNFfLHwVgS2mPHhxn8M96FEzKGva3xs0WxCgmeEaGm0ieSYEUgv?= =?us-ascii?Q?s+2cOgEYtK8BTswmlaHbx41F/6ccT1fiKYHAjbsN0JW/kgz4urxtExR2lwE8?= =?us-ascii?Q?6UqxTVmGwg3Yj2OjEs5P2etVIx1AQp1aG+7bDa+spT1OPFeJalh0QTzfWE3h?= =?us-ascii?Q?zLDIH53282BoeI7MkLPe8xR67Fvb5GQ0Nw9pKOea9joD8d2PJNo66A/I+kcZ?= =?us-ascii?Q?MNF99sIlAscuEI61GnnBt1OPBXOHc+B/jI0wrI19DRqHo9Xvkcxs8BHZRLVW?= =?us-ascii?Q?pjDNwzzn9YSqtStjFfSf/fdKyiMapNvzHqoX0bikPtg8pzlxLMnFyaEghHg5?= =?us-ascii?Q?eNYTGtMjLjsSFzN/KKsyNmQXn++NIvV3ianVTfwjABujifM97GLJ34Z9l9Os?= =?us-ascii?Q?k7whiQny6qa08kTFFgj+S8L6t2apXeAU92AabDsL1o9Qqm/pYVc80RoZmBLr?= =?us-ascii?Q?KClR2/S5oqL545WBOBiRzWAfv7PHu8xttdrHhL1x3547nT/elITnkYxH6nsd?= =?us-ascii?Q?DfAe/fe6nufTBkLN7Nb/KNIaP1wJ0LDhsJt69UCLO2M7YZ6dikdz2S1/pwaQ?= =?us-ascii?Q?Nug1DiT5osWptaci+zQ+jsze7lFK6pRdy+Aim6JWeW7WD5SoCYRAXdEbwlOr?= =?us-ascii?Q?ERC8VKAl4cxW16Lz/xgob2ZEI+DA6MBcfl8DWQ7t0W72+SC78RMm+4A07JIo?= =?us-ascii?Q?NOzSAlas+xmR5w/AOMdumC8T67keIOlxBontWDDQRI6lOOJ+Z0MdMXW78lJU?= =?us-ascii?Q?1O6RLC6k+CpEaIVsmdTkLR3WzXRSSp2TUI7L5R2NwV5ayE/lKRkfbRq8FUCh?= =?us-ascii?Q?I/5aGdS8QTpOYY91JtjKHsaU4enWu7EClVZpv3eGGK00joaRPJnMmLlCBEr7?= =?us-ascii?Q?kQ0KWuuBKlZ96EvFVSYokseTsl31KlRD0zJ3x/+SdB/RDKIq2f6ejbegEKAA?= =?us-ascii?Q?i+aFDpP4gkPBQvJlq60uFKLcS94GqiA8k66sKoSwy8lPkvrlrlEsfrXTNQfw?= =?us-ascii?Q?wt1MMby5TKjIyyLkS3W0Xmnm8lThHUq4gBaEXCP+mld23OpwXwefr1uvI8ss?= =?us-ascii?Q?Wy88cSE3vecgLOZ7/6/gHC8ttH/0QM6mvJErqGd27vuhi8tJUpHHOrUy6aA4?= =?us-ascii?Q?Evn/pG6ZI75cufHxpifbSoutPwUNLT5zxq8FR9xrzfu1nicUasJH9KbV7l6U?= =?us-ascii?Q?BoG0E6JQjyWvPL6rKogZvMrMHXPWDsAA1FkAcS2pDNW+AL7GoSMvGrcG5IX0?= =?us-ascii?Q?+VtHTxoHEeXM+Km7UBi8/c16n3+E6tipo48z8GHfPj8EiuQ2HiXxqFEzk3+j?= =?us-ascii?Q?Ky8zsSktCfI6fiHCiPI0YlgUz7mU+3PeYy8zG6BoY99Y?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6816db6f-9985-47ab-34fb-08dad10462e2 X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2022 05:49:59.9006 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /NbwEZ+JTQZbPnBlN4yQ7LdtGzdj6fnGC7/isGZQzWhdCMWwhREPvm6ZIG3HtuJP X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7655 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add additional 500Mhz/800Mhz CSR clock ranges since NXP S32CC DWMAC can support higher frequencies. Signed-off-by: Jan Petrous Signed-off-by: Chester Lin --- No change in v2. drivers/net/ethernet/stmicro/stmmac/common.h | 2 ++ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++++ include/linux/stmmac.h | 2 ++ 3 files changed, 8 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/eth= ernet/stmicro/stmmac/common.h index 6b5d96bced47..5b7e8cc70439 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -222,6 +222,8 @@ struct stmmac_safety_stats { #define CSR_F_150M 150000000 #define CSR_F_250M 250000000 #define CSR_F_300M 300000000 +#define CSR_F_500M 500000000 +#define CSR_F_800M 800000000 =20 #define MAC_CSR_H_FRQ_MASK 0x20 =20 diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/ne= t/ethernet/stmicro/stmmac/stmmac_main.c index 6b43da78cdf0..ff0b32c9e748 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -323,6 +323,10 @@ static void stmmac_clk_csr_set(struct stmmac_priv *pri= v) priv->clk_csr =3D STMMAC_CSR_150_250M; else if ((clk_rate >=3D CSR_F_250M) && (clk_rate <=3D CSR_F_300M)) priv->clk_csr =3D STMMAC_CSR_250_300M; + else if ((clk_rate >=3D CSR_F_300M) && (clk_rate < CSR_F_500M)) + priv->clk_csr =3D STMMAC_CSR_300_500M; + else if ((clk_rate >=3D CSR_F_500M) && (clk_rate < CSR_F_800M)) + priv->clk_csr =3D STMMAC_CSR_500_800M; } =20 if (priv->plat->has_sun8i) { diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index fb2e88614f5d..307980c808f7 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -34,6 +34,8 @@ #define STMMAC_CSR_35_60M 0x3 /* MDC =3D clk_scr_i/26 */ #define STMMAC_CSR_150_250M 0x4 /* MDC =3D clk_scr_i/102 */ #define STMMAC_CSR_250_300M 0x5 /* MDC =3D clk_scr_i/122 */ +#define STMMAC_CSR_300_500M 0x6 /* MDC =3D clk_scr_i/204 */ +#define STMMAC_CSR_500_800M 0x7 /* MDC =3D clk_scr_i/324 */ =20 /* MTL algorithms identifiers */ #define MTL_TX_ALGORITHM_WRR 0x0 --=20 2.37.3 From nobody Fri Sep 19 05:37:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EE99C4321E for ; Mon, 28 Nov 2022 05:50:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229807AbiK1Fuy (ORCPT ); Mon, 28 Nov 2022 00:50:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229799AbiK1Fuc (ORCPT ); Mon, 28 Nov 2022 00:50:32 -0500 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2067.outbound.protection.outlook.com [40.107.6.67]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73ED413FA2; Sun, 27 Nov 2022 21:50:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ayFqnaSbW659vP5nxAGbf+jLQT/tG96zWkorNhQ2E9RE59P9kKeagVGcIIDn4hVgwuXmTVimqBvVjFJxZAScg2WjNrry7VDuAguyYsFnwhrLlObtcspozZRl4PABkKpFgvsQrXLrnc/TxS2H6u92tOaNU7DQyVllRnzan67irVoIwM3bNo5PjWqc9IrirAAGvEIoXAT8oqGeG0ORqsaq7v99kYEfeQRflPPfXQYzqE5k0eYLVr8bo1dobx8cEO6XzePYLuq/b7ZpQMNfkIQFCpfK8CSXUmafrdbc81bxAu3/lGXzRl5nlVo6X95aKttcE+RYfJFkFPrczdF73emc7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HkDOhglruLbaI4B2k6tVB0L289fbs1TQ/155LSXUMgs=; b=GUhZn5O9XVSuIL5NLBESsgKIfGx6cwNzrI5N6hOdcNtOHJcLUjtuo0O6/ID2ht2RV7ng7dy96Z7kaXhs6nwX/B2fl7pwJQen17Jp6b8Clrba7NGzSQm+PiWJKqpzIagHcDDt+u1qr27VlWUQHWWlaS0E21RFUPBYutdgaHaXAe22Ekhp9W/MIJn/s0rWZ+TTDdWBJ8xiIHIsc04bmuJC9jsF1ntoSj7nL6yQEn1qPZrxaUIBYBzhh7wed/xRvCQHsDnmxz3wtOppjZABn0kRizSN8rRZ1pgkW0jt4c0GT6FhrZZfMpOZnTCtkEm88vGwcok1yNAFItZqBDYdXITbQg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HkDOhglruLbaI4B2k6tVB0L289fbs1TQ/155LSXUMgs=; b=qA50qQ4xDFdGw+4ku6//ABSx3YXv14WMsVgzTv2xrSWvOUh5UU4XgFC7VufrFmAwGGVaISfozajOybDTy/Hc8ucnNXmCFYQt1ux5Ql0Dqv0Rk/yUsocqf5pG8mjh3SBgx7QRFpq1I6yM4XuMMkRJn/NV2YUcZvREn4+9IJNfgv+Edh0LNs0jGdZG4NC4Bn3CpjDGQeihn4V50ok1aNgbpxd59tV4PLgINFecVLruiKi6oOytd9aE/4HlG9Hz/IgOISPyH17m90z5oKEFS/UPjhDJBup0F+UCdI4fapMFR7QBx1KHSfmMfQYRnrr4JXoa3dFYtOnRNYlrtlU5jR6oKA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) by DB9PR04MB8478.eurprd04.prod.outlook.com (2603:10a6:10:2c4::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.20; Mon, 28 Nov 2022 05:50:09 +0000 Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5]) by VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5%7]) with mapi id 15.20.5857.023; Mon, 28 Nov 2022 05:50:09 +0000 From: Chester Lin To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: Chester Lin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jan Petrous , Ondrej Spacek , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Matthias Brugger Subject: [PATCH v2 4/5] net: stmmac: Add AXI4 ACE control support Date: Mon, 28 Nov 2022 13:49:19 +0800 Message-Id: <20221128054920.2113-5-clin@suse.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221128054920.2113-1-clin@suse.com> References: <20221128054920.2113-1-clin@suse.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: TYCP286CA0149.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:31b::12) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR0402MB3439:EE_|DB9PR04MB8478:EE_ X-MS-Office365-Filtering-Correlation-Id: 98e70168-8010-4e0d-8305-08dad10468c2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: es0T2H5hZI1uNxP68OcqR4kOeO5PdnkXbvwPCNJUap1gcUnBNgjtiWcWxOEEfFW+YXnm0XfmJOXGH62z3zJHAnPwG9omXUPeq5vwdjGDjVTsHJUGywuPdaleGLG/gPI1uk0jAhCCbd0jdSbfiah12Tko1wdTWDXZZ4/kLpkInwwCe+TOWepKXQZH/o9vXHrsjtAxTqjnn0WhnNkdMlmOxWEUqsGog8Iww6WdUzOQ6U5YBY04YcQ5F/B7Vbb/xpDpNtHJYNC9liRkkSJscsy7ckz4VRwVV5xjeAGJZd6k5yVzi7vlwdTBse9LoZpsxF9EpT3tR/jk3D220uaqY2dWLxn6uBvzaKBE6gVrOlF8dq3rNOca0NV0u+MZAzm4IIcBdOen7up19erURkLsKZuBfZrhyHXigXypXB0ac1aQkIWzpkdD9uSZFz6rRuo/YO4+lZG7tv3R015x56kcDHrcMs15wxR6RbOgPPXSvietol4EdxNdnydkYI0wO4p9PxdzlkDTy2WVxwqNUoNkWwieKhgOWb5veMr+kowW+rdnUqDg5cK/wDsmvi2TgsqiTNWg75lMLK8NbaWLBuhTb5mAOPMiOcw726JM4bgCAKpsitJcsmGpMyQWjko0haQw2OTP8ccZu38/rGkhQol/pyMbTQ== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR0402MB3439.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(346002)(39860400002)(376002)(396003)(366004)(136003)(451199015)(107886003)(2906002)(186003)(6486002)(6506007)(36756003)(478600001)(6666004)(6512007)(1076003)(38100700002)(86362001)(83380400001)(2616005)(41300700001)(66556008)(66476007)(8676002)(66946007)(5660300002)(4326008)(7416002)(8936002)(54906003)(316002)(110136005);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?g/2SbFArYs7ZHsJR1Jr1g+YyvNTYcZtfc64Zndr0ETMp8mJJIucYQ/mhRG/f?= =?us-ascii?Q?VNggn+f9vw479X4wlfIInJin9YPkLEQO0hRw67xJ1rSynElvowhVqo6/aJZj?= =?us-ascii?Q?kxBCzrmp8N9OfgyP0Qz+iZqGdjrXnkVnnkzX2LH7z4JNVNKLjKA+0RBBRvCC?= =?us-ascii?Q?Ajrth57OkjGP1tMrG4PnBJ5rZ+pDzkPwyN7ZMe69+HncJStMA37jcIL6oMYi?= =?us-ascii?Q?8MyXdlRkIJ00MjjAdXJog7mffdSmEzoFmOgD6EG74YC+/UWnVDcO/hU19PcT?= =?us-ascii?Q?mH7stm60d3mb6tykSSO6WO3TC2aSRwEWJibqGIS4AnJz6WwiHiK6SP8FccV+?= =?us-ascii?Q?wxwXOuneiMnJEX4mWFRXvLUXX2JeCac7jQoEbNGBNdMPBj04L0VBSfC1EFix?= =?us-ascii?Q?07Y8BWLb3dyd4onpPuyWyFPTYjZddk7l8Y0iuUBfPuCUMBbTe9ld11h4FEeJ?= =?us-ascii?Q?9ZS7azTDO57yPuBavCIELY8LD+Cv204Kksm0EdCD2Wsi/z9D9FogDeRX25y2?= =?us-ascii?Q?J5aD9aOGDOq9hBHhr2FR6rFZ77aVBGCWRm2OH4lHBvAy445R4FOlrEAyEkxC?= =?us-ascii?Q?V3DjMmSAVhHjH1c3cPJ2Fw8hOL8FgezkE2QFWF4F9VkJVa6A05A0nQ+MCXZ9?= =?us-ascii?Q?OZAaN7qO5wwxIAj5AXP4bkp8PqNJwbBBuxFDarZGC4hn+c5J9SsY8OdrSsif?= =?us-ascii?Q?Uf0XG/yPlw900whih0ZBzaFDNaC17IWgglzgUUvlWUzDIatZ/XnBwnT7Xmq3?= =?us-ascii?Q?MrPUphAtT5AG2rsdqYhJXcjg3eWewaU/VNFYrl/pcbYrWDMELBaF2Au6h9HX?= =?us-ascii?Q?1xe2lbZpzVWqP/903QAYiZkLSx2NaDYiBl1kwF6ri5blYMLGDfoD808hcBvI?= =?us-ascii?Q?Z6KTNc1TIQ1CcWnckk20Ptfk3Gj9Y2CNr1fUi7VpoTA63DUosCN68VXXP+Al?= =?us-ascii?Q?VmQxin9Uqp4rxNtAU92scC2Bg9zaz9/k6LqqpXgvXBbD5sDC0tAlBUaiMLcp?= =?us-ascii?Q?OhjcgOlXrru4XLwhrcyT5zRCsZ3tpRFfUHnl6LdN+WZXSnQuixOl2Jv/Inal?= =?us-ascii?Q?MlvVkuVw2fzH6nhtnl7rZqGVDDEeq+8B0T4jqBedrasRrM5/Ijz0SQyPO2mS?= =?us-ascii?Q?Jem8o2r2pBfSsPn/HRfltm6ODA2tNPE5yfVWjKiyaJ+kRIPkFg/KM4hdHYkd?= =?us-ascii?Q?8QpmjxIOW/X8ic4rH/+2NJMHQpngBj1pkIPAS/LQweaEpjAKShgQ3AVdX1Ew?= =?us-ascii?Q?Mfhiov89lZQvvKsdmR69GxvW85adZ9mVq9KFhMoZDry4uCcw4oHMqCzeBo4s?= =?us-ascii?Q?B43DNTtT8f+ewOvZCnCUvUbyDLZ8d4tbuyK+vqA3xcg/B5NLe3mmQx88ez55?= =?us-ascii?Q?9SJLbrE0RZlcOZwUADWNmjOvC7syUcZ4l3PnzNC2C/2todlpoSKxqZjHXrA/?= =?us-ascii?Q?bJRQEYosIZMoT5P1jBvV8CI/QyrjVq51OcnTJpuytahv89g50w8GstTtnblE?= =?us-ascii?Q?/Jb8zrm7YlW1lnO+WaHokDImDODiYDeK5iHPlwllxZEnVoKPWpekw7jgjh8K?= =?us-ascii?Q?ldeqvaEvrtqtj6mHCJgmz1KrPynsztxDzEzRao6AHAcg28z/oDy4VXCPk5/U?= =?us-ascii?Q?n4ogIV0Hu/o0xdDBiJ1fo8qfMA02ZWIs4a3eiHPnfgXx?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 98e70168-8010-4e0d-8305-08dad10468c2 X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2022 05:50:09.5248 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 85FTrveBljd6zONY/cRkKhhGcqMwri8Nbf6XhHA/z6ftzY1+svbJJjt5HN0WrK9z X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB8478 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add AXI4 cache coherency control in dwmac4 DMA core. Signed-off-by: Ondrej Spacek Signed-off-by: Chester Lin --- No change in v2. drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 10 ++++++++++ drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h | 4 +++- drivers/net/ethernet/stmicro/stmmac/hwif.h | 5 +++++ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 +++ include/linux/stmmac.h | 7 +++++++ 5 files changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net= /ethernet/stmicro/stmmac/dwmac4_dma.c index d99fa028c646..4e6e2952abfd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c @@ -517,6 +517,15 @@ static int dwmac4_enable_tbs(void __iomem *ioaddr, boo= l en, u32 chan) return 0; } =20 +static void dwmac4_axi4_cc(void __iomem *ioaddr, + struct stmmac_axi4_ace_ctrl *acecfg) +{ + /* Configure AXI4 cache coherency for Tx/Rx DMA channels */ + writel(acecfg->tx_ar_reg, ioaddr + DMA_AXI4_TX_AR_ACE_CONTROL); + writel(acecfg->rx_aw_reg, ioaddr + DMA_AXI4_RX_AW_ACE_CONTROL); + writel(acecfg->txrx_awar_reg, ioaddr + DMA_AXI4_TXRX_AWAR_ACE_CONTROL); +} + const struct stmmac_dma_ops dwmac4_dma_ops =3D { .reset =3D dwmac4_dma_reset, .init =3D dwmac4_dma_init, @@ -574,4 +583,5 @@ const struct stmmac_dma_ops dwmac410_dma_ops =3D { .set_bfsize =3D dwmac4_set_bfsize, .enable_sph =3D dwmac4_enable_sph, .enable_tbs =3D dwmac4_enable_tbs, + .axi4_cc =3D dwmac4_axi4_cc, }; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/net= /ethernet/stmicro/stmmac/dwmac4_dma.h index 9321879b599c..7f491f2651b2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h @@ -21,7 +21,9 @@ #define DMA_DEBUG_STATUS_0 0x0000100c #define DMA_DEBUG_STATUS_1 0x00001010 #define DMA_DEBUG_STATUS_2 0x00001014 -#define DMA_AXI_BUS_MODE 0x00001028 +#define DMA_AXI4_TX_AR_ACE_CONTROL 0x00001020 +#define DMA_AXI4_RX_AW_ACE_CONTROL 0x00001024 +#define DMA_AXI4_TXRX_AWAR_ACE_CONTROL 0x00001028 #define DMA_TBS_CTRL 0x00001050 =20 /* DMA Bus Mode bitmap */ diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ether= net/stmicro/stmmac/hwif.h index 592b4067f9b8..bffe2ec36bb3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -212,6 +212,9 @@ struct stmmac_dma_ops { void (*set_bfsize)(void __iomem *ioaddr, int bfsize, u32 chan); void (*enable_sph)(void __iomem *ioaddr, bool en, u32 chan); int (*enable_tbs)(void __iomem *ioaddr, bool en, u32 chan); + /* Configure AXI4 cache coherency for Tx and Rx DMA channels */ + void (*axi4_cc)(void __iomem *ioaddr, + struct stmmac_axi4_ace_ctrl *acecfg); }; =20 #define stmmac_reset(__priv, __args...) \ @@ -272,6 +275,8 @@ struct stmmac_dma_ops { stmmac_do_void_callback(__priv, dma, enable_sph, __args) #define stmmac_enable_tbs(__priv, __args...) \ stmmac_do_callback(__priv, dma, enable_tbs, __args) +#define stmmac_axi4_cc(__priv, __args...) \ + stmmac_do_void_callback(__priv, dma, axi4_cc, __args) =20 struct mac_device_info; struct net_device; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/ne= t/ethernet/stmicro/stmmac/stmmac_main.c index ff0b32c9e748..c689723c7d93 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -2917,6 +2917,9 @@ static int stmmac_init_dma_engine(struct stmmac_priv = *priv) if (priv->plat->axi) stmmac_axi(priv, priv->ioaddr, priv->plat->axi); =20 + if (priv->plat->axi4_ace_ctrl) + stmmac_axi4_cc(priv, priv->ioaddr, priv->plat->axi4_ace_ctrl); + /* DMA CSR Channel configuration */ for (chan =3D 0; chan < dma_csr_ch; chan++) { stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan); diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 307980c808f7..23e740c6c7b8 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -115,6 +115,12 @@ struct stmmac_axi { bool axi_rb; }; =20 +struct stmmac_axi4_ace_ctrl { + u32 tx_ar_reg; + u32 rx_aw_reg; + u32 txrx_awar_reg; +}; + #define EST_GCL 1024 struct stmmac_est { struct mutex lock; @@ -248,6 +254,7 @@ struct plat_stmmacenet_data { struct reset_control *stmmac_rst; struct reset_control *stmmac_ahb_rst; struct stmmac_axi *axi; + struct stmmac_axi4_ace_ctrl *axi4_ace_ctrl; int has_gmac4; bool has_sun8i; bool tso_en; --=20 2.37.3 From nobody Fri Sep 19 05:37:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EAA8C433FE for ; Mon, 28 Nov 2022 05:51:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229817AbiK1FvH (ORCPT ); Mon, 28 Nov 2022 00:51:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229642AbiK1Fui (ORCPT ); Mon, 28 Nov 2022 00:50:38 -0500 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2067.outbound.protection.outlook.com [40.107.6.67]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6BCA13F00; Sun, 27 Nov 2022 21:50:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ANqB6awXbcNsJi7WC6LznCuyz0c11856jgbyUrAERF+fiPw0gvUiwAKkDgx4psKAvSIQUrlakq7k39qbBWq0EnbJ/z77U8KNPEhRDn91kEFQZFMFKPhGntIkkgtudg8cGmbt2YH3LwYF71DHxXFNicnJS7dQyJW4EgceFS0ltFh2EsnQAcp+yLsvIi0BrZZ+2ylXz3jzd4KPEK2Y1nXoBcHMNpwxn2pl3aPb1PjVBoiq0FwS1t+KypqBlYp2gY9juMtJtW2j+2kXmmZLFFma6dvx5FlRVemb5bqr9Ni9mVzTmrzN1V8U/J8Dzt/t5v0p2mW7nI9tBeriOLHxyESTag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=jGPle65F4eGot3cm24FaNKKKmcM/ky2wkXXe/DFPcIE=; b=BAAY1sXlvXOotCFMmojIN6YtnYZuJlrTjr6CV2HZqDMhHzaCANRTQHfUwG5azV9XfHOaYBF8Bg+kARmtom7EBH8QnSh2ACZ/dIInOXLXDJ8byJgo61K1bMmoWP8j8OAEzMfjnT4DyuFiKqWEa/9waXQv7T0MWCjpcQJl76DYq/C2g5IArT8A99ScAGu2F4oxcniwtVlVjLvNX7VqthHUINwQUxXMz0sVwG5+76sLNE07T+lBPLM1JIA7zFlCHWJ2wqqw0pUCsCEc11QdgYaU598s+RSHmBi1NzJ7UOb9kzscqzok6Z7scAUwqBfpvNpb9a96hAxCbI+TmRSE0eFPNQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jGPle65F4eGot3cm24FaNKKKmcM/ky2wkXXe/DFPcIE=; b=zdzJ3P0nJ6CcrC2X2gc7/81T+yNCfx2vmaN+3xBmYYkg+M6KIsw8VkL35gCt06zNzmVLjkCa5hlpc8TEUA3an+A0HLu6Z/ky+b616nFCNfMrkTfNU70IGpfWxEmq537mqWsCLoFcIYdAcUF3ayTAMtPJXNVgYeJb6uw/3R+ddNfwijqiGcZOc3rRXjl+Wflwp1m8hYbievty7W7v0QcWR59c9GmBWlfxjgw+PMzMzNFfVSU0QQv9hFSqG3FTwtooNNUp6MhhwJ7hIODU/1WZQwy6+PVXInFFpk/RGCFFE44uWSkwfQvxka0Oc1IPnQnUKVjnUr0+S/G1izVBpv7JLg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) by DB9PR04MB8478.eurprd04.prod.outlook.com (2603:10a6:10:2c4::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5857.20; Mon, 28 Nov 2022 05:50:19 +0000 Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5]) by VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::28d6:1b8:94d9:89f5%7]) with mapi id 15.20.5857.023; Mon, 28 Nov 2022 05:50:19 +0000 From: Chester Lin To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Andrew Lunn Cc: Chester Lin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jan Petrous , Ondrej Spacek , Ghennadi Procopciuc , Andra-Teodora Ilie , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Matthias Brugger Subject: [PATCH v2 5/5] net: stmmac: Add NXP S32 SoC family support Date: Mon, 28 Nov 2022 13:49:20 +0800 Message-Id: <20221128054920.2113-6-clin@suse.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221128054920.2113-1-clin@suse.com> References: <20221128054920.2113-1-clin@suse.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: TYCP286CA0138.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:31b::13) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR0402MB3439:EE_|DB9PR04MB8478:EE_ X-MS-Office365-Filtering-Correlation-Id: c1eb77fa-d20e-4953-ae41-08dad1046e5d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SQ6R05rV5NODy8CsJBO9X0HJC/wrYAgk8+gZ68e7TvAKSXeTAN7HuXmxdDoNj3GRAO00UkwcMfNwNaJ4lTYK1XPdv5sNRhvNJdLWZWw7H2ISzJ6WnhKwdcFyg41VXxHySxjHq+tcQ8stpD7faOaHABDxnY3/0PpIJFiWiTlyEJ9ePtX+4UWu7ED6pRd6qt67hPEKb80BK/oL+RzqY+2GWXMwVMtjUQ7W65A9p4SkULC6jjGs08m27mlTMzYlStiUMOrrh44t91yYbJQ9TOsu8IH35yfWUyKtZGZXok1x+y3kb32jBCBHSDL6JfV8KbucFF2f/dor5kLg8BVj+5hS2SeobQ77PBEwgxV7tFrxMinoumF1e3pKAefXgBfFc09C7O5SF2Nnc8rwguwHVbUqv29XjoJOl2ve7JSSscFnSkuTnBKd6Jpfy9HwLYUBjOMx3MxFW5u1nlGA5PreevOkT1WBgc7/8e7MM9oRsD4MG7Aa20h88CUV0YAzuqWRO6TGBSX5ERg6tizVj7BMFMb1sQqn+Ny6kXQXE7AX6MQi8a48/n8qnqzvcsZVr+Q3kINXE8nu7ok4gP/ID5BQbeBHbiOeJt1zK+hLdfoBYkDd/onqQK+P/F810oU4Wk2jHODJbvFLIltkhdPEnPvtu5IK0feEUm00QrLc+YEKmpikeGc= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR0402MB3439.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(346002)(39860400002)(376002)(396003)(366004)(136003)(451199015)(107886003)(2906002)(186003)(6486002)(966005)(6506007)(36756003)(478600001)(6666004)(6512007)(1076003)(38100700002)(86362001)(83380400001)(2616005)(41300700001)(30864003)(66556008)(66476007)(8676002)(66946007)(5660300002)(4326008)(7416002)(8936002)(54906003)(316002)(110136005);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?kFJWNbMbkdIGVV5HjZB2HeO6SVmTwHyjnNK1ujPUymyt9Z8nR3204opL5Mwt?= =?us-ascii?Q?XF1izgeZPiYQSw4U5sO3QU8RxpsKvQlP0+F6pEObzzM7R3w2BsBiOrTHidnW?= =?us-ascii?Q?Xrrcp3mIlnEpz6Y59JPmzE0FeImEhVIpCY91wGMvVo9xqW2jCtkANpoKRgDT?= =?us-ascii?Q?/eERcgDdt1QW5eonD0hTc5NsLSbhdUcM5FGwhKYux2bKqpGKS12DAmvibb7o?= =?us-ascii?Q?+ycBYkN8QWbvcVZleZFlRJF20HZWkU9nVqrtgwWE8BNZogqXd/wGD7Sm+ckj?= =?us-ascii?Q?gj33rSI/jGGo1uGbLEtKZ4d1U4mJP5Syfz/luy2BUUgTcU2WqfUx5y56fJ0J?= =?us-ascii?Q?ADl+1IvidkRjnENj3PsUtWYd+CvGveE4+Rd7pBCvHktL0kbJJmS52zpZWmFw?= =?us-ascii?Q?YafVTfPK8DeP3rbiJIQ/RKE9MSgzOuyc1/lbVRapoi2kgAKKq49MuMoqCyVY?= =?us-ascii?Q?Lwxsw26dth8ujwDZjRaH3aV0cEZAJyGqga3ZLNzZob/jccuNkGolPD1uVnsR?= =?us-ascii?Q?+yajP5OGG1vjQpoPuiQXFQDO8tb4/vqMcG0SqIJLhnJmyTDwxNj11JOIF2t4?= =?us-ascii?Q?lNOlxCXsRi1PHia/BlADiPcURm0uUlW5EbbmHAlr/gq+y6YwtEbTGaP8X5ux?= =?us-ascii?Q?3Qkut94BMGCp+3UzbFnFQKPy9xsuMutBa0nc1ijnoVaURfXshjY/vpv6CmP4?= =?us-ascii?Q?JNzeyg8tTU6WmMOeCppDuzexy/YtEXvbUqQlX4wzYalhSlJCyfLh3Z9bNxSF?= =?us-ascii?Q?px9mRuITEtQb/1WUUA/7SweoBv5YBp+sWKMj6MjqLOsmdWl8OoUO7nyAEk6Z?= =?us-ascii?Q?xJwu2Qx3+exYNq8gtW++KrtpwraQj+vGLrT/Iy3HLRzrQTIbcKdCk8CQ5oRu?= =?us-ascii?Q?QmGSUSd8ykVBPjSiSuPx41HM+zDZl2CMovWnN7Y4GktGZqSz23SlSY93BVTW?= =?us-ascii?Q?Q+PEzpFk7sAJH7Q49Q7mUSSqqr08uLgUkLUzXwmjBTBHt7hnrxcYB5iyqFxG?= =?us-ascii?Q?GnVVnN9w9U5Iw179Ev5Bn94MxbXUX8ogFZBra8ODSsrqO5NNBNWfVH1F9TBD?= =?us-ascii?Q?Y+QNU7NTNKhIrcdPjW4Q4A+F+M5Hf8arLnKw625SYgAxNJFS2a8uhJeS1aCh?= =?us-ascii?Q?05cQ+9t3qVswpJroFwDuC0BFpi0fwD4yHXEqcPLpaQsGxoxiuKOSMrEh3TsX?= =?us-ascii?Q?ugtNh/2ZYeo9DR5RrLe5sNiELuNtUW3rTYVSQ79vuAmJH6ZTfqzYiZaDjqPC?= =?us-ascii?Q?drAnsaJO/NX4HZUc7sE5yCfU04T5SqIUuzLo9LdCf4MH+dWTxm18CEVVtU39?= =?us-ascii?Q?cIZzUpPXeOOKd59OgvzN3lP4wWtjtYPMO9kdYugL9zbwVC0QJSsUuCwTnado?= =?us-ascii?Q?uuKu9rL1yCWhXi2vdn1hjD0G8rMZJYSlzh9fijVpCVOMnvFoOif9vymtIC5I?= =?us-ascii?Q?5kK+qmDXMsBEh0TJqXfNvui7LmzIIykET+Sj2ERQZkhenfxHisUzQT9QF3bH?= =?us-ascii?Q?AVllcfo2Nk0cAKfJ5YmQ2pBYLEWJDc3bDujDe3IOYeiP3SAOWaCi/U8UQdFN?= =?us-ascii?Q?F/vKZvtt1LEM+5G4aH4f6cnxujZU/jUFPUsJoA657gi1vD/+iGp19pnDt8LQ?= =?us-ascii?Q?pz8/xhADvPvR1LaS9wHL3zB0M7qkfWjP1+lsARa/ek2V?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: c1eb77fa-d20e-4953-ae41-08dad1046e5d X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2022 05:50:18.9616 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NxwCAgGLDzX3Z400xpFb/bQlVa/jD/8JvsGP8b/2vLZmMJVi8NLe9qnC8j7PcSEI X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB8478 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add GMAC support for NXP S32 SoC family. This driver is mainly based on NXP's downstream implementation on CodeAurora[1]. [1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/ne= t/ethernet/stmicro/stmmac?h=3Dbsp34.0-5.10.120-rt Signed-off-by: Jan Petrous Signed-off-by: Ghennadi Procopciuc Signed-off-by: Andra-Teodora Ilie Signed-off-by: Chester Lin --- Changes in v2: - Replace clock names tx_sgmii/rx_sgmii with tx_pcs/rx_pcs. - Adjust error handlings while calling devm_clk_get(). - Remove redundant dev_info messages. - Remove unnecessary if conditions. - Fix the copyright format suggested by NXP. drivers/net/ethernet/stmicro/stmmac/Kconfig | 13 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 304 ++++++++++++++++++ 3 files changed, 318 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethe= rnet/stmicro/stmmac/Kconfig index 31ff35174034..dd3fb5e462b7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -153,6 +153,19 @@ config DWMAC_ROCKCHIP This selects the Rockchip RK3288 SoC glue layer support for the stmmac device driver. =20 +config DWMAC_S32CC + tristate "NXP S32 series GMAC support" + default ARCH_S32 + depends on OF && (ARCH_S32 || COMPILE_TEST) + select MFD_SYSCON + select PHYLINK + help + Support for ethernet controller on NXP S32 series SOCs. + + This selects NXP SoC glue layer support for the stmmac + device driver. This driver is used for the S32 series + SOCs GMAC ethernet controller. + config DWMAC_SOCFPGA tristate "SOCFPGA dwmac support" default ARCH_INTEL_SOCFPGA diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/eth= ernet/stmicro/stmmac/Makefile index d4e12e9ace4f..ec92cc2becd7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_DWMAC_INTEL_PLAT) +=3D dwmac-intel-plat.o obj-$(CONFIG_DWMAC_GENERIC) +=3D dwmac-generic.o obj-$(CONFIG_DWMAC_IMX8) +=3D dwmac-imx.o obj-$(CONFIG_DWMAC_VISCONTI) +=3D dwmac-visconti.o +obj-$(CONFIG_DWMAC_S32CC) +=3D dwmac-s32cc.o stmmac-platform-objs:=3D stmmac_platform.o dwmac-altr-socfpga-objs :=3D altr_tse_pcs.o dwmac-socfpga.o =20 diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c b/drivers/ne= t/ethernet/stmicro/stmmac/dwmac-s32cc.c new file mode 100644 index 000000000000..92a132ad985a --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c @@ -0,0 +1,304 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * DWMAC Specific Glue layer for NXP S32 Common Chassis + * + * Copyright 2019-2022 NXP + * Copyright (C) 2022 SUSE LLC + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "stmmac_platform.h" + +#define GMAC_TX_RATE_125M 125000000 /* 125MHz */ +#define GMAC_TX_RATE_25M 25000000 /* 25MHz */ +#define GMAC_TX_RATE_2M5 2500000 /* 2.5MHz */ + +/* S32 SRC register for phyif selection */ +#define PHY_INTF_SEL_MII 0x00 +#define PHY_INTF_SEL_SGMII 0x01 +#define PHY_INTF_SEL_RGMII 0x02 +#define PHY_INTF_SEL_RMII 0x08 + +/* AXI4 ACE control settings */ +#define ACE_DOMAIN_SIGNAL 0x2 +#define ACE_CACHE_SIGNAL 0xf +#define ACE_CONTROL_SIGNALS ((ACE_DOMAIN_SIGNAL << 4) | ACE_CACHE_SIGNAL) +#define ACE_PROTECTION 0x2 + +struct s32cc_priv_data { + void __iomem *ctrl_sts; + struct device *dev; + phy_interface_t intf_mode; + struct clk *tx_clk; + struct clk *rx_clk; +}; + +static int s32cc_gmac_init(struct platform_device *pdev, void *priv) +{ + struct s32cc_priv_data *gmac =3D priv; + u32 intf_sel; + int ret; + + ret =3D clk_prepare_enable(gmac->tx_clk); + if (ret) { + dev_err(&pdev->dev, "Can't enable tx clock\n"); + return ret; + } + + ret =3D clk_prepare_enable(gmac->rx_clk); + if (ret) { + dev_err(&pdev->dev, "Can't enable rx clock\n"); + return ret; + } + + /* set interface mode */ + switch (gmac->intf_mode) { + case PHY_INTERFACE_MODE_SGMII: + intf_sel =3D PHY_INTF_SEL_SGMII; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + intf_sel =3D PHY_INTF_SEL_RGMII; + break; + case PHY_INTERFACE_MODE_RMII: + intf_sel =3D PHY_INTF_SEL_RMII; + break; + case PHY_INTERFACE_MODE_MII: + intf_sel =3D PHY_INTF_SEL_MII; + break; + default: + dev_err(&pdev->dev, "Unsupported PHY interface: %s\n", + phy_modes(gmac->intf_mode)); + return -EINVAL; + } + + writel(intf_sel, gmac->ctrl_sts); + + dev_dbg(&pdev->dev, "PHY mode set to %s\n", phy_modes(gmac->intf_mode)); + + return 0; +} + +static void s32cc_gmac_exit(struct platform_device *pdev, void *priv) +{ + struct s32cc_priv_data *gmac =3D priv; + + clk_disable_unprepare(gmac->tx_clk); + clk_disable_unprepare(gmac->rx_clk); +} + +static void s32cc_fix_speed(void *priv, unsigned int speed) +{ + struct s32cc_priv_data *gmac =3D priv; + + /* SGMII mode doesn't support the clock reconfiguration */ + if (gmac->intf_mode =3D=3D PHY_INTERFACE_MODE_SGMII) + return; + + switch (speed) { + case SPEED_1000: + dev_info(gmac->dev, "Set TX clock to 125M\n"); + clk_set_rate(gmac->tx_clk, GMAC_TX_RATE_125M); + break; + case SPEED_100: + dev_info(gmac->dev, "Set TX clock to 25M\n"); + clk_set_rate(gmac->tx_clk, GMAC_TX_RATE_25M); + break; + case SPEED_10: + dev_info(gmac->dev, "Set TX clock to 2.5M\n"); + clk_set_rate(gmac->tx_clk, GMAC_TX_RATE_2M5); + break; + default: + dev_err(gmac->dev, "Unsupported/Invalid speed: %d\n", speed); + return; + } +} + +static int s32cc_config_cache_coherency(struct platform_device *pdev, + struct plat_stmmacenet_data *plat_dat) +{ + plat_dat->axi4_ace_ctrl =3D + devm_kzalloc(&pdev->dev, + sizeof(struct stmmac_axi4_ace_ctrl), + GFP_KERNEL); + + if (!plat_dat->axi4_ace_ctrl) + return -ENOMEM; + + plat_dat->axi4_ace_ctrl->tx_ar_reg =3D (ACE_CONTROL_SIGNALS << 16) + | (ACE_CONTROL_SIGNALS << 8) | ACE_CONTROL_SIGNALS; + + plat_dat->axi4_ace_ctrl->rx_aw_reg =3D (ACE_CONTROL_SIGNALS << 24) + | (ACE_CONTROL_SIGNALS << 16) | (ACE_CONTROL_SIGNALS << 8) + | ACE_CONTROL_SIGNALS; + + plat_dat->axi4_ace_ctrl->txrx_awar_reg =3D (ACE_PROTECTION << 20) + | (ACE_PROTECTION << 16) | (ACE_CONTROL_SIGNALS << 8) + | ACE_CONTROL_SIGNALS; + + return 0; +} + +static int s32cc_dwmac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct s32cc_priv_data *gmac; + struct resource *res; + const char *tx_clk, *rx_clk; + int ret; + + ret =3D stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return ret; + + gmac =3D devm_kzalloc(&pdev->dev, sizeof(*gmac), GFP_KERNEL); + if (!gmac) + return PTR_ERR(gmac); + + gmac->dev =3D &pdev->dev; + + /* S32G control reg */ + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 1); + gmac->ctrl_sts =3D devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR_OR_NULL(gmac->ctrl_sts)) { + dev_err(&pdev->dev, "S32CC config region is missing\n"); + return PTR_ERR(gmac->ctrl_sts); + } + + plat_dat =3D stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return PTR_ERR(plat_dat); + + plat_dat->bsp_priv =3D gmac; + + switch (plat_dat->phy_interface) { + case PHY_INTERFACE_MODE_SGMII: + tx_clk =3D "tx_pcs"; + rx_clk =3D "rx_pcs"; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + tx_clk =3D "tx_rgmii"; + rx_clk =3D "rx_rgmii"; + break; + case PHY_INTERFACE_MODE_RMII: + tx_clk =3D "tx_rmii"; + rx_clk =3D "rx_rmii"; + break; + case PHY_INTERFACE_MODE_MII: + tx_clk =3D "tx_mii"; + rx_clk =3D "rx_mii"; + break; + default: + dev_err(&pdev->dev, "Not supported phy interface mode: [%s]\n", + phy_modes(plat_dat->phy_interface)); + return -EINVAL; + }; + + gmac->intf_mode =3D plat_dat->phy_interface; + + /* DMA cache coherency settings */ + if (of_dma_is_coherent(pdev->dev.of_node)) { + ret =3D s32cc_config_cache_coherency(pdev, plat_dat); + if (ret) + goto err_remove_config_dt; + } + + /* tx clock */ + gmac->tx_clk =3D devm_clk_get(&pdev->dev, tx_clk); + if (IS_ERR(gmac->tx_clk)) { + dev_err(&pdev->dev, "Get TX clock failed\n"); + ret =3D PTR_ERR(gmac->tx_clk); + goto err_remove_config_dt; + } + + /* rx clock */ + gmac->rx_clk =3D devm_clk_get(&pdev->dev, rx_clk); + if (IS_ERR(gmac->rx_clk)) { + dev_err(&pdev->dev, "Get RX clock failed\n"); + ret =3D PTR_ERR(gmac->rx_clk); + goto err_remove_config_dt; + } + + ret =3D s32cc_gmac_init(pdev, gmac); + if (ret) + goto err_remove_config_dt; + + /* core feature set */ + plat_dat->has_gmac4 =3D true; + plat_dat->pmt =3D 1; + + plat_dat->init =3D s32cc_gmac_init; + plat_dat->exit =3D s32cc_gmac_exit; + plat_dat->fix_mac_speed =3D s32cc_fix_speed; + + /* safety feature config */ + plat_dat->safety_feat_cfg =3D + devm_kzalloc(&pdev->dev, sizeof(*plat_dat->safety_feat_cfg), + GFP_KERNEL); + + if (!plat_dat->safety_feat_cfg) { + dev_err(&pdev->dev, "Allocate safety_feat_cfg failed\n"); + goto err_gmac_exit; + } + + plat_dat->safety_feat_cfg->tsoee =3D 1; + plat_dat->safety_feat_cfg->mrxpee =3D 1; + plat_dat->safety_feat_cfg->mestee =3D 1; + plat_dat->safety_feat_cfg->mrxee =3D 1; + plat_dat->safety_feat_cfg->mtxee =3D 1; + plat_dat->safety_feat_cfg->epsi =3D 1; + plat_dat->safety_feat_cfg->edpp =3D 1; + plat_dat->safety_feat_cfg->prtyen =3D 1; + plat_dat->safety_feat_cfg->tmouten =3D 1; + + ret =3D stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) + goto err_gmac_exit; + + return 0; + +err_gmac_exit: + s32cc_gmac_exit(pdev, plat_dat->bsp_priv); +err_remove_config_dt: + stmmac_remove_config_dt(pdev, plat_dat); + return ret; +} + +static const struct of_device_id s32_dwmac_match[] =3D { + { .compatible =3D "nxp,s32cc-dwmac" }, + { } +}; +MODULE_DEVICE_TABLE(of, s32_dwmac_match); + +static struct platform_driver s32_dwmac_driver =3D { + .probe =3D s32cc_dwmac_probe, + .remove =3D stmmac_pltfr_remove, + .driver =3D { + .name =3D "s32cc-dwmac", + .pm =3D &stmmac_pltfr_pm_ops, + .of_match_table =3D s32_dwmac_match, + }, +}; +module_platform_driver(s32_dwmac_driver); + +MODULE_AUTHOR("Jan Petrous "); +MODULE_DESCRIPTION("NXP S32 common chassis GMAC driver"); +MODULE_LICENSE("GPL v2"); --=20 2.37.3