From nobody Fri Sep 19 07:01:47 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBCA8C46467 for ; Sun, 27 Nov 2022 07:25:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229529AbiK0HXd (ORCPT ); Sun, 27 Nov 2022 02:23:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229491AbiK0HXc (ORCPT ); Sun, 27 Nov 2022 02:23:32 -0500 Received: from sender4-op-o18.zoho.com (sender4-op-o18.zoho.com [136.143.188.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5278013D11 for ; Sat, 26 Nov 2022 23:23:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669533801; cv=none; d=zohomail.com; s=zohoarc; b=iEFzdWNViSURgz8Y4NovvijJYpK+p23njdwUvyPq2DkyayBrlzuwDNFzJDA2/UzX5xaqQ0iEJXfCGfwJFV/HPe4frb8xfR00LyA4gEh0uPNFaVUGXbKm5Th/A+9/ZHY5LN6szDC8ln0RT4/87Acjkord9bzZVQe266U194I0PL4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1669533801; h=Content-Transfer-Encoding:Cc:Date:From:MIME-Version:Message-ID:Subject:To; bh=T1cysyrGoq304rLsu0xWkq0J6KZT872CrMJW3x4MX4k=; b=atAX36osMkq2VAzYe16vHnA3jYKY45UDUy+0lYYbwqfsYCzAb177ebkyGRPQoMSis43Nz/X+3VYneGc7/WNs83Gx8v5IHQozFnpexCxbrPucgP7OpxzNDCl743XVtdvLhHVfnDsH3Nkn7gAqw2nhC59Kq6AjLrIJC1d4am+n9IM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=icenowy.me; spf=pass smtp.mailfrom=uwu@icenowy.me; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1669533801; s=zmail; d=icenowy.me; i=uwu@icenowy.me; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=T1cysyrGoq304rLsu0xWkq0J6KZT872CrMJW3x4MX4k=; b=C9rhh60xiqKoCg5vtTfDF/bCdiiy5eu/Bawo1l3x4LMvgIG6VSDRBnOZaizbA1Wz 38TEY30qkoRP06/E6vW7e9zQl+Fb5vc/0T5nDe/jy/IihFD0B1g/AiEsBQVgDQG+4Ji sj3fpjBvRkNcv1VDLYTFzOQR/R40RVIQnPidlZuo= Received: from edelgard.fodlan.icenowy.me (112.94.100.108 [112.94.100.108]) by mx.zohomail.com with SMTPS id 1669533799204919.048958253238; Sat, 26 Nov 2022 23:23:19 -0800 (PST) From: Icenowy Zheng To: Lee Jones , Chen-Yu Tsai , linux-kernel@vger.kernel.org Cc: linux-sunxi@lists.linux.dev, Icenowy Zheng Subject: [PATCH] mfd: axp20x: adapt to newly refactored unmask_base in regmap-irq Date: Sun, 27 Nov 2022 15:23:07 +0800 Message-Id: <20221127072307.2092327-1-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mask_base and unmask_base fields in a regmap-irq description is recently refactored to be orthogonal and mask_inverted property is deprecated. The new semantics of unmask_base just fits AXP PMICs. Specify enabling registers as unmask_base and drop mask_inverted property to adapt to the new interface. Signed-off-by: Icenowy Zheng --- drivers/mfd/axp20x.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 88a212a8168c..6e6b5dbab098 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -506,8 +506,7 @@ static const struct regmap_irq_chip axp152_regmap_irq_c= hip =3D { .name =3D "axp152_irq_chip", .status_base =3D AXP152_IRQ1_STATE, .ack_base =3D AXP152_IRQ1_STATE, - .mask_base =3D AXP152_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP152_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp152_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp152_regmap_irqs), @@ -518,8 +517,7 @@ static const struct regmap_irq_chip axp20x_regmap_irq_c= hip =3D { .name =3D "axp20x_irq_chip", .status_base =3D AXP20X_IRQ1_STATE, .ack_base =3D AXP20X_IRQ1_STATE, - .mask_base =3D AXP20X_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP20X_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp20x_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp20x_regmap_irqs), @@ -531,8 +529,7 @@ static const struct regmap_irq_chip axp22x_regmap_irq_c= hip =3D { .name =3D "axp22x_irq_chip", .status_base =3D AXP20X_IRQ1_STATE, .ack_base =3D AXP20X_IRQ1_STATE, - .mask_base =3D AXP20X_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP20X_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp22x_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp22x_regmap_irqs), @@ -543,8 +540,7 @@ static const struct regmap_irq_chip axp288_regmap_irq_c= hip =3D { .name =3D "axp288_irq_chip", .status_base =3D AXP20X_IRQ1_STATE, .ack_base =3D AXP20X_IRQ1_STATE, - .mask_base =3D AXP20X_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP20X_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp288_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp288_regmap_irqs), @@ -556,8 +552,7 @@ static const struct regmap_irq_chip axp803_regmap_irq_c= hip =3D { .name =3D "axp803", .status_base =3D AXP20X_IRQ1_STATE, .ack_base =3D AXP20X_IRQ1_STATE, - .mask_base =3D AXP20X_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP20X_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp803_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp803_regmap_irqs), @@ -568,8 +563,7 @@ static const struct regmap_irq_chip axp806_regmap_irq_c= hip =3D { .name =3D "axp806", .status_base =3D AXP20X_IRQ1_STATE, .ack_base =3D AXP20X_IRQ1_STATE, - .mask_base =3D AXP20X_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP20X_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp806_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp806_regmap_irqs), @@ -580,8 +574,7 @@ static const struct regmap_irq_chip axp809_regmap_irq_c= hip =3D { .name =3D "axp809", .status_base =3D AXP20X_IRQ1_STATE, .ack_base =3D AXP20X_IRQ1_STATE, - .mask_base =3D AXP20X_IRQ1_EN, - .mask_invert =3D true, + .unmask_base =3D AXP20X_IRQ1_EN, .init_ack_masked =3D true, .irqs =3D axp809_regmap_irqs, .num_irqs =3D ARRAY_SIZE(axp809_regmap_irqs), --=20 2.37.1