From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABD56C4332F for ; Tue, 22 Nov 2022 00:37:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231913AbiKVAhB (ORCPT ); Mon, 21 Nov 2022 19:37:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231749AbiKVAg4 (ORCPT ); Mon, 21 Nov 2022 19:36:56 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8CFBFC6BDC for ; Mon, 21 Nov 2022 16:36:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669077415; x=1700613415; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Y5vGwIPPwSenb40glub36iuftmDSZwrpt1MHtGFliyk=; b=hvn3AI0IIBrqZDbB93amfkxjq29cYMgANVkVu4Sy7qMMFNqqwj51CkNM Wfk+GZV5SWc/Ue+xhA9SKUt3A3KUT5D2nExfUTfkVnIJof2bViInxXTrT ea7V7lLMssmHUp5hNYwjrr6ZB2HHBddFKQOfGythntbyG0UtX0lPL5iet aUIN4ATQBtt/TICw3Zc4AzJiPmfuXU+Hru9eK76a672i7sBOWKv0/OiUB 6xowp9WAJ6pksY7II8YDHMzA+Q1Q6PjGXuMWdo6r/jCB0IauMfG+uQ6DB 2omxNLuzB+JSa8J95R1UjpjlxIoDiKLzy6V6hiEbpHH83rLZwV/E5q7Gu Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="315516471" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="315516471" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2022 16:36:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018415" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018415" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:36:54 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 1/7] iommu/vt-d: Allocate pasid table in device probe path Date: Tue, 22 Nov 2022 08:29:43 +0800 Message-Id: <20221122002949.148140-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Whether or not a domain is attached to the device, the pasid table should always be valid as long as it has been probed. This moves the pasid table allocation from the domain attaching device path to device probe path and frees it in the device release path. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-2-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index a122f5b84ad4..dea0190acc86 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2475,13 +2475,6 @@ static int domain_add_dev_info(struct dmar_domain *d= omain, struct device *dev) =20 /* PASID table is mandatory for a PCI device in scalable mode. */ if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { - ret =3D intel_pasid_alloc_table(dev); - if (ret) { - dev_err(dev, "PASID table allocation failed\n"); - dmar_remove_one_dev_info(dev); - return ret; - } - /* Setup the PASID entry for requests without PASID: */ if (hw_pass_through && domain_type_is_si(domain)) ret =3D intel_pasid_setup_pass_through(iommu, domain, @@ -4106,7 +4099,6 @@ static void dmar_remove_one_dev_info(struct device *d= ev) =20 iommu_disable_dev_iotlb(info); domain_context_clear(info); - intel_pasid_free_table(info->dev); } =20 spin_lock_irqsave(&domain->lock, flags); @@ -4464,6 +4456,7 @@ static struct iommu_device *intel_iommu_probe_device(= struct device *dev) struct device_domain_info *info; struct intel_iommu *iommu; u8 bus, devfn; + int ret; =20 iommu =3D device_to_iommu(dev, &bus, &devfn); if (!iommu || !iommu->iommu.ops) @@ -4507,6 +4500,16 @@ static struct iommu_device *intel_iommu_probe_device= (struct device *dev) =20 dev_iommu_priv_set(dev, info); =20 + if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { + ret =3D intel_pasid_alloc_table(dev); + if (ret) { + dev_err(dev, "PASID table allocation failed\n"); + dev_iommu_priv_set(dev, NULL); + kfree(info); + return ERR_PTR(ret); + } + } + return &iommu->iommu; } =20 @@ -4515,6 +4518,7 @@ static void intel_iommu_release_device(struct device = *dev) struct device_domain_info *info =3D dev_iommu_priv_get(dev); =20 dmar_remove_one_dev_info(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); set_dma_ops(dev, NULL); --=20 2.34.1 From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8647C4332F for ; Tue, 22 Nov 2022 00:37:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231977AbiKVAhI (ORCPT ); Mon, 21 Nov 2022 19:37:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231788AbiKVAg5 (ORCPT ); Mon, 21 Nov 2022 19:36:57 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6765C6972 for ; Mon, 21 Nov 2022 16:36:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669077416; x=1700613416; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dGFRCSd1fhvN2Zriryw2U6ONKPu+goRSJXbnvvR3SvQ=; b=QXg0cvrk84Wndwf0EBycEA987uJfwAvbGcH/FbrLzDUptpPe2mJbwoNr mfATEiSAfeA8T+Y/ClE8Rbr0SkZI7z/tH10EzEaCisC5qA8gjNh8J+Ae3 NIJ8s1jfYrY1mcysv45Ff23sRVMIGBSBdltQMhyUPrOh794mds67SmNMK DeF70q64pn2r7ZU4z1zXaLzYJkdZ2snGB5G4Wl+N8VVIHo6HP4UGfyXDP ci8QkArxVUjtZkg2eDlIo0O4n4TwdYi03zEfR3NDs8reofKv/Ts8kmNg7 PIZTNd6zMOZzaW5aka4kgyle+MYXNg8IBQokGts6t55awt/9DOwB5euXI w==; X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="315516472" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="315516472" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2022 16:36:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018421" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018421" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:36:55 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 2/7] iommu/vt-d: Add device_block_translation() helper Date: Tue, 22 Nov 2022 08:29:44 +0800 Message-Id: <20221122002949.148140-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If domain attaching to device fails, the IOMMU driver should bring the device to blocking DMA state. The upper layer is expected to recover it by attaching a new domain. Use device_block_translation() in the error path of dev_attach to make the behavior specific. The difference between device_block_translation() and the previous dmar_remove_one_dev_info() is that, in the scalable mode, it is the RID2PASID entry instead of context entry being cleared. As a result, enabling PCI capabilities is moved up. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-3-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.c | 44 ++++++++++++++++++++++++++++++++----- 1 file changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index dea0190acc86..1c1a52d1a818 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -277,7 +277,7 @@ static LIST_HEAD(dmar_satc_units); #define for_each_rmrr_units(rmrr) \ list_for_each_entry(rmrr, &dmar_rmrr_units, list) =20 -static void dmar_remove_one_dev_info(struct device *dev); +static void device_block_translation(struct device *dev); =20 int dmar_disabled =3D !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm =3D IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT= _ON); @@ -1400,7 +1400,7 @@ static void iommu_enable_pci_caps(struct device_domai= n_info *info) { struct pci_dev *pdev; =20 - if (!info || !dev_is_pci(info->dev)) + if (!dev_is_pci(info->dev)) return; =20 pdev =3D to_pci_dev(info->dev); @@ -2045,7 +2045,6 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, } else { iommu_flush_write_buffer(iommu); } - iommu_enable_pci_caps(info); =20 ret =3D 0; =20 @@ -2487,7 +2486,7 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) dev, PASID_RID2PASID); if (ret) { dev_err(dev, "Setup RID2PASID failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } } @@ -2495,10 +2494,12 @@ static int domain_add_dev_info(struct dmar_domain *= domain, struct device *dev) ret =3D domain_context_mapping(domain, dev); if (ret) { dev_err(dev, "Domain context map failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } =20 + iommu_enable_pci_caps(info); + return 0; } =20 @@ -4109,6 +4110,37 @@ static void dmar_remove_one_dev_info(struct device *= dev) info->domain =3D NULL; } =20 +/* + * Clear the page table pointer in context or pasid table entries so that + * all DMA requests without PASID from the device are blocked. If the page + * table has been set, clean up the data structures. + */ +static void device_block_translation(struct device *dev) +{ + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct intel_iommu *iommu =3D info->iommu; + unsigned long flags; + + iommu_disable_dev_iotlb(info); + if (!dev_is_real_dma_subdevice(dev)) { + if (sm_supported(iommu)) + intel_pasid_tear_down_entry(iommu, dev, + PASID_RID2PASID, false); + else + domain_context_clear(info); + } + + if (!info->domain) + return; + + spin_lock_irqsave(&info->domain->lock, flags); + list_del(&info->link); + spin_unlock_irqrestore(&info->domain->lock, flags); + + domain_detach_iommu(info->domain, iommu); + info->domain =3D NULL; +} + static int md_domain_init(struct dmar_domain *domain, int guest_width) { int adjust_width; @@ -4230,7 +4262,7 @@ static int intel_iommu_attach_device(struct iommu_dom= ain *domain, struct device_domain_info *info =3D dev_iommu_priv_get(dev); =20 if (info->domain) - dmar_remove_one_dev_info(dev); + device_block_translation(dev); } =20 ret =3D prepare_domain_attach_device(domain, dev); --=20 2.34.1 From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EA18C4332F for ; Tue, 22 Nov 2022 00:37:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231901AbiKVAhO (ORCPT ); Mon, 21 Nov 2022 19:37:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231909AbiKVAhA (ORCPT ); Mon, 21 Nov 2022 19:37:00 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BF74C6D1F for ; Mon, 21 Nov 2022 16:36:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669077418; x=1700613418; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=C94Q/PBU5J4ldiFwhHR9RjLUsVzPfxoLbpVEQBZtdJI=; b=kLFlg2OxaQKcj+/OHadU0qGzk6ZyUfiaEquFBhY/sJ95r6gDJSBX9DrV lCvOcKa+mePRcLQAd6vPuCosGdX7mvyYTGvAcJOzM4TmDX+enlGwa5axs fsiRw3Hx2Bd4ZStkR+CwQSmrhXlZI8aRlmBshByS1x9EmYbknmlabREWc 4fV4Wgjg+It6aZY65ML029ORR7VdxZHibdEULDqwMEDP8tM1INychpzxj BR+2N0VtZAsniMrm5jxfseW9QqbZ+/FllmnGGIMhtk5S2gYWndWngkAvL rBhRIH6u/QkjUNuTTM4wsELuczQgipVH++EyQegWbDbzQDl8XdNlJCDvR w==; X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="315516477" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="315516477" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2022 16:36:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018424" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018424" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:36:56 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 3/7] iommu/vt-d: Add blocking domain support Date: Tue, 22 Nov 2022 08:29:45 +0800 Message-Id: <20221122002949.148140-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Intel IOMMU hardwares support blocking DMA transactions by clearing the translation table entries. This implements a real blocking domain to avoid using an empty UNMANAGED domain. The detach_dev callback of the domain ops is not used in any path. Remove it to avoid dead code as well. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-4-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 1c1a52d1a818..603332740bc3 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -278,6 +278,7 @@ static LIST_HEAD(dmar_satc_units); list_for_each_entry(rmrr, &dmar_rmrr_units, list) =20 static void device_block_translation(struct device *dev); +static void intel_iommu_domain_free(struct iommu_domain *domain); =20 int dmar_disabled =3D !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm =3D IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT= _ON); @@ -4162,12 +4163,28 @@ static int md_domain_init(struct dmar_domain *domai= n, int guest_width) return 0; } =20 +static int blocking_domain_attach_dev(struct iommu_domain *domain, + struct device *dev) +{ + device_block_translation(dev); + return 0; +} + +static struct iommu_domain blocking_domain =3D { + .ops =3D &(const struct iommu_domain_ops) { + .attach_dev =3D blocking_domain_attach_dev, + .free =3D intel_iommu_domain_free + } +}; + static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; =20 switch (type) { + case IOMMU_DOMAIN_BLOCKED: + return &blocking_domain; case IOMMU_DOMAIN_DMA: case IOMMU_DOMAIN_DMA_FQ: case IOMMU_DOMAIN_UNMANAGED: @@ -4202,7 +4219,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(= unsigned type) =20 static void intel_iommu_domain_free(struct iommu_domain *domain) { - if (domain !=3D &si_domain->domain) + if (domain !=3D &si_domain->domain && domain !=3D &blocking_domain) domain_exit(to_dmar_domain(domain)); } =20 @@ -4272,12 +4289,6 @@ static int intel_iommu_attach_device(struct iommu_do= main *domain, return domain_add_dev_info(to_dmar_domain(domain), dev); } =20 -static void intel_iommu_detach_device(struct iommu_domain *domain, - struct device *dev) -{ - dmar_remove_one_dev_info(dev); -} - static int intel_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t hpa, size_t size, int iommu_prot, gfp_t gfp) @@ -4785,7 +4796,6 @@ const struct iommu_ops intel_iommu_ops =3D { #endif .default_domain_ops =3D &(const struct iommu_domain_ops) { .attach_dev =3D intel_iommu_attach_device, - .detach_dev =3D intel_iommu_detach_device, .map_pages =3D intel_iommu_map_pages, .unmap_pages =3D intel_iommu_unmap_pages, .iotlb_sync_map =3D intel_iommu_iotlb_sync_map, --=20 2.34.1 From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1B9BC433FE for ; Tue, 22 Nov 2022 00:37:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231961AbiKVAhW (ORCPT ); Mon, 21 Nov 2022 19:37:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231858AbiKVAhB (ORCPT ); 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21 Nov 2022 16:36:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018425" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018425" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:36:58 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 4/7] iommu/vt-d: Rename iommu_disable_dev_iotlb() Date: Tue, 22 Nov 2022 08:29:46 +0800 Message-Id: <20221122002949.148140-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Rename iommu_disable_dev_iotlb() to iommu_disable_pci_caps() to pair with iommu_enable_pci_caps(). Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-5-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 603332740bc3..e814ddb84bbf 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1441,7 +1441,7 @@ static void iommu_enable_pci_caps(struct device_domai= n_info *info) } } =20 -static void iommu_disable_dev_iotlb(struct device_domain_info *info) +static void iommu_disable_pci_caps(struct device_domain_info *info) { struct pci_dev *pdev; =20 @@ -4099,7 +4099,7 @@ static void dmar_remove_one_dev_info(struct device *d= ev) intel_pasid_tear_down_entry(iommu, info->dev, PASID_RID2PASID, false); =20 - iommu_disable_dev_iotlb(info); + iommu_disable_pci_caps(info); domain_context_clear(info); } =20 @@ -4122,7 +4122,7 @@ static void device_block_translation(struct device *d= ev) struct intel_iommu *iommu =3D info->iommu; unsigned long flags; =20 - iommu_disable_dev_iotlb(info); + iommu_disable_pci_caps(info); if (!dev_is_real_dma_subdevice(dev)) { if (sm_supported(iommu)) intel_pasid_tear_down_entry(iommu, dev, --=20 2.34.1 From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41954C433FE for ; Tue, 22 Nov 2022 00:37:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232147AbiKVAhT (ORCPT ); Mon, 21 Nov 2022 19:37:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231915AbiKVAhB (ORCPT ); Mon, 21 Nov 2022 19:37:01 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E97FDC6972 for ; Mon, 21 Nov 2022 16:37:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669077420; x=1700613420; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VZ2LtOW1xcwYPaSiUZLXM5yrsWzASb/u5zLe/eeYO0k=; b=lJS/QwKgDi/WvE+04MzQDmZ7HOhtorxAFqFgpaMVwIBKRemreMkU1fKO MTfb6sgrOm1U1kPH4iRZJOS6jNUZpPOt5ocloKDd3nwazfoJUiPt+YYG5 dekIY0rcnl/hDJa0XVg1IRwyFBcxIgZgSmZXLRPZpkJoymnZllIuit3XR V44u3BNIufM8CcNQQbINbSK7QpxHCLFil32R7E4v7dEtAjSktXuxELJSw h9LEyO77myzJeViP6+1buVH/fxRoOLWFGDAF8QhOsTAaph+gCoZrhgIK+ HxcaGMmc+53PiBAMmKD8Y9WRj2EE92q9+3fBMm5/eZGNdNcBCtrToBvrY A==; X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="315516484" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="315516484" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2022 16:37:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018429" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018429" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:36:59 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 5/7] iommu/vt-d: Rename domain_add_dev_info() Date: Tue, 22 Nov 2022 08:29:47 +0800 Message-Id: <20221122002949.148140-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" dmar_domain_attach_device() is more meaningful according to what this helper does. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-6-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index e814ddb84bbf..4484da88f917 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2453,7 +2453,8 @@ static int __init si_domain_init(int hw) return 0; } =20 -static int domain_add_dev_info(struct dmar_domain *domain, struct device *= dev) +static int dmar_domain_attach_device(struct dmar_domain *domain, + struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct intel_iommu *iommu; @@ -4286,7 +4287,7 @@ static int intel_iommu_attach_device(struct iommu_dom= ain *domain, if (ret) return ret; =20 - return domain_add_dev_info(to_dmar_domain(domain), dev); + return dmar_domain_attach_device(to_dmar_domain(domain), dev); } =20 static int intel_iommu_map(struct iommu_domain *domain, --=20 2.34.1 From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD335C4332F for ; Tue, 22 Nov 2022 00:37:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232077AbiKVAhc (ORCPT ); Mon, 21 Nov 2022 19:37:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231835AbiKVAhE (ORCPT ); Mon, 21 Nov 2022 19:37:04 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F27FEC6D15 for ; Mon, 21 Nov 2022 16:37:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669077422; x=1700613422; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/Jv3x8HF8iyBg2+XPw8GVEDuKMcTJ8Vysh0iMn4ChJY=; b=dwnwGxOFmxx3aKYg/cEXly0Vto3tnJglsizbdg1S9i2tP7jsGEk1N6ak aR8a3gCBZt7i15/y0v/v/VAuKO+mjQhSQdmZz6xMqIWSaFL2WVno24C8F 02epWQXK0DYhlJsst5W2CZG/CnCckQFcp06qsg+zv1dx2aEHE5utBo164 89LUaeGdIqAl1lVIkEF/sdFzkCKkPwHUcLveGsr/erxbiuMW+5SQAkd8Z xoIKUJWYwJ7OL/1IUOXxgpdJKee0Bi8Akd9IP3quPmZpJyVOCPQcsvjep l0pRycsBsS57SuvFhJgsqS8Qh5LG3dwbnu/4BSRXa+irApw1y6eYkfblQ g==; X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="311325680" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="311325680" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2022 16:37:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018435" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018435" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:37:01 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 6/7] iommu/vt-d: Remove unnecessary domain_context_mapped() Date: Tue, 22 Nov 2022 08:29:48 +0800 Message-Id: <20221122002949.148140-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The device_domain_info::domain accurately records the domain attached to the device. It is unnecessary to check whether the context is present in the attach_dev path. Remove it to make the code neat. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-7-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.c | 47 +++---------------------------------- 1 file changed, 3 insertions(+), 44 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 4484da88f917..3a05cfbc252a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -780,19 +780,6 @@ static void domain_flush_cache(struct dmar_domain *dom= ain, clflush_cache_range(addr, size); } =20 -static int device_context_mapped(struct intel_iommu *iommu, u8 bus, u8 dev= fn) -{ - struct context_entry *context; - int ret =3D 0; - - spin_lock(&iommu->lock); - context =3D iommu_context_addr(iommu, bus, devfn, 0); - if (context) - ret =3D context_present(context); - spin_unlock(&iommu->lock); - return ret; -} - static void free_context_table(struct intel_iommu *iommu) { struct context_entry *context; @@ -2097,30 +2084,6 @@ domain_context_mapping(struct dmar_domain *domain, s= truct device *dev) &domain_context_mapping_cb, &data); } =20 -static int domain_context_mapped_cb(struct pci_dev *pdev, - u16 alias, void *opaque) -{ - struct intel_iommu *iommu =3D opaque; - - return !device_context_mapped(iommu, PCI_BUS_NUM(alias), alias & 0xff); -} - -static int domain_context_mapped(struct device *dev) -{ - struct intel_iommu *iommu; - u8 bus, devfn; - - iommu =3D device_to_iommu(dev, &bus, &devfn); - if (!iommu) - return -ENODEV; - - if (!dev_is_pci(dev)) - return device_context_mapped(iommu, bus, devfn); - - return !pci_for_each_dma_alias(to_pci_dev(dev), - domain_context_mapped_cb, iommu); -} - /* Returns a number of VTD pages, but aligned to MM page size */ static inline unsigned long aligned_nrpages(unsigned long host_addr, size_t size) @@ -4267,6 +4230,7 @@ static int prepare_domain_attach_device(struct iommu_= domain *domain, static int intel_iommu_attach_device(struct iommu_domain *domain, struct device *dev) { + struct device_domain_info *info =3D dev_iommu_priv_get(dev); int ret; =20 if (domain->type =3D=3D IOMMU_DOMAIN_UNMANAGED && @@ -4275,13 +4239,8 @@ static int intel_iommu_attach_device(struct iommu_do= main *domain, return -EPERM; } =20 - /* normally dev is not mapped */ - if (unlikely(domain_context_mapped(dev))) { - struct device_domain_info *info =3D dev_iommu_priv_get(dev); - - if (info->domain) - device_block_translation(dev); - } + if (info->domain) + device_block_translation(dev); =20 ret =3D prepare_domain_attach_device(domain, dev); if (ret) --=20 2.34.1 From nobody Wed Apr 15 21:32:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D096C4332F for ; Tue, 22 Nov 2022 00:37:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231863AbiKVAh1 (ORCPT ); Mon, 21 Nov 2022 19:37:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231906AbiKVAhE (ORCPT ); Mon, 21 Nov 2022 19:37:04 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B273AC758E for ; Mon, 21 Nov 2022 16:37:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669077423; x=1700613423; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=43F3BI4HZ1o7zLhMgPgev7UwWC1JI2ewMMrjPJKUpH4=; b=XfU2rGYLqqp+rd7MBpWxOlxXqHtxoRGUWCG2SWX/YRtN+zbyDSdZdnbH 5IdB92YZIZEW7fi2ybPY2ht+lgL1RIyNxRFYZ89PpVFq091MK3qc1S4Uq Q8IkGFTh/12UwKRFG0L7kwnDruTA40AD6bbH9+XH4FVmT9iXJahCWkHFX 51PLo8ZQWLwaFGbVekxSAH21dTuZ5O2O/6oU9riIgYvrziaSaeeCo7DnB T5eXRIV0Cr2dV1Q5N0RztcNCoY8dSQgW7fv0zZYoVEhmyzw7sQH2UvrdY hISAnumpgbdUS5+JULhQ+xSsJtxQwCFYj/s/iwL1MoUXxhEqmASRV6Qjl Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="311325683" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="311325683" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2022 16:37:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10538"; a="619018448" X-IronPort-AV: E=Sophos;i="5.96,182,1665471600"; d="scan'208";a="619018448" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2022 16:37:02 -0800 From: Lu Baolu To: Joerg Roedel Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 7/7] iommu/vt-d: Use real field for indication of first level Date: Tue, 22 Nov 2022 08:29:49 +0800 Message-Id: <20221122002949.148140-8-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221122002949.148140-1-baolu.lu@linux.intel.com> References: <20221122002949.148140-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The dmar_domain uses bit field members to indicate the behaviors. Add a bit field for using first level and remove the flags member to avoid duplication. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20221118132451.114406-8-baolu.lu@linux.inte= l.com --- drivers/iommu/intel/iommu.h | 15 +++++---------- drivers/iommu/intel/iommu.c | 25 ++++++++++--------------- 2 files changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 251a609fdce3..7b7234689cb4 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -515,14 +515,6 @@ struct context_entry { u64 hi; }; =20 -/* - * When VT-d works in the scalable mode, it allows DMA translation to - * happen through either first level or second level page table. This - * bit marks that the DMA translation for the domain goes through the - * first level page table, otherwise, it goes through the second level. - */ -#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1) - struct iommu_domain_info { struct intel_iommu *iommu; unsigned int refcnt; /* Refcount of devices per iommu */ @@ -539,6 +531,11 @@ struct dmar_domain { u8 iommu_coherency: 1; /* indicate coherency of iommu access */ u8 force_snooping : 1; /* Create IOPTEs with snoop control */ u8 set_pte_snp:1; + u8 use_first_level:1; /* DMA translation for the domain goes + * through the first level page table, + * otherwise, goes through the second + * level. + */ =20 spinlock_t lock; /* Protect device tracking lists */ struct list_head devices; /* all devices' list */ @@ -548,8 +545,6 @@ struct dmar_domain { =20 /* adjusted guest address width, 0 is level 2 30-bit */ int agaw; - - int flags; /* flags to find out type of domain */ int iommu_superpage;/* Level of superpages supported: 0 =3D=3D 4KiB (no superpages), 1 =3D=3D 2MiB, 2 =3D=3D 1GiB, 3 =3D=3D 512GiB, 4 =3D=3D 1TiB */ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 3a05cfbc252a..cd71194fe7a6 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -383,11 +383,6 @@ static inline int domain_type_is_si(struct dmar_domain= *domain) return domain->domain.type =3D=3D IOMMU_DOMAIN_IDENTITY; } =20 -static inline bool domain_use_first_level(struct dmar_domain *domain) -{ - return domain->flags & DOMAIN_FLAG_USE_FIRST_LEVEL; -} - static inline int domain_pfn_supported(struct dmar_domain *domain, unsigned long pfn) { @@ -501,7 +496,7 @@ static int domain_update_iommu_superpage(struct dmar_do= main *domain, rcu_read_lock(); for_each_active_iommu(iommu, drhd) { if (iommu !=3D skip) { - if (domain && domain_use_first_level(domain)) { + if (domain && domain->use_first_level) { if (!cap_fl1gp_support(iommu->cap)) mask =3D 0x1; } else { @@ -579,7 +574,7 @@ static void domain_update_iommu_cap(struct dmar_domain = *domain) * paging and 57-bits with 5-level paging). Hence, skip bit * [N-1]. */ - if (domain_use_first_level(domain)) + if (domain->use_first_level) domain->domain.geometry.aperture_end =3D __DOMAIN_MAX_ADDR(domain->gaw -= 1); else domain->domain.geometry.aperture_end =3D __DOMAIN_MAX_ADDR(domain->gaw); @@ -947,7 +942,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domai= n *domain, =20 domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); pteval =3D ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DM= A_PTE_READ | DMA_PTE_WRITE; - if (domain_use_first_level(domain)) + if (domain->use_first_level) pteval |=3D DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS; =20 if (cmpxchg64(&pte->val, 0ULL, pteval)) @@ -1498,7 +1493,7 @@ static void iommu_flush_iotlb_psi(struct intel_iommu = *iommu, if (ih) ih =3D 1 << 6; =20 - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { qi_flush_piotlb(iommu, did, PASID_RID2PASID, addr, pages, ih); } else { unsigned long bitmask =3D aligned_pages - 1; @@ -1552,7 +1547,7 @@ static inline void __mapping_notify_one(struct intel_= iommu *iommu, * It's a non-present to present mapping. Only flush if caching mode * and second level. */ - if (cap_caching_mode(iommu->cap) && !domain_use_first_level(domain)) + if (cap_caching_mode(iommu->cap) && !domain->use_first_level) iommu_flush_iotlb_psi(iommu, domain, pfn, pages, 0, 1); else iommu_flush_write_buffer(iommu); @@ -1568,7 +1563,7 @@ static void intel_flush_iotlb_all(struct iommu_domain= *domain) struct intel_iommu *iommu =3D info->iommu; u16 did =3D domain_id_iommu(dmar_domain, iommu); =20 - if (domain_use_first_level(dmar_domain)) + if (dmar_domain->use_first_level) qi_flush_piotlb(iommu, did, PASID_RID2PASID, 0, -1, 0); else iommu->flush.flush_iotlb(iommu, did, 0, 0, @@ -1741,7 +1736,7 @@ static struct dmar_domain *alloc_domain(unsigned int = type) =20 domain->nid =3D NUMA_NO_NODE; if (first_level_by_default(type)) - domain->flags |=3D DOMAIN_FLAG_USE_FIRST_LEVEL; + domain->use_first_level =3D true; domain->has_iotlb_device =3D false; INIT_LIST_HEAD(&domain->devices); spin_lock_init(&domain->lock); @@ -2173,7 +2168,7 @@ __domain_mapping(struct dmar_domain *domain, unsigned= long iov_pfn, =20 attr =3D prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); attr |=3D DMA_FL_PTE_PRESENT; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { attr |=3D DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS; if (prot & DMA_PTE_WRITE) attr |=3D DMA_FL_PTE_DIRTY; @@ -2443,7 +2438,7 @@ static int dmar_domain_attach_device(struct dmar_doma= in *domain, if (hw_pass_through && domain_type_is_si(domain)) ret =3D intel_pasid_setup_pass_through(iommu, domain, dev, PASID_RID2PASID); - else if (domain_use_first_level(domain)) + else if (domain->use_first_level) ret =3D domain_setup_first_level(iommu, domain, dev, PASID_RID2PASID); else @@ -4410,7 +4405,7 @@ static void domain_set_force_snooping(struct dmar_dom= ain *domain) * Second level page table supports per-PTE snoop control. The * iommu_map() interface will handle this by setting SNP bit. */ - if (!domain_use_first_level(domain)) { + if (!domain->use_first_level) { domain->set_pte_snp =3D true; return; } --=20 2.34.1