From nobody Wed Apr 15 21:34:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA430C433FE for ; Mon, 21 Nov 2022 22:25:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231646AbiKUWZV (ORCPT ); Mon, 21 Nov 2022 17:25:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231675AbiKUWZL (ORCPT ); Mon, 21 Nov 2022 17:25:11 -0500 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [5.144.164.166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC8C567F42 for ; Mon, 21 Nov 2022 14:25:09 -0800 (PST) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 712A13F20C; Mon, 21 Nov 2022 23:25:06 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Stephen Boyd , Vinod Koul , Bjorn Andersson , Vinod Polimera , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/msm/dpu: Print interrupt index in addition to the mask Date: Mon, 21 Nov 2022 23:24:55 +0100 Message-Id: <20221121222456.437815-1-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mask only describes the `irq_idx % 32` part, making it generally impossible to deduce what interrupt is being enabled/disabled. Since `debug/core_irq` in debugfs (and other prints) also include the full `DPU_IRQ_IDX()` value, print the same full value here for easier correlation instead of only adding the `irq_idx / 32` part. Furthermore, make the dbgstr messages more consistent. Signed-off-by: Marijn Suijten Reviewed-by: Abhinav Kumar Reviewed-by: Martin Botka --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gp= u/drm/msm/disp/dpu1/dpu_hw_interrupts.c index cf1b6d84c18a..64589a9c2c51 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c @@ -252,9 +252,9 @@ static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_= intr *intr, int irq_idx) =20 cache_irq_mask =3D intr->cache_irq_mask[reg_idx]; if (cache_irq_mask & DPU_IRQ_MASK(irq_idx)) { - dbgstr =3D "DPU IRQ already set:"; + dbgstr =3D "already "; } else { - dbgstr =3D "DPU IRQ enabled:"; + dbgstr =3D ""; =20 cache_irq_mask |=3D DPU_IRQ_MASK(irq_idx); /* Cleaning any pending interrupt */ @@ -268,7 +268,7 @@ static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_= intr *intr, int irq_idx) intr->cache_irq_mask[reg_idx] =3D cache_irq_mask; } =20 - pr_debug("%s MASK:0x%.8lx, CACHE-MASK:0x%.8x\n", dbgstr, + pr_debug("DPU IRQ %d %senabled: MASK:0x%.8lx, CACHE-MASK:0x%.8x\n", irq_i= dx, dbgstr, DPU_IRQ_MASK(irq_idx), cache_irq_mask); =20 return 0; @@ -301,9 +301,9 @@ static int dpu_hw_intr_disable_irq_locked(struct dpu_hw= _intr *intr, int irq_idx) =20 cache_irq_mask =3D intr->cache_irq_mask[reg_idx]; if ((cache_irq_mask & DPU_IRQ_MASK(irq_idx)) =3D=3D 0) { - dbgstr =3D "DPU IRQ is already cleared:"; + dbgstr =3D "already "; } else { - dbgstr =3D "DPU IRQ mask disable:"; + dbgstr =3D ""; =20 cache_irq_mask &=3D ~DPU_IRQ_MASK(irq_idx); /* Disable interrupts based on the new mask */ @@ -317,7 +317,7 @@ static int dpu_hw_intr_disable_irq_locked(struct dpu_hw= _intr *intr, int irq_idx) intr->cache_irq_mask[reg_idx] =3D cache_irq_mask; } =20 - pr_debug("%s MASK:0x%.8lx, CACHE-MASK:0x%.8x\n", dbgstr, + pr_debug("DPU IRQ %d %sdisabled: MASK:0x%.8lx, CACHE-MASK:0x%.8x\n", irq_= idx, dbgstr, DPU_IRQ_MASK(irq_idx), cache_irq_mask); =20 return 0; --=20 2.38.1