From nobody Fri Apr 17 14:19:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50511C4167B for ; Sat, 19 Nov 2022 16:44:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234080AbiKSQor (ORCPT ); Sat, 19 Nov 2022 11:44:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231683AbiKSQoh (ORCPT ); Sat, 19 Nov 2022 11:44:37 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 335882631 for ; Sat, 19 Nov 2022 08:44:32 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id i12so9982203wrb.0 for ; Sat, 19 Nov 2022 08:44:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gpg2aVlJ1WFUczvXwULfPFs1K+cORox9hiymDZK8ezk=; b=xfSlAJxnYlmQa7mjrrt/Tl9ka/LqCla+dlVedT3ZJ98OAdrWs66XX70qBulIa8S40g QAjJ5mT0wUAgHqb7geysUT8CRmjIOY0tVx/np6yuJsn0aJEkRL3bYvupzxW4Qs8DG6Xq GwnpFuwn0Q/5Tg6F/FMiI195LCJ0bjnTXqLTKGLL9R3V80aZSNHyFD6zruHyLhRZPKyC rXf+KUcAR5mTuZ0flsLW2GUAcb7uEwuuYAEMDsvZvvPq/4eJAFHyEq1ynSMY5whm66DO QsJ8hJ33wwaDmUdSPbO9dv/n049Clwjgq5Eos2pQoak+tKZFIv11yoW/y7j0Z+SIgmVH 1lGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gpg2aVlJ1WFUczvXwULfPFs1K+cORox9hiymDZK8ezk=; b=f3qpQBVhmvMMhwty3699aOAef+W0N910kLcLm1gn8hYhe0ao+FzM7WGaCapDiSGhjC cm/bd7iqst4b36C0sxtnG61vRkYmd5fj2fF1Pj9nM7lC5cKfsuMPeQunTlTmorFJ4KiI TdR8JPmX//4D9NRz5ViUlqz8u/uSzXmE9bJXxfbI6pDsSw6A3n6grNwjYxGiGHtXr1p8 dgnixbTMwxZRI/l24hUJsV46PuvTi9rP7wZeM+8zu3+6/wtPKoJ2HOD0RRnWl5JqhxqA VC327mSt/gcvCLCTpL30yYOp9LLcFkNIEFu1VqUVCXZNLtp8EebJM5RGXao4jbrEFUJD BLrg== X-Gm-Message-State: ANoB5pmN7YPLQRx6WUKk7GRko9Sa5x8wsXOFS4InrxvSBwHfh8i3Yh38 hue8EeNUojo9NYppFP9UV0f5AA== X-Google-Smtp-Source: AA0mqf7HzAJDF1KWTDkzgXtiIc590uVIHVWgDrLBnNi6oH0wtpleZWPcY1LWVQ0Vlh5rjGFc7k3h2A== X-Received: by 2002:a05:6000:501:b0:22c:d27d:12e4 with SMTP id a1-20020a056000050100b0022cd27d12e4mr6839585wrf.546.1668876270529; Sat, 19 Nov 2022 08:44:30 -0800 (PST) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id 23-20020a05600c229700b003cf75213bb9sm12312220wmf.8.2022.11.19.08.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Nov 2022 08:44:29 -0800 (PST) From: Srinivas Kandagatla To: agross@kernel.org, andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 1/3] arm64: dts: qcom: sc8280xp/sa8540p: add gpr node Date: Sat, 19 Nov 2022 16:44:23 +0000 Message-Id: <20221119164425.86014-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> References: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add GPR node along with APM(Audio Process Manager) and PRM(Proxy resource Manager) audio services. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index c32bcded2aef..a610c12103bf 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include =20 / { interrupt-parent =3D <&intc>; @@ -1152,9 +1153,48 @@ IPCC_MPROC_SIGNAL_GLINK_QMP =20 label =3D "lpass"; qcom,remote-pid =3D <2>; + + gpr { + compatible =3D "qcom,gpr"; + qcom,glink-channels =3D "adsp_apps"; + qcom,domain =3D ; + qcom,intents =3D <512 20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + q6apm: service@1 { + compatible =3D "qcom,q6apm"; + reg =3D ; + #sound-dai-cells =3D <0>; + qcom,protection-domain =3D "avs/audio", + "msm/adsp/audio_pd"; + q6apmdai: dais { + compatible =3D "qcom,q6apm-dais"; + iommus =3D <&apps_smmu 0x0c01 0x0>; + }; + + q6apmbedai: bedais { + compatible =3D "qcom,q6apm-lpass-dais"; + #sound-dai-cells =3D <1>; + }; + }; + + q6prm: service@2 { + compatible =3D "qcom,q6prm"; + reg =3D ; + qcom,protection-domain =3D "avs/audio", + "msm/adsp/audio_pd"; + q6prmcc: clock-controller { + compatible =3D "qcom,q6prm-lpass-clocks"; + clock-controller; + #clock-cells =3D <2>; + }; + }; + }; }; }; =20 + usb_0_qmpphy: phy-wrapper@88ec000 { compatible =3D "qcom,sc8280xp-qmp-usb43dp-phy"; reg =3D <0 0x088ec000 0 0x1e4>, --=20 2.25.1 From nobody Fri Apr 17 14:19:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C46DC4332F for ; Sat, 19 Nov 2022 16:45:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234440AbiKSQo7 (ORCPT ); Sat, 19 Nov 2022 11:44:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231626AbiKSQoh (ORCPT ); Sat, 19 Nov 2022 11:44:37 -0500 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 769612BE9 for ; Sat, 19 Nov 2022 08:44:33 -0800 (PST) Received: by mail-wr1-x42d.google.com with SMTP id b12so33154wrn.2 for ; Sat, 19 Nov 2022 08:44:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RWFz25sJV3TZeC3mAJPMht/Wp5uUurPaAZSq9tuUTRU=; b=E5PdHiYVl78qUPj+O68XtmWaMnY10FKaHd9V3gW1hUTxHFwXmMgqPDYckBmyexsCdg n5wJUIO2HneC2rOEJKLCYpiG237IARUczDyEi2BzRDvFI74naBDqPxJeBXXA0NgVsHgU SlDvxetcvGfjsP18sVrrEGrQzEAlYuwGv0uKih0fiGOZhZ4WW40waH2rg896yZJLNzzi AnKcV53hswmucM5xgjhwsxRglnvcTB1o1NKS+43fttraQvWsIyGXqOEh2Atm4pCbRChR L+DhMW+SdCjmlWI/9Tveqx/orcQBSo9OPhf3VZAKWfXB+d6c8XoxK/WfZpj9DHDtZD2r qM/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RWFz25sJV3TZeC3mAJPMht/Wp5uUurPaAZSq9tuUTRU=; b=5xRUCtA3lUgsZJQy0y8ZDESufgkQ/sj3cjp+wKzpBDFjZvCtKkJ6i2syCmsS6Fkplh ZIMexSZaJGCcx2Erw989gZKbvfyLVeCVLW1Xa7pVb7bFn0gPFqS3HIKaYBDHxu8sp7t0 RwhBNneLSDKZ35a82u1tEUGa1QXreaEi2+WoCDkvzeBpxow2Mq0ZrZgeqWuQcwcv0LJn hRtx3QRBgoJ4NTI3uTbhyGpaO7taKiwesBrRNSCuzBs3hJXVt8H0zyrkIj3ueohipAGM WOeB4r1yU8H7lRqRYNB7djKZt577gQ3R0vbweulzi1iRXxKdv6WDJcWI3+c+mNaC32Z8 9Zgg== X-Gm-Message-State: ANoB5pmwVNDcVugU+7PlPNPqW9G/7WO4r5rhsrtbFx0vvMiEjZVupKr7 m7TXy72/2L/wAFlpBUqHPmCFMw== X-Google-Smtp-Source: AA0mqf65xVvLGTg5+a1FraeE2LTwyTvCH6bXXP7UyG0sGgbCj68nacC+5n0uoOF8KxnAjCnPoBSYIQ== X-Received: by 2002:adf:e80b:0:b0:236:59ab:cf32 with SMTP id o11-20020adfe80b000000b0023659abcf32mr7045092wrm.629.1668876271923; Sat, 19 Nov 2022 08:44:31 -0800 (PST) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id 23-20020a05600c229700b003cf75213bb9sm12312220wmf.8.2022.11.19.08.44.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Nov 2022 08:44:31 -0800 (PST) From: Srinivas Kandagatla To: agross@kernel.org, andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 2/3] arm64: dts: qcom: sc8280xp/sa8540p: add SoundWire and LPASS Date: Sat, 19 Nov 2022 16:44:24 +0000 Message-Id: <20221119164425.86014-3-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> References: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add LPASS Codecs along with SoundWire controller for TX, RX, WSA and VA mac= ros along with LPASS LPI pinctrl node. Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 319 +++++++++++++++++++++++++ 1 file changed, 319 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index a610c12103bf..e31304979a28 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include =20 @@ -1194,6 +1195,321 @@ q6prmcc: clock-controller { }; }; =20 + rxmacro: rxmacro@3200000 { + compatible =3D "qcom,sc8280xp-lpass-rx-macro"; + reg =3D <0 0x03200000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_C= OUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_= NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; + assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_AT= TRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>; + assigned-clock-rates =3D <19200000>, <19200000>; + + clock-output-names =3D "mclk"; + #clock-cells =3D <0>; + #sound-dai-cells =3D <1>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rx_swr_default>; + }; + + /* RX */ + swr1: soundwire-controller@3210000 { + compatible =3D "qcom,soundwire-v1.6.0"; + reg =3D <0 0x03210000 0 0x2000>; + interrupts =3D ; + clocks =3D <&rxmacro>; + clock-names =3D "iface"; + label =3D "RX"; + + qcom,din-ports =3D <0>; + qcom,dout-ports =3D <5>; + + qcom,ports-sinterval-low =3D /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; + qcom,ports-offset1 =3D /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>; + qcom,ports-offset2 =3D /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>; + qcom,ports-hstart =3D /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-word-length =3D /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-block-pack-mode =3D /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-lane-control =3D /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells =3D <1>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + + txmacro: txmacro@3220000 { + compatible =3D "qcom,sc8280xp-lpass-tx-macro"; + reg =3D <0 0x03220000 0 0x1000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&tx_swr_default>; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO= >, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + + clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; + assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRI= BUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE= _NO>; + assigned-clock-rates =3D <19200000>, <19200000>; + clock-output-names =3D "mclk"; + + #clock-cells =3D <0>; + #address-cells =3D <2>; + #size-cells =3D <2>; + #sound-dai-cells =3D <1>; + }; + + wsamacro: codec@3240000 { + compatible =3D "qcom,sc8280xp-lpass-wsa-macro"; + reg =3D <0 0x03240000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_= COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE= _NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; + assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_A= TTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>; + assigned-clock-rates =3D <19200000>, <19200000>; + + #clock-cells =3D <0>; + clock-output-names =3D "mclk"; + #sound-dai-cells =3D <1>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wsa_swr_default>; + }; + + /* WSA */ + swr0: soundwire-controller@3250000 { + reg =3D <0 0x03250000 0 0x2000>; + compatible =3D "qcom,soundwire-v1.6.0"; + interrupts =3D ; + clocks =3D <&wsamacro>; + clock-names =3D "iface"; + + qcom,din-ports =3D <2>; + qcom,dout-ports =3D <6>; + + qcom,ports-sinterval-low =3D /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x= 0f 0x0f>; + qcom,ports-offset1 =3D /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x= 0a>; + qcom,ports-offset2 =3D /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x= 00>; + qcom,ports-hstart =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xf= f>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff= >; + qcom,ports-word-length =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff= 0xff>; + qcom,ports-block-pack-mode =3D /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01 = 0xff 0xff>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xf= f 0xff 0xff>; + qcom,ports-lane-control =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xf= f 0xff>; + + #sound-dai-cells =3D <1>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + + /* TX */ + swr2: soundwire-controller@3330000 { + compatible =3D "qcom,soundwire-v1.6.0"; + reg =3D <0 0x03330000 0 0x2000>; + interrupts-extended =3D <&intc GIC_SPI 959 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "core", "wake"; + + clocks =3D <&vamacro>; + clock-names =3D "iface"; + label =3D "TX"; + #sound-dai-cells =3D <1>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + qcom,din-ports =3D <4>; + qcom,dout-ports =3D <0>; + qcom,ports-sinterval-low =3D /bits/ 8 <0x01 0x03 0x03 0x03>; + qcom,ports-offset1 =3D /bits/ 8 <0x01 0x00 0x02 0x01>; + qcom,ports-offset2 =3D /bits/ 8 <0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode =3D /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-hstart =3D /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-word-length =3D /bits/ 8 <0xff 0x00 0xff 0xff>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-lane-control =3D /bits/ 8 <0x00 0x01 0x00 0x00>; + }; + + vamacro: codec@3370000 { + compatible =3D "qcom,sc8280xp-lpass-va-macro"; + reg =3D <0 0x03370000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO= >; + clock-names =3D "mclk", "macro", "dcodec", "npl"; + assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRI= BUTE_COUPLE_NO>; + assigned-clock-rates =3D <19200000>; + + #clock-cells =3D <0>; + clock-output-names =3D "fsgen"; + #sound-dai-cells =3D <1>; + }; + + lpass_tlmm: pinctrl@33c0000 { + compatible =3D "qcom,sc8280xp-lpass-lpi-pinctrl"; + reg =3D <0 0x33c0000 0x0 0x20000>, + <0 0x3550000 0x0 0x10000>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&lpass_tlmm 0 0 18>; + + clocks =3D <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "core", "audio"; + + tx_swr_default: tx-swr-default-state { + clk-pins { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio1", "gpio2"; + function =3D "swr_tx_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + + rx_swr_default: rx-swr-default-state { + clk-pins { + pins =3D "gpio3"; + function =3D "swr_rx_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio4", "gpio5"; + function =3D "swr_rx_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + + dmic01_default: dmic01-default-state { + clk-pins { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio7"; + function =3D "dmic1_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic01_sleep: dmic01-sleep-state { + clk-pins { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + data-pins { + pins =3D "gpio7"; + function =3D "dmic1_data"; + drive-strength =3D <2>; + bias-pull-down; + input-enable; + }; + }; + + dmic02_default: dmic02-default-state { + clk-pins { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio9"; + function =3D "dmic2_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic02_sleep: dmic02-sleep-state { + clk-pins { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + data-pins { + pins =3D "gpio9"; + function =3D "dmic2_data"; + drive-strength =3D <2>; + bias-pull-down; + input-enable; + }; + }; + + wsa_swr_default: wsa-swr-default-state { + clk-pins { + pins =3D "gpio10"; + function =3D "wsa_swr_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio11"; + function =3D "wsa_swr_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + + }; + }; + + wsa2_swr_default: wsa2-swr-default-state { + clk-pins { + pins =3D "gpio15"; + function =3D "wsa2_swr_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio16"; + function =3D "wsa2_swr_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + }; =20 usb_0_qmpphy: phy-wrapper@88ec000 { compatible =3D "qcom,sc8280xp-qmp-usb43dp-phy"; @@ -2029,6 +2345,9 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; =20 + sound: sound { + }; + thermal-zones { cpu0-thermal { polling-delay-passive =3D <250>; --=20 2.25.1 From nobody Fri Apr 17 14:19:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85E14C433FE for ; Sat, 19 Nov 2022 16:44:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234384AbiKSQox (ORCPT ); Sat, 19 Nov 2022 11:44:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234179AbiKSQok (ORCPT ); Sat, 19 Nov 2022 11:44:40 -0500 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13152EA2 for ; Sat, 19 Nov 2022 08:44:34 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id cl5so13841119wrb.9 for ; Sat, 19 Nov 2022 08:44:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kL9Vrr8MqLlSXcoKfYmXg48ruAsZ82320yLE2edaij4=; b=IARl2Zh8ywm95fyw1GAQFbA7pTqWfGKaKBb7rLvA5WIAqm8EtUBK1zf+7PaRIZ2POY u4V5w6xcveET3WNQ1+noYwnE/ukD98Z/k3isFxJCpFZMwcsFYbY845hxFH7N4X3l2Kwy 7tDaGK0HxfX6qRav+ewbx1Iqau6IWc3pFbpS+/+IqfwqZgFrCa/+GuJibnPez9MM3Nly XIvwl4N9GJxAoUNTGybZxhgzxcc6Yp2+Un1vO7g2tThEFKKTkpAW1DhcvQOsyevbHbWO 5Srb7Y0fnT0oPI6oXOKHvz6rCgqNi3nDqIW6NNwYuDsCITEU7sdhVjy9giK9e6NOQ4br RIOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kL9Vrr8MqLlSXcoKfYmXg48ruAsZ82320yLE2edaij4=; b=f+8Y7xiXswO5vZtfylYdmET+umu8e2Jzp//Cfd9pX+PEEVMcj2Mh5l6/fnMgQjGIK6 CuMI7AdPL7M0SECzj//oMJAdURaAV2GyZLjX7iU3Ur8Po3s/6JnNwCN6/lOQ6791Rlie 42Thbiwc35I+eBc5+zoLj7HJjYbQYBCxwEgMPBC9OgGsYKjEpG6bXbsFwymqty5Z6wKZ u8v4vs2KBY7tsC66kjmD+bE7/HpLUqwmCWwC4R4E7EZwEcLD0KGljTXYffu/JPntzobd 7oYW/xkSC30iF4ayesuRCbkTD0oaKFucfFTsPAYB8GLuMiVxCiz02UkTOmabGMUbVDlX g74g== X-Gm-Message-State: ANoB5pk21klj1RAuXqPhOKqJpsw6IKevxL8OnhZSBHI2r0p+oM/Hh272 nmj3OA3byHjGDKRlp9jRB9wnaA== X-Google-Smtp-Source: AA0mqf4xpqgTNAewBqQQbDNtHW/KT0dvyKzC+cxtlidQwz+InFcHq6stH1xbVHxbvOev3fhSnrTx2w== X-Received: by 2002:a5d:6746:0:b0:22e:39c9:a4a6 with SMTP id l6-20020a5d6746000000b0022e39c9a4a6mr7215384wrw.170.1668876273378; Sat, 19 Nov 2022 08:44:33 -0800 (PST) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id 23-20020a05600c229700b003cf75213bb9sm12312220wmf.8.2022.11.19.08.44.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Nov 2022 08:44:32 -0800 (PST) From: Srinivas Kandagatla To: agross@kernel.org, andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 3/3] arm64: dts: qcom: sc8280xp: Add soundcard support Date: Sat, 19 Nov 2022 16:44:25 +0000 Message-Id: <20221119164425.86014-4-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> References: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for SoundCard on X13s. This patch adds support for Headset Playback, record and 2 DMICs on the Panel along with the regulators required for powering up the LPASS codecs. Signed-off-by: Srinivas Kandagatla --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 217 ++++++++++++++++++ 1 file changed, 217 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/a= rch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index b2b744bb8a53..f1f93fc4fa2d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -58,6 +58,16 @@ vreg_misc_3p3: regulator-misc-3p3 { regulator-boot-on; regulator-always-on; }; + + vreg_vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + regulator-name =3D "VPH_VCC3R9"; + regulator-min-microvolt =3D <3900000>; + regulator-max-microvolt =3D <3900000>; + + regulator-always-on; + regulator-boot-on; + }; }; =20 &apps_rsc { @@ -67,6 +77,13 @@ pmc8280-1-rpmh-regulators { =20 vdd-l3-l5-supply =3D <&vreg_s11b>; =20 + vreg_s10b: smps10 { + regulator-name =3D "vreg_s10b"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + vreg_s11b: smps11 { regulator-name =3D "vreg_s11b"; regulator-min-microvolt =3D <1272000>; @@ -74,6 +91,13 @@ vreg_s11b: smps11 { regulator-initial-mode =3D ; }; =20 + vreg_s12b: smps12 { + regulator-name =3D "vreg_s12b"; + regulator-min-microvolt =3D <984000>; + regulator-max-microvolt =3D <984000>; + regulator-initial-mode =3D ; + }; + vreg_l3b: ldo3 { regulator-name =3D "vreg_l3b"; regulator-min-microvolt =3D <1200000>; @@ -102,6 +126,7 @@ vreg_l6b: ldo6 { pmc8280c-rpmh-regulators { compatible =3D "qcom,pm8350c-rpmh-regulators"; qcom,pmic-id =3D "c"; + vdd-bob-supply =3D <&vreg_vph_pwr>; =20 vreg_l1c: ldo1 { regulator-name =3D "vreg_l1c"; @@ -123,6 +148,13 @@ vreg_l13c: ldo13 { regulator-max-microvolt =3D <3072000>; regulator-initial-mode =3D ; }; + + vreg_bob: bob { + regulator-name =3D "vreg_bob"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; }; =20 pmc8280-2-rpmh-regulators { @@ -346,6 +378,163 @@ edp_bl_pwm: edp-bl-pwm-state { }; }; =20 +&soc { + wcd938x: codec { + compatible =3D "qcom,wcd9380-codec"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wcd_default>; + reset-gpios =3D <&tlmm 106 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <1>; + + vdd-buck-supply =3D <&vreg_s10b>; + vdd-rxtx-supply =3D <&vreg_s10b>; + vdd-io-supply =3D <&vreg_s10b>; + vdd-mic-bias-supply =3D <&vreg_bob>; + qcom,micbias1-microvolt =3D <1800000>; + qcom,micbias2-microvolt =3D <1800000>; + qcom,micbias3-microvolt =3D <1800000>; + qcom,micbias4-microvolt =3D <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt =3D <75000 150000 237000 500000 5= 00000 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt =3D <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt =3D <50000>; + qcom,rx-device =3D <&wcd_rx>; + qcom,tx-device =3D <&wcd_tx>; + }; +}; + +&sound { + compatible =3D "qcom,sc8280xp-sndcard"; + model =3D "SC8280XP-LENOVO-X13S"; + audio-routing =3D + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS1", + "VA DMIC1", "MIC BIAS1", + "VA DMIC2", "MIC BIAS3", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "MIC BIAS2", + "TX DMIC2", "MIC BIAS3", + "TX SWR_ADC1", "ADC2_OUTPUT"; + + wcd-playback-dai-link { + link-name =3D "WCD Playback"; + cpu { + sound-dai =3D <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai =3D <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wcd-capture-dai-link { + link-name =3D "WCD Capture"; + cpu { + sound-dai =3D <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + codec { + sound-dai =3D <&wcd938x 1>, <&swr2 0>, <&txmacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wsa-dai-link { + link-name =3D "WSA Playback"; + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai =3D <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + cpu { + sound-dai =3D <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + + codec { + sound-dai =3D <&vamacro 0>; + }; + }; +}; + +&swr0 { + left_spkr: wsa8830-left@0,1 { + compatible =3D "sdw10217020200"; + reg =3D <0 1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spkr_1_sd_n_default>; + powerdown-gpios =3D <&tlmm 178 GPIO_ACTIVE_LOW>; + #thermal-sensor-cells =3D <0>; + sound-name-prefix =3D "SpkrLeft"; + #sound-dai-cells =3D <0>; + vdd-supply =3D <&vreg_s10b>; + }; + + right_spkr: wsa8830-right@0,2{ + compatible =3D "sdw10217020200"; + reg =3D <0 2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spkr_2_sd_n_default>; + powerdown-gpios =3D <&tlmm 179 GPIO_ACTIVE_LOW>; + #thermal-sensor-cells =3D <0>; + sound-name-prefix =3D "SpkrRight"; + #sound-dai-cells =3D <0>; + vdd-supply =3D <&vreg_s10b>; + }; +}; + + +&swr1 { + status =3D "okay"; + + wcd_rx: wcd9380-rx@0,4 { + compatible =3D "sdw20217010d00"; + reg =3D <0 4>; + qcom,rx-port-mapping =3D <1 2 3 4 5 6>; + + }; +}; + +&swr2 { + status =3D "okay"; + + wcd_tx: wcd9380-tx@0,3 { + compatible =3D "sdw20217010d00"; + reg =3D <0 3>; + qcom,tx-port-mapping =3D <1 1 2 3>; + }; +}; + +&vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic02_default>; + pinctrl-names =3D "default"; + vdd-micb-supply =3D <&vreg_s10b>; + qcom,dmic-sample-rate =3D <600000>; +}; + &tlmm { gpio-reserved-ranges =3D <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7= >; =20 @@ -369,6 +558,14 @@ reset { }; }; =20 + wcd_default: wcd-default-state { + reset-pins { + pins =3D "gpio106"; + function =3D "gpio"; + bias-disable; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins =3D "gpio171", "gpio172"; function =3D "qup4"; @@ -383,6 +580,26 @@ qup2_i2c5_default: qup2-i2c5-default-state { drive-strength =3D <16>; }; =20 + spkr_1_sd_n_default: spkr-1-sd-n-default-state { + perst-n-pins { + pins =3D "gpio178"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-high; + }; + }; + + spkr_2_sd_n_default: spkr-2-sd-n-default-state { + perst-n-pins { + pins =3D "gpio179"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-high; + }; + }; + tpad_default: tpad-default-state { int-n { pins =3D "gpio182"; --=20 2.25.1