From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B5AEC4332F for ; Tue, 15 Nov 2022 02:54:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231925AbiKOCyp (ORCPT ); Mon, 14 Nov 2022 21:54:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232514AbiKOCye (ORCPT ); Mon, 14 Nov 2022 21:54:34 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 580BE13F95 for ; Mon, 14 Nov 2022 18:54:31 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id k2so32947652ejr.2 for ; Mon, 14 Nov 2022 18:54:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=f8ThKzFAu45hOG2t4OpvstiYsckpTwgeVuyWuBxUZV0=; b=eHKUxvmsq1tf63Ca+kF/7sozldkxCqBu02HHCOpSR0bWsYV2VLU8EEe2uUknl4v4wi LrtNcg9gfQhJqpUyaQ4oIwlv0BSyz/p/xJcZLviM+bmja72AQga1KhFRsNR200tsSgrM r7h+Hz1N0iGHHnCddNfJc3M0TpzlkbRkhbLiJ/bSLKkjBgNaajP3EGZ9Bz8vHNnF8Fm9 rRhXZm+s9r3XDD7OR4Jl8yaf2fs626LdnQSGc8yFOho8qByGEH3escOAOvuylzD/rl/o 443eS83q+axrhVhJeG2pBSBq8RrSWhSclR54oe/ifnZYVB10Jy4S2Bz7T/TkhxbsV8CR KCbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=f8ThKzFAu45hOG2t4OpvstiYsckpTwgeVuyWuBxUZV0=; b=E0pgnEUbC480bfmii7EUxWg7dv1mU34dQ1DDaTz8I92pTGM7JxqxVqA8eNQDhndWDZ 4xjWOVwPS1Dlt9LUUGEFMl2YCC+yqni1Jm0TXDWq03yjJjaDwdLmDISAjhGOryxqMVAg BsqDpnUIkwZmP56V8/PTdYPPyBDVnQc7lQyvGWZisDOvw0wVYcifEKYSJSxvLpX1nAcl /98OSSutbvzCkWPu2iJSG49B0C+3XnNaCgsEDTP5pB0CKap1+QyAWPHIN7t4PtV/Hpkh BAKAjz5vMYuRVkXjI6WvwmwPBYmU1eyKkWNjMxsqi67SLzXtfIoj4jXDccArWqBu/m/3 k9NA== X-Gm-Message-State: ANoB5pnrO6vmlO4Np5RBHrdPXHzNGONYtFmF50CLrqtBdRMC5FVY2OGJ ocqa2LVlocZ5S2jXy8mJrj6Cwg== X-Google-Smtp-Source: AA0mqf5nU2+JFUiy+93VPslHgYMq7Dmq+CqIZhHfTk3aSrlKCtTN1geaN38Y8aIWjQyLOFPXLjhwNg== X-Received: by 2002:a17:906:abd7:b0:7ad:b791:1390 with SMTP id kq23-20020a170906abd700b007adb7911390mr12063972ejb.279.1668480869824; Mon, 14 Nov 2022 18:54:29 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:29 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 01/15] arm64: dts: mediatek: Initial mt8365-evk support Date: Tue, 15 Nov 2022 03:54:07 +0100 Message-Id: <20221115025421.59847-2-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fabien Parent This adds minimal support for the Mediatek 8365 SOC and the EVK reference board, allowing the board to boot to initramfs with serial port I/O. GPIO keys are supported, MMC is partially supported (needs the clocks driver for full support). Signed-off-by: Fabien Parent [bero@baylibre.com: Removed parts depending on drivers that aren't upstream= yet, cleanups] Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 344 +++++++++++ arch/arm64/boot/dts/mediatek/mt8365.dtsi | 601 ++++++++++++++++++++ 3 files changed, 946 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index 0ec90cb3ef289..e668fd50a3326 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -46,4 +46,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r2.= dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r3.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8365-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8516-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/= dts/mediatek/mt8365-evk.dts new file mode 100644 index 0000000000000..74e0f75231637 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -0,0 +1,344 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021-2022 BayLibre, SAS. + * Authors: + * Fabien Parent + * Bernhard Rosenkr=C3=A4nzer + */ + +/dts-v1/; + +#include +#include +#include +#include "mt8365.dtsi" + +/ { + model =3D "MediaTek MT8365 Open Platform EVK"; + compatible =3D "mediatek,mt8365-evk", "mediatek,mt8365"; + + aliases { + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:921600n8"; + }; + + firmware { + optee { + compatible =3D "linaro,optee-tz"; + method =3D "smc"; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + input-name =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio_keys>; + + key-volume-up { + gpios =3D <&pio 24 GPIO_ACTIVE_LOW>; + label =3D "volume_up"; + linux,code =3D ; + wakeup-source; + debounce-interval =3D <15>; + }; + }; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0 0x40000000 0 0xc0000000>; + }; + + usb_otg_vbus: regulator-0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "otg_vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&pio 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 12 MiB reserved for OP-TEE (BL32) + * +-----------------------+ 0x43e0_0000 + * | SHMEM 2MiB | + * +-----------------------+ 0x43c0_0000 + * | | TA_RAM 8MiB | + * + TZDRAM +--------------+ 0x4340_0000 + * | | TEE_RAM 2MiB | + * +-----------------------+ 0x4320_0000 + */ + optee_reserved: optee@43200000 { + no-map; + reg =3D <0 0x43200000 0 0x00c00000>; + }; + }; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1_pins>; + clock-frequency =3D <100000>; + status =3D "okay"; +}; + +&pio { + dpi_func_pins: dpi-func-pins { + pins { + pinmux =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + drive-strength =3D ; + }; + }; + + dpi_idle_pins: dpi-idle-pins { + pins { + pinmux =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + gpio_keys: gpio-keys-pins { + pins { + pinmux =3D ; + bias-pull-up; + input-enable; + }; + }; + + i2c1_pins: i2c1-pins { + pins { + pinmux =3D , + ; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <00>; + bias-pull-up; + }; + }; + + ite_pins: ite-pins { + pins-rst-ite { + pinmux =3D ; + output-high; + }; + + pins-irq-ite { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + + pins-pwr { + pinmux =3D , + ; + output-high; + }; + }; + + mmc0_pins_default: mmc0-default-pins { + pins-clk { + pinmux =3D ; + bias-pull-down; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-up; + }; + + pins-rst { + pinmux =3D ; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D ; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D ; + bias-pull-up =3D ; + }; + + pins-ds { + pinmux =3D ; + drive-strength =3D ; + bias-pull-down =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D ; + bias-pull-up; + }; + }; + + mmc1_pins_default: mmc1-default-pins { + pins-cd { + pinmux =3D ; + bias-pull-up; + }; + + pins-clk { + pinmux =3D ; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + bias-pull-up =3D ; + }; + }; + + mmc1_pins_uhs: mmc1-uhs-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D ; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D ; + bias-pull-up =3D ; + }; + }; + + uart0_pins: uart0-pins { + pins { + pinmux =3D , + ; + }; + }; + + uart1_pins: uart1-pins { + pins { + pinmux =3D , + ; + }; + }; + + uart2_pins: uart2-pins { + pins { + pinmux =3D , + ; + }; + }; + + usb_pins: usb-pins { + pins-id { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + + pins-usb0-vbus { + pinmux =3D ; + output-high; + }; + + pin-usb1-vbus { + pinmux =3D ; + output-high; + }; + }; + + pwm_pins: pwm-pins { + pins { + pinmux =3D , + ; + }; + }; +}; + +&pwm { + pinctrl-0 =3D <&pwm_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&uart0 { + pinctrl-0 =3D <&uart0_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&uart1 { + pinctrl-0 =3D <&uart1_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&uart2 { + pinctrl-0 =3D <&uart2_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts= /mediatek/mt8365.dtsi new file mode 100644 index 0000000000000..1cf2172081b20 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -0,0 +1,601 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * (C) 2018 MediaTek Inc. + * Copyright (C) 2022 BayLibre SAS + * Fabien Parent + * Bernhard Rosenkr=C3=A4nzer + */ +#include +#include +#include +#include +#include + +/ { + compatible =3D "mediatek,mt8365"; + interrupt-parent =3D <&sysirq>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus: cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu-map { + cluster0: cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + core1 { + cpu =3D <&cpu1>; + }; + core2 { + cpu =3D <&cpu2>; + }; + core3 { + cpu =3D <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x0>; + #cooling-cells =3D <2>; + enable-method =3D "psci"; + }; + + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x1>; + #cooling-cells =3D <2>; + enable-method =3D "psci"; + }; + + cpu2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x2>; + #cooling-cells =3D <2>; + enable-method =3D "psci"; + }; + + cpu3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x3>; + #cooling-cells =3D <2>; + enable-method =3D "psci"; + }; + }; + + clk26m: oscillator { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <26000000>; + clock-output-names =3D "clk26m"; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: secmon@43000000 { + no-map; + reg =3D <0 0x43000000 0 0x20000>; + }; + }; + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + compatible =3D "simple-bus"; + ranges; + + gic: interrupt-controller@c000000 { + compatible =3D "arm,gic-v3"; + #interrupt-cells =3D <4>; + interrupt-parent =3D <&gic>; + interrupt-controller; + reg =3D <0 0x0c000000 0 0x80000>, + <0 0x0c080000 0 0x80000>; + + interrupts =3D ; + }; + + topckgen: syscon@10000000 { + compatible =3D "mediatek,mt8365-topckgen", "syscon"; + reg =3D <0 0x10000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + infracfg: syscon@10001000 { + compatible =3D "mediatek,mt8365-infracfg", "syscon"; + reg =3D <0 0x10001000 0 0x1000>; + #clock-cells =3D <1>; + }; + + pericfg: syscon@10003000 { + compatible =3D "mediatek,mt8365-pericfg", "syscon"; + reg =3D <0 0x10003000 0 0x1000>; + #clock-cells =3D <1>; + }; + + syscfg_pctl: syscfg-pctl@10005000 { + compatible =3D "mediatek,mt8365-syscfg", "syscon"; + reg =3D <0 0x10005000 0 0x1000>; + }; + + watchdog: watchdog@10007000 { + compatible =3D "mediatek,mt8365-wdt", + "mediatek,mt6589-wdt"; + reg =3D <0 0x10007000 0 0x100>; + #reset-cells =3D <1>; + }; + + gpt: apxgpt@10008000 { + compatible =3D "mediatek,mt8365-timer", + "mediatek,mt6577-timer"; + reg =3D <0 0x10008000 0 0x1000>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_SYS_26M_D2>; + clock-names =3D "clk13m"; + }; + + pio: pinctrl@1000b000 { + compatible =3D "mediatek,mt8365-pinctrl"; + reg =3D <0 0x1000b000 0 0x1000>; + mediatek,pctl-regmap =3D <&syscfg_pctl>; + pins-are-numbered; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + apmixedsys: syscon@1000c000 { + compatible =3D "mediatek,mt8365-apmixedsys", "syscon"; + reg =3D <0 0x1000c000 0 0x1000>; + #clock-cells =3D <1>; + }; + + pwrap: pwrap@1000d000 { + compatible =3D "mediatek,mt8365-pwrap"; + reg =3D <0 0x1000d000 0 0x1000>; + reg-names =3D "pwrap"; + interrupts =3D ; + clocks =3D <&infracfg CLK_IFR_PWRAP_SPI>, + <&infracfg CLK_IFR_PMIC_AP>, + <&infracfg CLK_IFR_PWRAP_SYS>, + <&infracfg CLK_IFR_PWRAP_TMR>; + clock-names =3D "spi", "wrap", "sys", "tmr"; + }; + + keypad: keypad@10010000 { + compatible =3D "mediatek,mt6779-keypad"; + reg =3D <0 0x10010000 0 0x1000>; + wakeup-source; + interrupts =3D ; + clocks =3D <&clk26m>; + clock-names =3D "kpd"; + status =3D "disabled"; + }; + + mcucfg: syscon@10200000 { + compatible =3D "mediatek,mt8365-mcucfg", "syscon"; + reg =3D <0 0x10200000 0 0x2000>; + #clock-cells =3D <1>; + }; + + sysirq: interrupt-controller@10200a80 { + compatible =3D "mediatek,mt8365-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + reg =3D <0 0x10200a80 0 0x20>; + }; + + infracfg: infracfg@1020e000 { + compatible =3D "mediatek,mt8365-infracfg", "syscon"; + reg =3D <0 0x1020e000 0 0x1000>; + }; + + rng: rng@1020f000 { + compatible =3D "mediatek,mt8365-rng", + "mediatek,mt7623-rng"; + reg =3D <0 0x1020f000 0 0x100>; + clocks =3D <&infracfg CLK_IFR_TRNG>; + clock-names =3D "rng"; + }; + + apdma: dma-controller@11000280 { + compatible =3D "mediatek,mt8365-uart-dma", + "mediatek,mt6577-uart-dma"; + reg =3D <0 0x11000280 0 0x80>, + <0 0x11000300 0 0x80>, + <0 0x11000380 0 0x80>, + <0 0x11000400 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>; + interrupts =3D , + , + , + , + , + ; + dma-requests =3D <6>; + clocks =3D <&infracfg CLK_IFR_AP_DMA>; + clock-names =3D "apdma"; + #dma-cells =3D <1>; + }; + + auxadc: adc@11001000 { + compatible =3D "mediatek,mt8365-auxadc", + "mediatek,mt8173-auxadc"; + reg =3D <0 0x11001000 0 0x1000>; + clocks =3D <&infracfg CLK_IFR_AUXADC>; + clock-names =3D "main"; + #io-channel-cells =3D <1>; + }; + + uart0: serial@11002000 { + compatible =3D "mediatek,mt8365-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11002000 0 0x1000>; + interrupts =3D ; + clocks =3D <&clk26m>, <&infracfg CLK_IFR_UART0>; + clock-names =3D "baud", "bus"; + dmas =3D <&apdma 0>, <&apdma 1>; + dma-names =3D "tx", "rx"; + status =3D "disabled"; + }; + + uart1: serial@11003000 { + compatible =3D "mediatek,mt8365-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11003000 0 0x1000>; + interrupts =3D ; + clocks =3D <&clk26m>, <&infracfg CLK_IFR_UART1>; + clock-names =3D "baud", "bus"; + dmas =3D <&apdma 2>, <&apdma 3>; + dma-names =3D "tx", "rx"; + status =3D "disabled"; + }; + + uart2: serial@11004000 { + compatible =3D "mediatek,mt8365-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11004000 0 0x1000>; + interrupts =3D ; + clocks =3D <&clk26m>, <&infracfg CLK_IFR_UART2>; + clock-names =3D "baud", "bus"; + dmas =3D <&apdma 4>, <&apdma 5>; + dma-names =3D "tx", "rx"; + status =3D "disabled"; + }; + + pwm: pwm@11006000 { + compatible =3D "mediatek,mt8365-pwm"; + reg =3D <0 0x11006000 0 0x1000>; + #pwm-cells =3D <2>; + interrupts =3D ; + clocks =3D <&infracfg CLK_IFR_PWM_HCLK>, + <&infracfg CLK_IFR_PWM>, + <&infracfg CLK_IFR_PWM1>, + <&infracfg CLK_IFR_PWM2>, + <&infracfg CLK_IFR_PWM3>; + clock-names =3D "top", "main", "pwm1", "pwm2", "pwm3"; + }; + + i2c0: i2c@11007000 { + compatible =3D "mediatek,mt8365-i2c", + "mediatek,mt8168-i2c"; + reg =3D <0 0x11007000 0 0xa0>, + <0 0x11000080 0 0x80>; + interrupts =3D ; + clock-div =3D <1>; + clocks =3D <&infracfg CLK_IFR_I2C0_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names =3D "main", "dma"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + i2c1: i2c@11008000 { + compatible =3D "mediatek,mt8365-i2c", + "mediatek,mt8168-i2c"; + reg =3D <0 0x11008000 0 0xa0>, + <0 0x11000100 0 0x80>; + interrupts =3D ; + clock-div =3D <1>; + clocks =3D <&infracfg CLK_IFR_I2C1_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names =3D "main", "dma"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + i2c2: i2c@11009000 { + compatible =3D "mediatek,mt8365-i2c", + "mediatek,mt8168-i2c"; + reg =3D <0 0x11009000 0 0xa0>, + <0 0x11000180 0 0x80>; + interrupts =3D ; + clock-div =3D <1>; + clocks =3D <&infracfg CLK_IFR_I2C2_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names =3D "main", "dma"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + spi: spi@1100a000 { + compatible =3D "mediatek,mt8365-spi", + "mediatek,mt7622-spi"; + reg =3D <0 0x1100a000 0 0x100>; + #address-cells =3D <1>; + #size-cells =3D <0>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_UNIVPLL2_D4>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_IFR_SPI0>; + clock-names =3D "parent-clk", "sel-clk", "spi-clk"; + status =3D "disabled"; + }; + + thermal: thermal@1100b000 { + compatible =3D "mediatek,mt8365-thermal"; + reg =3D <0 0x1100b000 0 0x1000>; + interrupts =3D ; + clocks =3D <&infracfg CLK_IFR_THERM>, + <&infracfg CLK_IFR_AUXADC>; + clock-names =3D "therm", "auxadc"; + mediatek,auxadc =3D <&auxadc>; + mediatek,apmixedsys =3D <&apmixedsys>; + nvmem-cells =3D <&thermal_calibration>; + nvmem-cell-names =3D "calibration-data"; + #thermal-sensor-cells =3D <1>; + }; + + i2c3: i2c@1100f000 { + compatible =3D "mediatek,mt8365-i2c", + "mediatek,mt8168-i2c"; + reg =3D <0 0x1100f000 0 0xa0>, + <0 0x11000200 0 0x80>; + interrupts =3D ; + clock-div =3D <1>; + clocks =3D <&infracfg CLK_IFR_I2C3_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names =3D "main", "dma"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + ssusb: usb@11201000 { + compatible =3D "mediatek,mt8365-mtu3", "mediatek,mtu3"; + reg =3D <0 0x11201000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names =3D "mac", "ippc"; + interrupts =3D ; + phys =3D <&u2port0 PHY_TYPE_USB2>, + <&u2port1 PHY_TYPE_USB2>; + clocks =3D <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>, + <&infracfg CLK_IFR_SSUSB_REF>, + <&infracfg CLK_IFR_SSUSB_SYS>, + <&infracfg CLK_IFR_ICUSB>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", + "dma_ck"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + status =3D "disabled"; + + usb_host: usb@11200000 { + compatible =3D "mediatek,mt8365-xhci", + "mediatek,mtk-xhci"; + reg =3D <0 0x11200000 0 0x1000>; + reg-names =3D "mac"; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>, + <&infracfg CLK_IFR_SSUSB_REF>, + <&infracfg CLK_IFR_SSUSB_SYS>, + <&infracfg CLK_IFR_ICUSB>, + <&infracfg CLK_IFR_SSUSB_XHCI>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck"; + status =3D "disabled"; + }; + }; + + mmc0: mmc@11230000 { + compatible =3D "mediatek,mt8365-mmc", "mediatek,mt8183-mmc"; + reg =3D <0 0x11230000 0 0x1000>, + <0 0x11cd0000 0 0x1000>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_MSDC50_0_SEL>, + <&infracfg CLK_IFR_MSDC0_HCLK>, + <&infracfg CLK_IFR_MSDC0_SRC>; + clock-names =3D "source", "hclk", "source_cg"; + status =3D "disabled"; + }; + + mmc1: mmc@11240000 { + compatible =3D "mediatek,mt8365-mmc", "mediatek,mt8183-mmc"; + reg =3D <0 0x11240000 0 0x1000>, + <0 0x11c90000 0 0x1000>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_MSDC30_1_SEL>, + <&infracfg CLK_IFR_MSDC1_HCLK>, + <&infracfg CLK_IFR_MSDC1_SRC>; + clock-names =3D "source", "hclk", "source_cg"; + status =3D "disabled"; + }; + + ethernet: ethernet@112a0000 { + compatible =3D "mediatek,mt8365-eth"; + reg =3D <0 0x112a0000 0 0x1000>; + mediatek,pericfg =3D <&infracfg>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_ETH_SEL>, + <&infracfg CLK_IFR_NIC_AXI>, + <&infracfg CLK_IFR_NIC_SLV_AXI>; + clock-names =3D "core", "reg", "trans"; + status =3D "disabled"; + }; + + mipi_tx0: dsi-phy@11c00000 { + compatible =3D "mediatek,mt8365-mipi-tx", + "mediatek,mt8183-mipi-tx"; + reg =3D <0 0x11c00000 0 0x800>; + clocks =3D <&clk26m>; + clock-names =3D "ref_clk"; + #clock-cells =3D <0>; + #phy-cells =3D <0>; + clock-output-names =3D "mipi_tx0_pll"; + }; + + efuse: efuse@11c50000 { + compatible =3D "mediatek,mt8365-efuse", "mediatek,efuse"; + reg =3D <0 0x11c50000 0 0x1000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + + thermal_calibration: calib@180 { + reg =3D <0x180 0xc>; + }; + }; + + u3phy: t-phy@11cc0000 { + compatible =3D "mediatek,mt8365-tphy", + "mediatek,generic-tphy-v2"; + #address-cells =3D <2>; + #size-cells =3D <2>; + #phy-cells =3D <1>; + ranges; + + u2port0: usb-phy@11cc0000 { + reg =3D <0 0x11cc0000 0 0x400>; + clocks =3D <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>, + <&topckgen CLK_TOP_USB20_48M_EN>; + clock-names =3D "ref", "da_ref"; + #phy-cells =3D <1>; + }; + + u2port1: usb-phy@11cc1000 { + reg =3D <0 0x11cc1000 0 0x400>; + clocks =3D <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>, + <&topckgen CLK_TOP_USB20_48M_EN>; + clock-names =3D "ref", "da_ref"; + #phy-cells =3D <1>; + }; + }; + + mfgcfg: syscon@13000000 { + compatible =3D "mediatek,mt8365-mfgcfg", "syscon"; + reg =3D <0 0x13000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + mmsys: syscon@14000000 { + compatible =3D "mediatek,mt8365-mmsys", "syscon"; + reg =3D <0 0x14000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + camsys: syscon@15000000 { + compatible =3D "mediatek,mt8365-imgsys", "syscon"; + reg =3D <0 0x15000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + vdecsys: syscon@16000000 { + compatible =3D "mediatek,mt8365-vdecsys", "syscon"; + reg =3D <0 0x16000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + vencsys: syscon@17000000 { + compatible =3D "mediatek,mt8365-vencsys", "syscon"; + reg =3D <0 0x17000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + apu: syscon@19020000 { + compatible =3D "mediatek,mt8365-apu", "syscon"; + reg =3D <0 0x19020000 0 0x1000>; + #clock-cells =3D <1>; + }; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive =3D <1000>; /* milliseconds */ + polling-delay =3D <1000>; /* milliseconds */ + thermal-sensors =3D <&thermal 0>; + + trips { + threshold: trip-point0 { + temperature =3D <95000>; + hysteresis =3D <2000>; + type =3D "passive"; + }; + + target: trip-point1 { + temperature =3D <105000>; + hysteresis =3D <2000>; + type =3D "passive"; + }; + + cpu_crit: cpu_crit0 { + temperature =3D <117000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + + cooling-maps { + map0 { + trip =3D <&target>; + cooling-device =3D + <&cpu0 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu1 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu2 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu3 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution =3D <100>; + }; + }; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + ; + }; +}; --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7CD0C4321E for ; Tue, 15 Nov 2022 02:54:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236642AbiKOCyi (ORCPT ); Mon, 14 Nov 2022 21:54:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232435AbiKOCyd (ORCPT ); Mon, 14 Nov 2022 21:54:33 -0500 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29C4314003 for ; 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Mon, 14 Nov 2022 18:54:30 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 02/15] dt-bindings: watchdog: mtk-wdt: Add MT8365 SoC bindings Date: Tue, 15 Nov 2022 03:54:08 +0100 Message-Id: <20221115025421.59847-3-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add binding documentation for the MT8365 SoC. Signed-off-by: Fabien Parent Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Docum= entation/devicetree/bindings/watchdog/mtk-wdt.txt index 762c62e428ef2..835af28b46de0 100644 --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt @@ -20,6 +20,7 @@ Required properties: "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516 "mediatek,mt8192-wdt": for MT8192 "mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195 + "mediatek,mt8365-wdt", "mediatek,mt6589-wdt": for MT8365 =20 - reg : Specifies base physical address and size of the registers. =20 --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D179C43217 for ; Tue, 15 Nov 2022 02:54:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236787AbiKOCyl (ORCPT ); Mon, 14 Nov 2022 21:54:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232553AbiKOCye (ORCPT ); Mon, 14 Nov 2022 21:54:34 -0500 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 035D913F29 for ; Mon, 14 Nov 2022 18:54:33 -0800 (PST) Received: by mail-ej1-x635.google.com with SMTP id kt23so32921628ejc.7 for ; Mon, 14 Nov 2022 18:54:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bhLFlyx+HwJ1ZM4Lgtghsv3nWTmtK87TqidUEKXNRv0=; b=mwiE5YmA64m7c9RqpS46cGxcmWS3abT7KJjEHko54IFdBQzl2rDTmvWMNjmpZYQPMx +e7PSOkqjf3gsQ/OYibbL7V3OHS3HVIdBXxkZxY12kpV2gyMHIsU5YYAwQwWbth/EBmo k9/V5mOgogsH5yeo2SizHPHCID58H5PD+jTQ1sopX2I3iCupyDUUsU04QKb4LDLj9pDJ atK77+jCvg/GeeLNFHAb/5GLnr9wTVBd539NB61eMhOHArYpGYeNE/Wuz4MhKv06gimQ xXo1M8la1v4Xynsd4snlm5cHjKQZFmSIdBRJz8bDkaCL+8bnBhWGKvK1qBYIEJXHweji V5HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bhLFlyx+HwJ1ZM4Lgtghsv3nWTmtK87TqidUEKXNRv0=; b=STZEmL5j+Y5n4lZnzJzYzO7qVIPsz3THXjayYONUY7sJ6UpZUQ9+U0ggwvcocfinfd +meywH9u4/zwcxBNgg9KsbKmyVLWXtD3w82X3tsHTCRuLccoMtE8TjtbkJCl0oOZnhkD rVhq/erHjAuWGhqOApIT3plZAVYGeDe7GfP/ER09k3no63lcwriMoJQV5k8atXlgjnug R9X8YIMJrh1o7UNIcJ0aBWeHzWbuy6kgzot8WOugII2WtfY8riBV+vM1z8yl/UOdlID1 AYTVn5A7wlmaN5vUTfsezjpjytsmkXXdn9q1qsr0VMOTqYDiBkwXGNpfpJmwt4OJlBzh 18UA== X-Gm-Message-State: ANoB5pnJzp5bqLPv2Qa1DZMZ3IrUQhKKydMOmgyodH5A2bFA1K3t4QTI Hy2l/wCy928U601/7kSoaWX5Gw== X-Google-Smtp-Source: AA0mqf5JivAi2ZF9ol363qK+7ytfa4atR05s5ByGG1JukcRFiWfAhIL4BTILOtnHOK4xhIOEg7JA5Q== X-Received: by 2002:a17:906:814:b0:78e:ebd:bf96 with SMTP id e20-20020a170906081400b0078e0ebdbf96mr12315635ejd.625.1668480871620; Mon, 14 Nov 2022 18:54:31 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:31 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 03/15] dt-bindings: iio: adc: mediatek: add MT8365 SoC bindings Date: Tue, 15 Nov 2022 03:54:09 +0100 Message-Id: <20221115025421.59847-4-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add binding for the ADC present in MT8365 SoC. Signed-off-by: Fabien Parent --- .../devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxa= dc.yaml b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.= yaml index 7f79a06e76f59..ed582c6e7ea9c 100644 --- a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml @@ -38,6 +38,7 @@ properties: - mediatek,mt8188-auxadc - mediatek,mt8195-auxadc - mediatek,mt8516-auxadc + - mediatek,mt8365-auxadc - const: mediatek,mt8173-auxadc =20 reg: --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12E2EC4332F for ; Tue, 15 Nov 2022 02:55:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231901AbiKOCy6 (ORCPT ); Mon, 14 Nov 2022 21:54:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232564AbiKOCye (ORCPT ); Mon, 14 Nov 2022 21:54:34 -0500 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8A8115814 for ; Mon, 14 Nov 2022 18:54:33 -0800 (PST) Received: by mail-ej1-x62f.google.com with SMTP id t25so32874684ejb.8 for ; Mon, 14 Nov 2022 18:54:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qMx+8lnHYaoQJGJTnVIZj+JIYuaVktQaiA/S5krH6nY=; b=nWwH779Yad8VbMbCthQlgYkEo6VK8aaVP5klpz87p2A/ZilUOS5P1mvPCviRhDoblU dcquwc41Bw+lnHD8UD87tGcSOkM8KI7nUqFQ5I4pzK4/IE0ZjwpXB8m01WISHuBOoITG 2eS+UMoQHcfes/7AORAM4G14neN5ET24bdSFF4CDiXA658PAkIYbHO6EwR86/PJZhaNp DXjv3rjHmL4CA1glBAYOqzLhs+zHoWryoJSsFc0uzqXYkbdGvgT6hIr3F6lvevkcpBBV OK8SnV0lzJ0cBz1ytKjrxBhQstItVDFINmq+XG4xK+IiBHWHGLGoF1A1gSuV2vltbVVB 84FA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qMx+8lnHYaoQJGJTnVIZj+JIYuaVktQaiA/S5krH6nY=; b=G5VCT+Kc4/3wkbBkLEbrHh/5kL7iARoh6eT+/eMe7Aaov/+ZkKrSKflqJp0Iq5cOyH Rwz70XUo+mmeEdqWrPVK0JwFKLVnyZEMZrCk7fduGn2Sd3yALRueQPENGF2z7UZPqc/t 9vkqY4U7eF+6RsucuR4lXVUijtPg7de4FApAuTWn6bwVFyOhw6vlVmtrzj3I6laq/U4n OJZnV8BYu/vPNx9wwEqlnGKqFcSR3HyeqY3oHEqEETWTzZHgGOICnvV/2Cfp7TevKX/r Ih5IefoLBWVokUJoWaGs9dtOkC2uhDs1VsNQaZX5yRWbu6dBTuBcmmO/XuTL2u5B9q0A Thjw== X-Gm-Message-State: ANoB5pnOwV/AQ1CQR1hiTJr/RK+WFNVgZexRrYRBn06WavjEzRe8yTxn 56Dxv2iU7RzUr0KaU0VSsjb5Vw== X-Google-Smtp-Source: AA0mqf44yglbutt2AVjrjMYoluO69lhUJwJSnpH2BUmbB+rceVNA9A3KNZaaoX1cHShsIHoniDXmow== X-Received: by 2002:a17:906:99d2:b0:7af:bc8:da37 with SMTP id s18-20020a17090699d200b007af0bc8da37mr3882187ejn.18.1668480872354; Mon, 14 Nov 2022 18:54:32 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:32 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 04/15] dt-bindings: i2c: i2c-mt65xx: add binding for MT8365 SoC Date: Tue, 15 Nov 2022 03:54:10 +0100 Message-Id: <20221115025421.59847-5-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add binding documentation for the MT8365 I2C controllers. Signed-off-by: Fabien Parent Acked-by: Rob Herring --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Docume= ntation/devicetree/bindings/i2c/i2c-mt65xx.yaml index 421563bf576cd..2cfed35bfd9e9 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml @@ -45,6 +45,10 @@ properties: - enum: - mediatek,mt8195-i2c - const: mediatek,mt8192-i2c + - items: + - enum: + - mediatek,mt8365-i2c + - const: mediatek,mt8168-i2c =20 reg: items: --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 265DBC43219 for ; Tue, 15 Nov 2022 02:54:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237290AbiKOCyt (ORCPT ); Mon, 14 Nov 2022 21:54:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232562AbiKOCye (ORCPT ); Mon, 14 Nov 2022 21:54:34 -0500 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99BBD140B4 for ; Mon, 14 Nov 2022 18:54:33 -0800 (PST) Received: by mail-ej1-x634.google.com with SMTP id f27so32968006eje.1 for ; Mon, 14 Nov 2022 18:54:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vmhZo5VNLi5fyIfm0Ikx5I/XDPVkL1i6Xe0lCAE5Xe4=; b=lt1TeCblLWzyNRJWdCRnEDaMwgzWRq6ybvbwqFkB3mXXLuqk/kJ2j75Du6ojxhrGMy I9ERoqqLtoPzBzmrv8PTYKz/eqJkRxbezyNn57euaFpPpI+gxrU842m+dNHsHdTKwmuh wpfecPaE9/cE/0M2kedPIGnyg121YaLiipBtXDag0Iabo9n3pje2ce9PpYqaqohkK/1d nL4+4wMGlziEHc5GKkLNXQZGdIr/Z+KQByzdvBmiJFmHKigfYK82PZlSIOc78hJ82yZ0 mJIvP/N4tmelIgqNt55sJij+Uh7ecdp07lHkL7oQjeeiU4xZ3A2ZHwN40sh8bxOFVtbC hgtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vmhZo5VNLi5fyIfm0Ikx5I/XDPVkL1i6Xe0lCAE5Xe4=; b=tmyBisKDl1onJBFSW6eGOvJb0HG/ojsjA5z41OAIDE3fDzS1FU27aDwsO48BLbSWCZ jkT3zwWoPsLL1PXDHCwQWZ7WSz6Mr4gC0tryEM+gJszVhSHnn55N3hr5tNxWpBRMQTrP tx2i6i+zGb/NWT4OAI3kd5wrd7MoPomvYaPRFHFMMTdw8rupV/oGRmaBAlyqBN/HfDbW iiM2dp8Ezj7M4t2C+iGp3M7s0vhtwBkigr1O/LI0VjsOqTUaeLj6Jk70FiMDlVsnmvuc jmtE/3RASDhqAUXXfLM/hs/JO6aoVkf1oEqwoFlud3l6vaGnfHZJV1GCK3k6OBF7wo8Y hFZg== X-Gm-Message-State: ANoB5pkfxTgSOBY6UyWAMZeefiFdGeSZcwRpko+3dllH4OEvfmnKA4uw RhroraKhQNKeWSdnm5OIFUqvQQ== X-Google-Smtp-Source: AA0mqf70M/ZlAtqMou5vdxsPpWOfSmgxc00ZXs/FLJ/+v6DQNDrithpPXRrKSjRJB+w29dS32pj+nQ== X-Received: by 2002:a17:906:4f98:b0:79f:cd7c:e861 with SMTP id o24-20020a1709064f9800b0079fcd7ce861mr11911192eju.339.1668480873211; Mon, 14 Nov 2022 18:54:33 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:32 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 05/15] dt-bindings: usb: mediatek,mtu3: add MT8365 SoC bindings Date: Tue, 15 Nov 2022 03:54:11 +0100 Message-Id: <20221115025421.59847-6-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add binding documentation for the MT8365 SoC. Signed-off-by: Fabien Parent --- Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Doc= umentation/devicetree/bindings/usb/mediatek,mtu3.yaml index 80750b0f458a8..25934871a4d85 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8188-mtu3 - mediatek,mt8192-mtu3 - mediatek,mt8195-mtu3 + - mediatek,mt8365-mtu3 - const: mediatek,mtu3 =20 reg: --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA59AC433FE for ; Tue, 15 Nov 2022 02:55:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231799AbiKOCzI (ORCPT ); Mon, 14 Nov 2022 21:55:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232312AbiKOCyg (ORCPT ); Mon, 14 Nov 2022 21:54:36 -0500 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C1521659B for ; Mon, 14 Nov 2022 18:54:35 -0800 (PST) Received: by mail-ej1-x633.google.com with SMTP id t25so32874788ejb.8 for ; Mon, 14 Nov 2022 18:54:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wRYDzS6yAt4cpvGVye2SW5vgcMntnZG/i/Ggtx20GY8=; b=EdE8bFuG4EphbFKpcxdIIfm3ak/iOs7F6ye5Bw0bJUAMo88bMnH11/qvrugOAb0cLJ /8JttmWZG+cKt4QUAgJJ8Q8SHaInulLWvMW6KaIImNUEmVu+k/yR8haNYmvu71pxC6E0 foS3sUTx6outGy/xCAtIryaY0bjeY64ogC9UuYet4q1kHfq8nEt6f2gkYlGqSDJY0/Wd RaU2nVc6RhuSy2gTRhkVbYNfaVF0J5d976lmTLy0BtAKvmGqBTYZFqRxyMLYhftYTB6M zrlWD1VNaVIuCBMowc7TKbtYCzBdfgbW/IgrERUC6ePilpBkG1ET56YiluIrKVUmBYLN e+ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wRYDzS6yAt4cpvGVye2SW5vgcMntnZG/i/Ggtx20GY8=; b=6BhL3MeQSXWZUCHLOKitq1tz+UZhiJMI+nj7ZROBhIYwHtyqKAjWuX/Ba+FI5pPcUF 9Y7W5WJm/hDGtbTeSZHIfHiAtqcMPlcLaQMVTxRZcTes8RoDaYp6j4IGA1/mlfRKBRQB i+76I8uCXg5RKJKLlLyiiCCLSpX6NCB7H4ILXEuu4Vu/g1i/5fgeMqnoF91+TTQSfvoZ ei1lCYfixvWWdEUt6i3JNKnIyDepVQZLioLo9mm9/dHEMM0Y8NjOIhXIyGF59uAJTkDT ng/cKUx6U2kI1fQaTSzd7zZlD4tFN7ZW/NLlZHiSkt2Fmxuii+kWn6BJ6M5o1c/A0rba y2vw== X-Gm-Message-State: ANoB5pnmYUU+CiVXJyCe3rPPV4zHBJLGhcSiIA9BkX6YEEc2wrMilVoE NHccIrlfkTODYCoAsLvxni7Bjg== X-Google-Smtp-Source: AA0mqf582fgL1+vzC2joPQG/FmqgK3d7CgczhTfJbJeR1vCerfkmq+R4+r8ZixBzOGX3gC+jqC9F0Q== X-Received: by 2002:a17:906:4a0f:b0:7a2:36c7:31eb with SMTP id w15-20020a1709064a0f00b007a236c731ebmr11503557eju.491.1668480874002; Mon, 14 Nov 2022 18:54:34 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:33 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 06/15] dt-bindings: usb: mediatek,mtk-xhci: add MT8365 SoC bindings Date: Tue, 15 Nov 2022 03:54:12 +0100 Message-Id: <20221115025421.59847-7-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add binding documentation for the MT8365 SoC. Signed-off-by: Fabien Parent --- Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b= /Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 939623867a646..3b92725bbc99b 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -34,6 +34,7 @@ properties: - mediatek,mt8188-xhci - mediatek,mt8192-xhci - mediatek,mt8195-xhci + - mediatek,mt8365-xhci - const: mediatek,mtk-xhci =20 reg: --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EBB4C43217 for ; Tue, 15 Nov 2022 02:55:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229733AbiKOCzD (ORCPT ); Mon, 14 Nov 2022 21:55:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236173AbiKOCyg (ORCPT ); Mon, 14 Nov 2022 21:54:36 -0500 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B5F213F08 for ; Mon, 14 Nov 2022 18:54:35 -0800 (PST) Received: by mail-ej1-x629.google.com with SMTP id m22so32850902eji.10 for ; Mon, 14 Nov 2022 18:54:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vMatkpXRBfYZcOpwK4gKTH0eFwLe1XO/MVtN1h01A6s=; b=pRx3zIId767gjM7NXVu8V8PmGqYcR/4i6pri81J2dVsTmGdFdrOVQS9XriPKKLrM2J HcM20wGyaSiFQ8RMvwo7QxPuGX3QZa+wzUO2vp54uCA3+kTb98+EbYTsOfCDZCb73VXR CV67lwPGw3xS5VvxUMJsPuI/U5112u40Ltq6VsXTZ3VOQJBT8fsLEmFmbyNaHClpeSij mE4/7af4eNSDOYLZhNMzXu4KzBdWKcRKQy+wk5FUHrOuckKoHpRyw0K59WZcLmEB2JoG 1hPsAxDy/cfLbqlgFXhx2CWBcXO2qBIcn3fFsxXE+ok1XQDbMpqhdE9nbCf+eRqR7FrY /Ljg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vMatkpXRBfYZcOpwK4gKTH0eFwLe1XO/MVtN1h01A6s=; b=iO3EWsW18kXn0Yz+lLHAyQwwVbh+PVdvbz6ODuaTyXsVsNOpSKpj57lnpVnrjfTNFn bpErIWDnCyMFM9pBOFyltXCZbVUSnwL+Z0W5LkU9G0I4HCIzk9GJvHRhT87hkQncbbX9 uHqXsdqD1ZGckuxObA16ebLjSMpxrMGy61cxqL+X/horf7kY1+yMrQeWxT3cWmSzgyQW 3pbJMJv4mWRtQWiFpDF0Pu+WIs23lEG8ixviiScT06LzkTM5LUhhcgBZhzujnj6fbjkR kZ2MPNW/QrDK95qkeB94q23uefC8rplx/3Uk9BP25VA8nB55LURa4x020hMMdmaGAwd4 7NIA== X-Gm-Message-State: ANoB5pmeTy0tXEfLJoZ7vRM5DWD3d32lLTbfoSpiqtDHz7X89mZ9/18m DsUnNpD8gof4rS5QEgV3Jl25xg== X-Google-Smtp-Source: AA0mqf7yVrSTl6QoiMkprqkNQ9/YAbx/qUv/mivAcZBzk781qq/v68Bm/XB1ajZuwcArbC0YNAE3pg== X-Received: by 2002:a17:906:6007:b0:78d:b6ea:174e with SMTP id o7-20020a170906600700b0078db6ea174emr12023955ejj.95.1668480874794; Mon, 14 Nov 2022 18:54:34 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:34 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 07/15] dt-bindings: mmc: mtk-sd: add bindings for MT8365 SoC Date: Tue, 15 Nov 2022 03:54:13 +0100 Message-Id: <20221115025421.59847-8-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add MMC bindings for MT8365 bindings. Signed-off-by: Fabien Parent --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentat= ion/devicetree/bindings/mmc/mtk-sd.yaml index 6f8ecb4788eb8..36f9fce8f4795 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -35,6 +35,9 @@ properties: - mediatek,mt8192-mmc - mediatek,mt8195-mmc - const: mediatek,mt8183-mmc + - items: + - const: mediatek,mt8365-mmc + - const: mediatek,mt8183-mmc =20 reg: minItems: 1 --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56D9CC4332F for ; Tue, 15 Nov 2022 02:55:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231623AbiKOCzT (ORCPT ); Mon, 14 Nov 2022 21:55:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232251AbiKOCyq (ORCPT ); Mon, 14 Nov 2022 21:54:46 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37F3916597 for ; Mon, 14 Nov 2022 18:54:37 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id bj12so32827242ejb.13 for ; Mon, 14 Nov 2022 18:54:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5dC+/yReVVtnmp1EFnfhA5gyiPu04TshQ+QR3r1EqXE=; b=fdYDr7YwhQf3T6yIFyQ7MGYT6DsEuJKYYY0VfusCG77DrHgentotQmgPxKQbH4jQms CaU0woUtv6FB4PfzuXMGao7sXiPPqdJ3ezRLhdwaprQvGPuFCbEBHJZNLhEPjMnuAbND ix5l04a/f6f21SoFK4kPx0epmC1RNnJE6Gff5E8xKr670sElcztjY+CQugFF8y4igQNs N8HfwVsZU6YULzaCkQ9g/ApCqfcH9MNdOFezY7ukElKD+OCYZL2stFlBbhc/bTUZdjnJ X4TK6XXD9Sr5FvZPGs+HhON3ZV9L2cUUO+sGP3l2BRcttDoS2tgOe9oRJLNS4ShnOLkV Vnbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5dC+/yReVVtnmp1EFnfhA5gyiPu04TshQ+QR3r1EqXE=; b=uTn7Ums3GcsbzjenNF68tRG1jhtmNn0JVzZdS8/Tv9u3wTz6BTEh8T29jNCqwsMg1V 2ykYEjr5GC3GAENP4FPuuJJUCBrj9nQ0zF2Zeg5mEe2g4+dXHMGg+gTreeo4KwdhcDLl HKdiOe/om1CJZfxE1frrkDGCd9yQg86fjq5xKDqrcoC2gLfRCDtS/hBqYae7jajcVRYo Mmw37H+cLaO39kptuj9PXdNmdvqEzcfFguMHQHyPdhg0RGnszT67Wzc/Q3t6aXUxhsnz iGsHcJMqjeI8AzOyGKzBMoIw4MQaVkoUf8jOmz5fWuDq2oZen8GUjIZ8svaxkQfE/hfs wg7g== X-Gm-Message-State: ANoB5pm3/fYgIk6+iQwCXfcXBZIDnRAAd3AuuiLFKJeVKNRYd9CbLgg1 Gi305jZ03hwc0LGNcZ4552g4ug== X-Google-Smtp-Source: AA0mqf43vKDWJvP387IvF/pav4o4KaaCLekdMIqywSmlrG137P42oFTN9+LzjZmETi7gFi7yY3TiwA== X-Received: by 2002:a17:906:a1c6:b0:7ad:d250:b907 with SMTP id bx6-20020a170906a1c600b007add250b907mr11763109ejb.737.1668480875586; Mon, 14 Nov 2022 18:54:35 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:35 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 08/15] dt-bindings: nvmem: mediatek,efuse: add MT8365 bindings Date: Tue, 15 Nov 2022 03:54:14 +0100 Message-Id: <20221115025421.59847-9-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fabien Parent Add bindings documentation for the efuse driver on MT8365 SoC. Signed-off-by: Fabien Parent --- Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/= Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml index 75e0a516e59a2..6893f2a6ea225 100644 --- a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml @@ -34,6 +34,7 @@ properties: - mediatek,mt8192-efuse - mediatek,mt8195-efuse - mediatek,mt8516-efuse + - mediatek,mt8365-efuse - const: mediatek,efuse - const: mediatek,mt8173-efuse deprecated: true --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2289C43219 for ; Tue, 15 Nov 2022 02:55:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236608AbiKOCzM (ORCPT ); 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Mon, 14 Nov 2022 18:54:36 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 09/15] dt-bindings: mfd: syscon: Add mt8365-syscfg Date: Tue, 15 Nov 2022 03:54:15 +0100 Message-Id: <20221115025421.59847-10-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document Mediatek mt8365-syscfg Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index 4e4baf53796de..3d868e42e7bca 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -50,6 +50,7 @@ properties: - marvell,armada-3700-usb2-host-misc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg + - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14A19C433FE for ; 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Mon, 14 Nov 2022 18:54:37 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:36 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 10/15] dt-bindings: timer: Add compatible for Mediatek MT8365 Date: Tue, 15 Nov 2022 03:54:16 +0100 Message-Id: <20221115025421.59847-11-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add dt-binding documentation of timer for Mediatek MT8365 SoC platform. Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt= b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index 8bbb6e94508b2..c1f40aca2d48c 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -20,6 +20,7 @@ Required properties: * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT) * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT) * "mediatek,mt8516-timer" for MT8516 compatible timers (GPT) + * "mediatek,mt8365-timer" for MT8365 compatible timers (GPT) * "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT) =20 For those SoCs that use SYST --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 060D9C433FE for ; Tue, 15 Nov 2022 02:55:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232194AbiKOCzP (ORCPT ); Mon, 14 Nov 2022 21:55:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232519AbiKOCyr (ORCPT ); Mon, 14 Nov 2022 21:54:47 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 658A61705E for ; Mon, 14 Nov 2022 18:54:38 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id k2so32948158ejr.2 for ; Mon, 14 Nov 2022 18:54:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DpYq70iArNS2pxebGHEfValI4udhqvfJfL86oolgszo=; b=jZpzIPCLwPszGkCTsJ4tZgikx63gFYR2GVtD0suFaV5Pfwh0wMVVIVaJc0b8n0ItKL YzPg3hQ/gSTUF8ZPCX4DJr9BEqwPUbV/hrlnbiFhg+HE5LRZYPKuCzGBqwgR4pgZB+49 dlcW4GU8+PJm+PhuTgVWwFu2hYvHDg//vUAjB/pSxW/g2O9rL1Fy+vw9G3UzNIQJHi/P RsDu0Z/SEI2Cz1qiTwUIkF4Lq+kEGUgSlq5UFSAJ0ET0tHg68E8IlWRK7gYBCHJZgc4x m+C7pVLeakd7IWfv+SIwWh/gG0q9hxzxrLljILfL38AyK94D1/zD2k1jUWVqOVXriKLa kk7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DpYq70iArNS2pxebGHEfValI4udhqvfJfL86oolgszo=; b=oo2F1h3js+E9TYae9mGK1CgF9fwVFnd9JvgysYLtfx/W/vHA93XNmGFM43PqjMPhcI K7xCeue1TRn6t6aCx8Spz09juCJNxTy02Yvnc38h3hNS6e0yCPsH5ZIxw1zxpOmbe0k0 wOFQ6gwbmSM3X1iWl380Mtp0AkoNhk5wFP9ctBxwjOYEjgNZo9/9zjyN3cObqJqiyE2l TL3YtylrvR/S6AMLGrhNB3hKoxdawcsSSdhPB/qewEeEMGrhrSkwyV49pdUoIJUFvc85 WZe9JUnFFmE4l9FvmHl+v0PfmDVB6ljhDVMdn4/tizUafivai6uF3f+AS8gDAXhoeY0S VW8g== X-Gm-Message-State: ANoB5plcfJP+SMcUaZj+q2fECWWKLl+8CYjIhu21gAwVRaaUoCDFpD5M ugWfd7O+NTNd5KbXnI17l53YRg== X-Google-Smtp-Source: AA0mqf5co/shIzu1tV3Gc8w2nV8igZulLE0lo7boLZ4yVocD3uz2+SF8U4mnwVOaMN12ZfEgaw1UAw== X-Received: by 2002:a17:906:b855:b0:7ac:f8e3:d547 with SMTP id ga21-20020a170906b85500b007acf8e3d547mr12211614ejb.53.1668480877956; Mon, 14 Nov 2022 18:54:37 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:37 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 11/15] dt-bindings: pinctrl: add bindings for Mediatek MT8365 SoC Date: Tue, 15 Nov 2022 03:54:17 +0100 Message-Id: <20221115025421.59847-12-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add devicetree bindings for Mediatek MT8365 pinctrl driver. Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- .../pinctrl/mediatek,mt8365-pinctrl.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt83= 65-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinc= trl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctr= l.yaml new file mode 100644 index 0000000000000..bddff8c2fd382 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT8365 Pin Controller + +maintainers: + - Bernhard Rosenkr=C3=A4nzer + +description: |+ + The MediaTek's MT8365 Pin controller is used to control SoC pins. + +properties: + compatible: + const: mediatek,mt8365-pinctrl + + reg: + minItems: 1 + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: | + Number of cells in GPIO specifier. Since the generic GPIO + binding is used, the amount of cells must be specified as 2. See the= below + mentioned gpio binding representation for description of particular = cells. + + interrupt-controller: true + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + pio: pinctrl@1000b000 { + compatible =3D "mediatek,mt8365-pinctrl"; + reg =3D <0 0x1000b000 0 0x1000>; + mediatek,pctl-regmap =3D <&syscfg_pctl>; + pins-are-numbered; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + }; --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5524AC43219 for ; Tue, 15 Nov 2022 02:55:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237537AbiKOCze (ORCPT ); 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Mon, 14 Nov 2022 18:54:38 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 12/15] dt-bindings: soc: mediatek: pwrap: add compatible for mt8365 Date: Tue, 15 Nov 2022 03:54:18 +0100 Message-Id: <20221115025421.59847-13-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add dt-binding documentation of pwrap for Mediatek MT8365 Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Doc= umentation/devicetree/bindings/soc/mediatek/pwrap.txt index d24e2bc444be3..eb6379487c910 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -31,6 +31,7 @@ Required properties in pwrap device node. "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs "mediatek,mt8195-pwrap" for MT8195 SoCs "mediatek,mt8516-pwrap" for MT8516 SoCs + "mediatek,mt8365-pwrap" for MT8365 SoCs - interrupts: IRQ for pwrap in SOC - reg-names: "pwrap" is required; "pwrap-bridge" is optional. "pwrap": Main registers base --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13701C433FE for ; Tue, 15 Nov 2022 02:55:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237320AbiKOCzi (ORCPT ); Mon, 14 Nov 2022 21:55:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237266AbiKOCyt (ORCPT ); Mon, 14 Nov 2022 21:54:49 -0500 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 366A31A389 for ; Mon, 14 Nov 2022 18:54:41 -0800 (PST) Received: by mail-ed1-x52f.google.com with SMTP id s12so20017003edd.5 for ; Mon, 14 Nov 2022 18:54:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X3nU7X0djX9jQ80iI8+t0kZ5Fy4kB3s5F+snjwXKwEE=; b=qHw6yLdaXz/BrvdOtxs23rQqN6uoD9Yq57iWVm5qtsNwRyl0txxACn1YlsXr9XGR06 X0/fXV7ooJLhtBLvSM9vlvjQz70IgAPiP/0OB1VajH1nuAHs49/uKU0sgovQglseTenS cekyB0G7jao5CsOa821xumiuslVIKSD42v79wdU6DODpP853aT4AHzZVUtVx0Ej2bJHV 4Zq7TBRoXAIUXiPJadvqueUTT8uphzsjFZxUl9HcrUyAPwwJxbu8xIWq/6o3ZBcaS5gI 7IqRN2ytMVjrpflB1xK/99Gncnx9qVl/WrqgWO5fksPIthHRzfoT484qu0KY8HfMpwkZ S+GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X3nU7X0djX9jQ80iI8+t0kZ5Fy4kB3s5F+snjwXKwEE=; b=S7WlEbuOLKdT0KvqpoUlktVMxvQ/S3ZojJpiTjOMvSuNEefkKmAiJOvP9cFQklHeKl ziXHWtP3MdXIEPpD7JoGAEd0+gA4lmoHsUNcuKpsfNx4o/bImRFybsKnIweXlWgjXPQK uMhVEVRFE9vUjpqy3cbm8q//p19Gj7vb7OhJaMAaThJ3KfOSzpg/0wXEpQtwrjRBAA5p aNJ5DWEf8AZhnV+vn7v6Oco/a79s5MM1hPm2Mh2HkPJeqIfHWokCRmSo7AghhnTzmiDJ qRFRKgna0dKlOKjM3kd+zHpFtc8du5OqTxDqrO3uopYpGAPiJD4dpeORif8c9Ral7Xt4 8xpw== X-Gm-Message-State: ANoB5pn7/yYfby+uA5tiKoHexxgayCc23K34TxJmuiK2Rx90uKxfNuTu 0u7kYyS1IPu6+AADwJOlxWlE7g== X-Google-Smtp-Source: AA0mqf5fY+yhWzH/Ndk7iEot+4/kLLx7PrL8ExjCcw5CMfSMJthgD//79QTiyAVrO97/Z5Zvj++zfA== X-Received: by 2002:aa7:cf07:0:b0:461:f1c6:1f22 with SMTP id a7-20020aa7cf07000000b00461f1c61f22mr13826229edy.95.1668480879681; Mon, 14 Nov 2022 18:54:39 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:39 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 13/15] dt-bindings: irq: mtk, sysirq: add support for mt8365 Date: Tue, 15 Nov 2022 03:54:19 +0100 Message-Id: <20221115025421.59847-14-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding documentation of mediatek,sysirq for mt8365 SoC. Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediate= k,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/media= tek,sysirq.txt index 84ced3f4179b9..3ffc60184e445 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysir= q.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysir= q.txt @@ -25,6 +25,7 @@ Required properties: "mediatek,mt6577-sysirq": for MT6577 "mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712 "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 + "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq": for MT8365 - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Use the same format as specified by GIC in arm,gic.tx= t. - reg: Physical base address of the intpol registers and length of memory --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23A76C43217 for ; Tue, 15 Nov 2022 02:55:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237179AbiKOCz3 (ORCPT ); Mon, 14 Nov 2022 21:55:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237221AbiKOCyt (ORCPT ); Mon, 14 Nov 2022 21:54:49 -0500 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C30DF1704E for ; Mon, 14 Nov 2022 18:54:40 -0800 (PST) Received: by mail-ej1-x62f.google.com with SMTP id t25so32875193ejb.8 for ; Mon, 14 Nov 2022 18:54:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tGFeLYCtw0pQ4Vg1WxSYyEWBzkxCWkgNacW8i2OpJuo=; b=eFCGkMLvHxR9VMBx62cHp0LyKbih0Hox3ctugbMQWX9AheY6hi9kUDPV16l1ngp8V/ GXvdDM4QJYKCtH0hpZWF9X97elCxk/dJs+iTF5fCuTdfoQmyMZb6CG40b/ivwNYxUPHg hXlV0S0+MlGR4gtsKASrbJE1xJJ+lnkH6+/HLFzB2lmpQqknpCneVFlWUm9Ia2s4w308 HwfTCUmmM5FfQKFOobaymjfs11RR8w3vLQ7JkCojWeYnGx0ZFUPh9HK9Z1UZ4vU3IaM+ d0NcWKKL0b4y9lR7r60Mpny0WTigF9+7cmA0EzZclFgrc/eCPbKDgvl1uZZGPOuBa8n2 eM9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tGFeLYCtw0pQ4Vg1WxSYyEWBzkxCWkgNacW8i2OpJuo=; b=QuFzRe48MWnhKGFsVlbWGB7XgDosJi1b9N6qhoj1sMWeGIV+fQPLH+s8rEe/gl7MI/ ECZsuSGWmEFUKQXwzgwWiaPQTPwcSoJH3fZU4ELbuz8VY8E7VTZss1w9D30/JazHfaR+ ExFsvLKaehRIlUx7g/q0Qc6fTwAAGTAFHAIMGId5tcISBPGgrhxEi0YXyMv2Bq4YcBBN 002HXnAwqDe1K79iQak03oBpGT0Aj7f2NWnjFD9EY449IS1Bam35rdeYr9J7LrXnUvup HIVGKRbYkEX7dtsubkpzcK7AoQAYUHriF3oeLQQQEqRaCGsyx5CVTh8CWxTOz08aUWaa fy8w== X-Gm-Message-State: ANoB5pkeeYLz9LnUnDwBDvkJeO6VLG9jX5z4RkaL5kwx+2RCB70aTqIu HVeyytoLw9lbs0qzDFaTx8/ngA== X-Google-Smtp-Source: AA0mqf44R6leH9X8yl07swkhukNegilqS07Q6onZ4yJzwtMAvw+nsL9LazTWCSfy67gQyyhv+Ch9eQ== X-Received: by 2002:a17:906:33da:b0:78d:b046:aaae with SMTP id w26-20020a17090633da00b0078db046aaaemr11872899eja.218.1668480880417; Mon, 14 Nov 2022 18:54:40 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:40 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 14/15] dt-bindings: thermal: mediatek: add documentation for MT8365 SoC Date: Tue, 15 Nov 2022 03:54:20 +0100 Message-Id: <20221115025421.59847-15-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding documentation for the Mediatek MT8365 SoC. Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- Documentation/devicetree/bindings/thermal/mediatek-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt= b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 5c7e7bdd029ab..d1b30733dfce3 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -15,6 +15,7 @@ Required properties: - "mediatek,mt7622-thermal" : For MT7622 SoC - "mediatek,mt8183-thermal" : For MT8183 family of SoCs - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 famil= y of SoCs + - "mediatek,mt8365-thermal" : for MT8365 family of SoCs - reg: Address range of the thermal controller - interrupts: IRQ for the thermal controller - clocks, clock-names: Clocks needed for the thermal controller. required --=20 2.38.1 From nobody Sat Sep 21 09:26:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C7C4C433FE for ; Tue, 15 Nov 2022 02:56:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237752AbiKOCz6 (ORCPT ); Mon, 14 Nov 2022 21:55:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237398AbiKOCzW (ORCPT ); Mon, 14 Nov 2022 21:55:22 -0500 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA2401A39C for ; Mon, 14 Nov 2022 18:54:42 -0800 (PST) Received: by mail-ej1-x635.google.com with SMTP id kt23so32922167ejc.7 for ; Mon, 14 Nov 2022 18:54:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8QyPVEosZOT9SRw8683CVFBluZOEj+iHFopqFxbf8ZA=; b=dFDH/NDClXf2CSD1KW7F9L8zDnLLNLnTxtGpa2IKbuc3la4b1QOC6sozbzE34T1Eoe sS6GY0hhKr8TQY22al0Gt3O+jvxOPKrD/FrcGK2r62uyG0MHgtqhgI4PJYqv1jA0/hec qWga7qGIP6Id7Ma1QGgRNC+ZKma/BmmoBeMpdoi/Jl5DSzRNriKj/QV1CdmDSvRj5n5A nyCso0nlV37112Lnud5HVFC/grPoF97n6otTuqL9pxaNxi5sxVVnoK22Z0O9VwvCb+eZ pcHvNEDkLNHKHGwD2odkF9Z5fTiyzo3zIqgqSXp9VpnBBU0hMARJp9VlNivj1XC5SKJM Ncig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8QyPVEosZOT9SRw8683CVFBluZOEj+iHFopqFxbf8ZA=; b=zmnqey7E88TXV6A3Kk58ocfhg/8+VupkMfs4nKQP9qZr5t9EY+QOpOE8FybS4O+H6P zxyoy0y7S3zG1+NGQgwpvhI6WBc7xCTIEOiMhxNXt4m/6LHANSb6cRJYR7yNUDvR5D7d b0VRhcu6braoWrH7TIQa44M4p6MpenbwtWIylkSnsHuF8Aj+lg2qO24EtUHlgFoeS3Jg 5KgoEG+k5pyG7aHtWea+c4sfAnApt2eHjHIRSuLGPZMDdQHjAeZz46xsy9jJKXnStCbu 9Gg/PUd4QzE0EnQx0GXIBISXHkhppshZAWAIC1X6rQh3YdDUr+F+5GRmoa7+sEEE/MnZ 3r2Q== X-Gm-Message-State: ANoB5plEcaZDZ+wz+hU0MDBA3oW+3oSP8yAIKH6mwSGbILnZQoY65Rat zyiUga2ViU8Ckkl5NzoWoNTByw== X-Google-Smtp-Source: AA0mqf7CDWJLqJW4pahh1xcfZ1GfdwJmgRCtm/3IYxaNGTgYbs4RnFwtJoamf2O2tqJFNYKrqqu4Rw== X-Received: by 2002:a17:906:32d5:b0:79d:f5f2:6f55 with SMTP id k21-20020a17090632d500b0079df5f26f55mr11497106ejk.531.1668480881181; Mon, 14 Nov 2022 18:54:41 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id l9-20020a1709063d2900b0073d9a0d0cbcsm4861177ejf.72.2022.11.14.18.54.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 18:54:40 -0800 (PST) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com Subject: [PATCH v2 15/15] dt-bindings: arm64: dts: mediatek: Add mt8365-evk board Date: Tue, 15 Nov 2022 03:54:21 +0100 Message-Id: <20221115025421.59847-16-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221115025421.59847-1-bero@baylibre.com> References: <20221107211001.257393-1-bero@baylibre.com> <20221115025421.59847-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add bindings for the Mediatek mt8365-evk board. Signed-off-by: Bernhard Rosenkr=C3=A4nzer --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index d76ce4c3819db..6781fcdb9fe69 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -246,6 +246,10 @@ properties: - enum: - mediatek,mt8516-pumpkin - const: mediatek,mt8516 + - items: + - enum: + - mediatek,mt8365-evk + - const: mediatek, mt8365 =20 additionalProperties: true =20 --=20 2.38.1