From nobody Mon Apr 13 20:08:10 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 961BCC4332F for ; Wed, 16 Nov 2022 11:01:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230052AbiKPLBZ (ORCPT ); Wed, 16 Nov 2022 06:01:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238757AbiKPLAr (ORCPT ); Wed, 16 Nov 2022 06:00:47 -0500 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A97023EBA for ; Wed, 16 Nov 2022 02:48:39 -0800 (PST) Received: by mail-wr1-x42e.google.com with SMTP id w14so29224235wru.8 for ; Wed, 16 Nov 2022 02:48:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:from:to:cc:subject:date:message-id:reply-to; bh=xJpNB4o6sq/KoJPxbv4+HnBkm66WaeN+eBfhYyJgn4g=; b=UeYzRKm/WhtHDkCjsXfmP7gUPfeiY7xA8g2hujjlhyX3DeE+PbdvVRoL+pald37lTr /g3n4PTJ3xewNd2bIDUjBsNLOqvBM6uas/KDPqND5VCGkNirUyLwXowDZUrNon7psvT9 nCQCytL03SRgg1zzL34yafwk1GH23FEpkNv+0rWHiY6DmFjYMcLE1H+IXWkTDqX3/w8E A7GvFWgTnaJSemUFCsbBUNDAQF/85p/ueVyfyBozS3g93ylZ1VRcpSPzQJYGfb3OxR9A qWf2uI/5ur8kUonjwul4oYmHp+t9FKxIsGYCmc8fA82y5mSvCRYiTspWY0QDRLhZf3Mp U7pQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xJpNB4o6sq/KoJPxbv4+HnBkm66WaeN+eBfhYyJgn4g=; b=xfwbaUtdvK6b2wQ1j1+duZobpP/Y6XhFzoTIo+yw+wn23N42mYUSgyHp9uwBgKPJ3w niVa8q6oKgV4iB2dAKPbNCLxdP9nWX3IGwvYBEPP/pGaRYNA/L8TUjQAPtiRMxupyzWy Zd2kjFsnPKUciKTKWcyGDSpRljBOIeP/ZcanvC/b+dYTMr7vBp8K0ejsi/38IijULyq+ o+eaj8ZGPvQfzhYG96js0V1ZCInVQskuQ5ShI4pmYNY96ho/rltJwuIRILNNsNA41bC9 YSQCnlFf6Fwra1HhnqONq73r13Sp/URY6WXNtLq7PJZQDDiEAFgGJI4wLb9E4ENzIE13 y+TQ== X-Gm-Message-State: ANoB5plukGiIXTM2DrR5a5yCLVs5kdS/xeus0bIckqyVxc22Xxd2f4qg e2uyp+i/dx0bjNGNvkMjUmMB6CjFY51SSg== X-Google-Smtp-Source: AA0mqf5P1fAqx7LVazRB/UIa2Da3c2VrKrrT68FCZfvUAr+DHQjG4v5dxecYZymSaLMDkrjZkVa7AA== X-Received: by 2002:a5d:4846:0:b0:236:5aa8:a07e with SMTP id n6-20020a5d4846000000b002365aa8a07emr13910605wrs.437.1668595717609; Wed, 16 Nov 2022 02:48:37 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id n1-20020a05600c4f8100b003cf78aafdd7sm1833012wmq.39.2022.11.16.02.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 02:48:37 -0800 (PST) From: Neil Armstrong Date: Wed, 16 Nov 2022 11:48:35 +0100 Subject: [PATCH] arm64: dts: qcom: sm8550: add QCrypto nodes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221115-topic-sm8550-upstream-dts-qce-v1-0-fe750dfa90f6@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Andy Gross , Krzysztof Kozlowski , Rob Herring Cc: Neil Armstrong , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Neil Armstrong --- Depends on: - QCE new socs support [1] - SM8550 QCE bindings [2] - SM8550 base DT [3] To: Andy Gross To: Bjorn Andersson To: Konrad Dybcio To: Rob Herring To: Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org [1] https://lore.kernel.org/all/20220920114051.1116441-1-bhupesh.sharma@lin= aro.org/ [2] https://lore.kernel.org/all/20221114-narmstrong-sm8550-upstream-qce-v1-= 0-31b489d5690a@linaro.org/ [3] https://lore.kernel.org/all/20221116103146.2556846-1-abel.vesa@linaro.o= rg/ --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 07ba709ca35f..a490b705ce5c 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1372,6 +1372,30 @@ mmss_noc: interconnect@1780000 { qcom,bcm-voters =3D <&apps_bcm_voter>; }; =20 + cryptobam: dma-controller@1dc4000 { + compatible =3D "qcom,bam-v1.7.0"; + reg =3D <0x0 0x01dc4000 0x0 0x28000>; + interrupts =3D ; + #dma-cells =3D <1>; + qcom,ee =3D <0>; + qcom,controlled-remotely; + iommus =3D <&apps_smmu 0x480 0x0>, + <&apps_smmu 0x481 0x0>; + interconnects =3D <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names =3D "memory"; + }; + + crypto: crypto@1de0000 { + compatible =3D "qcom,sm8550-qce"; + reg =3D <0x0 0x01dfa000 0x0 0x6000>; + dmas =3D <&cryptobam 4>, <&cryptobam 5>; + dma-names =3D "rx", "tx"; + iommus =3D <&apps_smmu 0x480 0x0>, + <&apps_smmu 0x481 0x0>; + interconnects =3D <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names =3D "memory"; + }; + tcsr_mutex: hwlock@1f40000 { compatible =3D "qcom,tcsr-mutex"; reg =3D <0x0 0x01f40000 0x0 0x20000>; --- base-commit: a237afe452d9079aa024e465642b4cde0a04c7ff change-id: 20221115-topic-sm8550-upstream-dts-qce-7f4fe79e0375 Best regards, --=20 Neil Armstrong