From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E56F8C433FE for ; Mon, 14 Nov 2022 01:48:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235708AbiKNBr5 (ORCPT ); Sun, 13 Nov 2022 20:47:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235694AbiKNBrv (ORCPT ); Sun, 13 Nov 2022 20:47:51 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFDE5DF7C for ; Sun, 13 Nov 2022 17:47:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390469; x=1699926469; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IyTuYPrNYIXcLY03KDjNi2jgFamisN6EaEiSZ9Xh4MM=; b=nBXe9Mw82gWlB0AEFHpToihDRjTZNgFgfQisZVIz9UPEeQh2k2J6Ilpu FvvtszNXDHDV6WqpWwrpVT29yB6Lo4UWog21l2+NmvF/pVdY4nmJIlo0J /tp8MaMAWqI6oDde/J1S5oBQVjCEF4q3DreLrUngkzuSCeuN0FLBCcrNI 7JLhT5bLH55OZzc3VF/leXGw8da5CUHHATNjFK46944+MBFxMy3rGqCMU DTE0n4ABif9IGSWWCY5rzIF1PRIz5XfZqVEroV+HtER5tLjpCJ41zFC9e fUdgCmNMB58QzV1LYgrz+nnUwT48olHv7CbdDml1ICdBd+vftGA34vp/K g==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006683" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006683" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124199" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124199" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:47 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 1/7] iommu/vt-d: Allocate pasid table in device probe path Date: Mon, 14 Nov 2022 09:40:43 +0800 Message-Id: <20221114014049.3959-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Whether or not a domain is attached to the device, the pasid table should always be valid as long as it has been probed. This moves the pasid table allocation from the domain attaching device path to device probe path and frees it in the device release path. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f298e51d5aa6..bc42a2c84e2a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2477,13 +2477,6 @@ static int domain_add_dev_info(struct dmar_domain *d= omain, struct device *dev) =20 /* PASID table is mandatory for a PCI device in scalable mode. */ if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { - ret =3D intel_pasid_alloc_table(dev); - if (ret) { - dev_err(dev, "PASID table allocation failed\n"); - dmar_remove_one_dev_info(dev); - return ret; - } - /* Setup the PASID entry for requests without PASID: */ if (hw_pass_through && domain_type_is_si(domain)) ret =3D intel_pasid_setup_pass_through(iommu, domain, @@ -4108,7 +4101,6 @@ static void dmar_remove_one_dev_info(struct device *d= ev) =20 iommu_disable_dev_iotlb(info); domain_context_clear(info); - intel_pasid_free_table(info->dev); } =20 spin_lock_irqsave(&domain->lock, flags); @@ -4466,6 +4458,7 @@ static struct iommu_device *intel_iommu_probe_device(= struct device *dev) struct device_domain_info *info; struct intel_iommu *iommu; u8 bus, devfn; + int ret; =20 iommu =3D device_to_iommu(dev, &bus, &devfn); if (!iommu || !iommu->iommu.ops) @@ -4509,6 +4502,16 @@ static struct iommu_device *intel_iommu_probe_device= (struct device *dev) =20 dev_iommu_priv_set(dev, info); =20 + if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { + ret =3D intel_pasid_alloc_table(dev); + if (ret) { + dev_err(dev, "PASID table allocation failed\n"); + dev_iommu_priv_set(dev, NULL); + kfree(info); + return ERR_PTR(ret); + } + } + return &iommu->iommu; } =20 @@ -4517,6 +4520,7 @@ static void intel_iommu_release_device(struct device = *dev) struct device_domain_info *info =3D dev_iommu_priv_get(dev); =20 dmar_remove_one_dev_info(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); set_dma_ops(dev, NULL); --=20 2.34.1 From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D1D8C4332F for ; Mon, 14 Nov 2022 01:48:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235584AbiKNBsI (ORCPT ); Sun, 13 Nov 2022 20:48:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235712AbiKNBry (ORCPT ); Sun, 13 Nov 2022 20:47:54 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF17ADF99 for ; Sun, 13 Nov 2022 17:47:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390472; x=1699926472; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7aamF6wGSE378rpzekeRabhg3g404C8LbAS2Hr4cz0g=; b=Mf4GdQbulA6M59HtXAZTbaqR8JCIqPg2Wa6D86Mg/vUmy1ImJST3JqEF 2AJguVdmpJmiyDhWEZaXXG3ZZxgjTPD5U/SX9murcKuviE1sySHvj4rmy BN0+Wa4QqVuCJbfS0PAEyAlltljMLV1C51R0ROLaH9ZE/8KamYvzG4c2B KlLCYRWIXkbZ4ctwtpEUEFG5zqx0qLSUUoMydl3O5Z1CpuW25k2DaGceV QopnrHHvFLLE6qL5YIqSUZ9WSWQh6oULr7J+JqtVEd/elXu+7LDZTeiVk EokazkPVhB2kTRy+7HInVEjsuW5pmyxedGi7hMKsbaqiunp5L7GDoKWjJ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006687" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006687" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124208" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124208" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:49 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 2/7] iommu/vt-d: Add device_block_translation() helper Date: Mon, 14 Nov 2022 09:40:44 +0800 Message-Id: <20221114014049.3959-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If domain attaching to device fails, the IOMMU driver should bring the device to blocking DMA state. The upper layer is expected to recover it by attaching a new domain. Use device_block_translation() in the error path of dev_attach to make the behavior specific. The difference between device_block_translation() and the previous dmar_remove_one_dev_info() is that, in the scalable mode, it is the RID2PASID entry instead of context entry being cleared. As a result, enabling PCI capabilities is moved up. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 44 ++++++++++++++++++++++++++++++++----- 1 file changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index bc42a2c84e2a..16eeff2f7e19 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -277,7 +277,7 @@ static LIST_HEAD(dmar_satc_units); #define for_each_rmrr_units(rmrr) \ list_for_each_entry(rmrr, &dmar_rmrr_units, list) =20 -static void dmar_remove_one_dev_info(struct device *dev); +static void device_block_translation(struct device *dev); =20 int dmar_disabled =3D !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm =3D IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT= _ON); @@ -1402,7 +1402,7 @@ static void iommu_enable_pci_caps(struct device_domai= n_info *info) { struct pci_dev *pdev; =20 - if (!info || !dev_is_pci(info->dev)) + if (!dev_is_pci(info->dev)) return; =20 pdev =3D to_pci_dev(info->dev); @@ -2047,7 +2047,6 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, } else { iommu_flush_write_buffer(iommu); } - iommu_enable_pci_caps(info); =20 ret =3D 0; =20 @@ -2489,7 +2488,7 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) dev, PASID_RID2PASID); if (ret) { dev_err(dev, "Setup RID2PASID failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } } @@ -2497,10 +2496,12 @@ static int domain_add_dev_info(struct dmar_domain *= domain, struct device *dev) ret =3D domain_context_mapping(domain, dev); if (ret) { dev_err(dev, "Domain context map failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } =20 + iommu_enable_pci_caps(info); + return 0; } =20 @@ -4111,6 +4112,37 @@ static void dmar_remove_one_dev_info(struct device *= dev) info->domain =3D NULL; } =20 +/* + * Clear the page table pointer in context or pasid table entries so that + * all DMA requests without PASID from the device are blocked. If the page + * table has been set, clean up the data structures. + */ +static void device_block_translation(struct device *dev) +{ + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct intel_iommu *iommu =3D info->iommu; + unsigned long flags; + + iommu_disable_dev_iotlb(info); + if (!dev_is_real_dma_subdevice(dev)) { + if (sm_supported(iommu)) + intel_pasid_tear_down_entry(iommu, dev, + PASID_RID2PASID, false); + else + domain_context_clear(info); + } + + if (!info->domain) + return; + + spin_lock_irqsave(&info->domain->lock, flags); + list_del(&info->link); + spin_unlock_irqrestore(&info->domain->lock, flags); + + domain_detach_iommu(info->domain, iommu); + info->domain =3D NULL; +} + static int md_domain_init(struct dmar_domain *domain, int guest_width) { int adjust_width; @@ -4232,7 +4264,7 @@ static int intel_iommu_attach_device(struct iommu_dom= ain *domain, struct device_domain_info *info =3D dev_iommu_priv_get(dev); =20 if (info->domain) - dmar_remove_one_dev_info(dev); + device_block_translation(dev); } =20 ret =3D prepare_domain_attach_device(domain, dev); --=20 2.34.1 From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F010C4332F for ; Mon, 14 Nov 2022 01:48:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235543AbiKNBsN (ORCPT ); Sun, 13 Nov 2022 20:48:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235700AbiKNBr4 (ORCPT ); Sun, 13 Nov 2022 20:47:56 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBEE5DFAD for ; Sun, 13 Nov 2022 17:47:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390474; x=1699926474; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sNLRuDFy+mxQWPGwH2w3Z3rqtpY2BnCQzmJS+aDcxsw=; b=AsfhpGOYNa+FITrMxBlsfe27F/Jg4UJt3j4mU36quohdO7sOw8eqT52i Ep+QMNGAWx/EimV57qx+ZH4qCivrCKj8lWbln4f5Pnm8VO0A9HB3FlUMq wso0dI9JjHrd0vdfDRBszqRdqfQ503j+v7yZsCCW2CBvvoNPqKdJ2blFo zNBFVv4mI7jiIvs4hmWKBzbnIgKX5HAr5ZkYCmcYmz+UajDnmR5ZyO8bU k+W+VoA5+Nkzor/S6gPcSy58fA7SypMGHaZVltKm3pmSUGzxJxreKJjWV 5zuRjPTGRACxgY9knA3huCdKuhFNUYb0peXY2mDGYgFqhrN3Tp3vmo+4v A==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006688" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006688" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124214" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124214" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:52 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 3/7] iommu/vt-d: Add blocking domain support Date: Mon, 14 Nov 2022 09:40:45 +0800 Message-Id: <20221114014049.3959-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Intel IOMMU hardwares support blocking DMA transactions by clearing the translation table entries. This implements a real blocking domain to avoid using an empty UNMANAGED domain. The detach_dev callback of the domain ops is not used in any path. Remove it to avoid dead code as well. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 16eeff2f7e19..3d3fa182fcb1 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -278,6 +278,7 @@ static LIST_HEAD(dmar_satc_units); list_for_each_entry(rmrr, &dmar_rmrr_units, list) =20 static void device_block_translation(struct device *dev); +static void intel_iommu_domain_free(struct iommu_domain *domain); =20 int dmar_disabled =3D !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm =3D IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT= _ON); @@ -4164,12 +4165,28 @@ static int md_domain_init(struct dmar_domain *domai= n, int guest_width) return 0; } =20 +static int blocking_domain_attach_dev(struct iommu_domain *domain, + struct device *dev) +{ + device_block_translation(dev); + return 0; +} + +static struct iommu_domain blocking_domain =3D { + .ops =3D &(const struct iommu_domain_ops) { + .attach_dev =3D blocking_domain_attach_dev, + .free =3D intel_iommu_domain_free + } +}; + static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; =20 switch (type) { + case IOMMU_DOMAIN_BLOCKED: + return &blocking_domain; case IOMMU_DOMAIN_DMA: case IOMMU_DOMAIN_DMA_FQ: case IOMMU_DOMAIN_UNMANAGED: @@ -4204,7 +4221,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(= unsigned type) =20 static void intel_iommu_domain_free(struct iommu_domain *domain) { - if (domain !=3D &si_domain->domain) + if (domain !=3D &si_domain->domain && domain !=3D &blocking_domain) domain_exit(to_dmar_domain(domain)); } =20 @@ -4274,12 +4291,6 @@ static int intel_iommu_attach_device(struct iommu_do= main *domain, return domain_add_dev_info(to_dmar_domain(domain), dev); } =20 -static void intel_iommu_detach_device(struct iommu_domain *domain, - struct device *dev) -{ - dmar_remove_one_dev_info(dev); -} - static int intel_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t hpa, size_t size, int iommu_prot, gfp_t gfp) @@ -4787,7 +4798,6 @@ const struct iommu_ops intel_iommu_ops =3D { #endif .default_domain_ops =3D &(const struct iommu_domain_ops) { .attach_dev =3D intel_iommu_attach_device, - .detach_dev =3D intel_iommu_detach_device, .map_pages =3D intel_iommu_map_pages, .unmap_pages =3D intel_iommu_unmap_pages, .iotlb_sync_map =3D intel_iommu_iotlb_sync_map, --=20 2.34.1 From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7802C433FE for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006690" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006690" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124225" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124225" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:54 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 4/7] iommu/vt-d: Fold dmar_remove_one_dev_info() into its caller Date: Mon, 14 Nov 2022 09:40:46 +0800 Message-Id: <20221114014049.3959-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fold dmar_remove_one_dev_info() into intel_iommu_release_device() which is its only caller. Replace most of the code with device_block_translation() to make the code neat and tidy. Rename iommu_disable_dev_iotlb() to iommu_disable_pci_caps() to pair with iommu_enable_pci_caps(). Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 33 ++++++--------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 3d3fa182fcb1..f165e0d37bab 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1443,7 +1443,7 @@ static void iommu_enable_pci_caps(struct device_domai= n_info *info) } } =20 -static void iommu_disable_dev_iotlb(struct device_domain_info *info) +static void iommu_disable_pci_caps(struct device_domain_info *info) { struct pci_dev *pdev; =20 @@ -4089,30 +4089,6 @@ static void domain_context_clear(struct device_domai= n_info *info) &domain_context_clear_one_cb, info); } =20 -static void dmar_remove_one_dev_info(struct device *dev) -{ - struct device_domain_info *info =3D dev_iommu_priv_get(dev); - struct dmar_domain *domain =3D info->domain; - struct intel_iommu *iommu =3D info->iommu; - unsigned long flags; - - if (!dev_is_real_dma_subdevice(info->dev)) { - if (dev_is_pci(info->dev) && sm_supported(iommu)) - intel_pasid_tear_down_entry(iommu, info->dev, - PASID_RID2PASID, false); - - iommu_disable_dev_iotlb(info); - domain_context_clear(info); - } - - spin_lock_irqsave(&domain->lock, flags); - list_del(&info->link); - spin_unlock_irqrestore(&domain->lock, flags); - - domain_detach_iommu(domain, iommu); - info->domain =3D NULL; -} - /* * Clear the page table pointer in context or pasid table entries so that * all DMA requests without PASID from the device are blocked. If the page @@ -4124,7 +4100,7 @@ static void device_block_translation(struct device *d= ev) struct intel_iommu *iommu =3D info->iommu; unsigned long flags; =20 - iommu_disable_dev_iotlb(info); + iommu_disable_pci_caps(info); if (!dev_is_real_dma_subdevice(dev)) { if (sm_supported(iommu)) intel_pasid_tear_down_entry(iommu, dev, @@ -4562,7 +4538,10 @@ static void intel_iommu_release_device(struct device= *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); =20 - dmar_remove_one_dev_info(dev); + iommu_disable_pci_caps(info); + domain_context_clear(info); + device_block_translation(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); --=20 2.34.1 From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48F5DC433FE for ; Mon, 14 Nov 2022 01:48:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235597AbiKNBsU (ORCPT ); Sun, 13 Nov 2022 20:48:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235719AbiKNBsC (ORCPT ); Sun, 13 Nov 2022 20:48:02 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA94EDFD5 for ; Sun, 13 Nov 2022 17:47:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390479; x=1699926479; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j140O/WHBMrsJSHsHEaF6cUi5s3fzlbz0+OwH/+tCb0=; b=nFxYEGGBHsthMlH49Eg2yJ9H9XBTMAd5rQXZBxJO2ZlQrc6gsz7dVA1H sRqv5o8VBNtwNnTw3rbXSUB+buA4Zmj9MaDq/6LjoR3v7AckVFUZ3GI31 MvKKVzdYZJwTnIEaKuIkExZ08qt1uoNcUWWTdy6A+WNCtvj+LOjY6J+j1 NMUOCJ/tWDtyqhbPJgryofQB58IcrYkct0G223Cm1XwGbNuBpX4i6navY V8ZX1I/GLjROhEFNjSjrnn3C0u21n+UlGv4tUpcJYyguWzQPNlGlXnz7u SnDYcnxV81QoX6jlHijDpU5ncwbD2EJhrxtCHrKA6L+ee2WTNG+ZlAbhF Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006695" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006695" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124231" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124231" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:57 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 5/7] iommu/vt-d: Rename domain_add_dev_info() Date: Mon, 14 Nov 2022 09:40:47 +0800 Message-Id: <20221114014049.3959-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" dmar_domain_attach_device() is more meaningful according to what this helper does. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f165e0d37bab..6a2a77fce0f8 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2455,7 +2455,8 @@ static int __init si_domain_init(int hw) return 0; } =20 -static int domain_add_dev_info(struct dmar_domain *domain, struct device *= dev) +static int dmar_domain_attach_device(struct dmar_domain *domain, + struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct intel_iommu *iommu; @@ -4264,7 +4265,7 @@ static int intel_iommu_attach_device(struct iommu_dom= ain *domain, if (ret) return ret; =20 - return domain_add_dev_info(to_dmar_domain(domain), dev); + return dmar_domain_attach_device(to_dmar_domain(domain), dev); } =20 static int intel_iommu_map(struct iommu_domain *domain, --=20 2.34.1 From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D1F8C4332F for ; Mon, 14 Nov 2022 01:48:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235452AbiKNBsY (ORCPT ); Sun, 13 Nov 2022 20:48:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234264AbiKNBsF (ORCPT ); Sun, 13 Nov 2022 20:48:05 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D69ADFE8 for ; Sun, 13 Nov 2022 17:48:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390482; x=1699926482; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wb1pQx3gsfHkkziEvcEAu8qE9SzfW0QUG/+y6jvyTe0=; b=UzxnfhdICCJ6EzJgQVqF3yLtKV0KXgLWjW/tS741W6VCUKBCkoBV+LZp H3of70JFbDO18AMeF0J4l5xQumsoPtbCJP/ACNgI6DMkGU+lHCSIkXEzV 94o6OZmZf7CBLnvNX9s2CSraGreVzaOem5Dg08/oigvo92OA8hHjluLVP r3KQGO61qeTrVY2fGuCMPjK0fZhoA+FX3sIuIHqTc5fh9UgiEmOuZLcQ0 lKtPBZeYEd8YNq4ufPRyScggMhoF1DrgsttRQIQSb8bV7P7bH/zwx9MYq egrDOzniQR3LGHaCoalflQOoZd/ratVdjUskLBkaCEjGivdAj9SJQNGnv g==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006699" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006699" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:48:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124247" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124247" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:59 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 6/7] iommu/vt-d: Remove unnecessary domain_context_mapped() Date: Mon, 14 Nov 2022 09:40:48 +0800 Message-Id: <20221114014049.3959-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The device_domain_info::domain accurately records the domain attached to the device. It is unnecessary to check whether the context is present in the attach_dev path. Remove it to make the code neat. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 47 +++---------------------------------- 1 file changed, 3 insertions(+), 44 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 6a2a77fce0f8..83d941b792f2 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -780,19 +780,6 @@ static void domain_flush_cache(struct dmar_domain *dom= ain, clflush_cache_range(addr, size); } =20 -static int device_context_mapped(struct intel_iommu *iommu, u8 bus, u8 dev= fn) -{ - struct context_entry *context; - int ret =3D 0; - - spin_lock(&iommu->lock); - context =3D iommu_context_addr(iommu, bus, devfn, 0); - if (context) - ret =3D context_present(context); - spin_unlock(&iommu->lock); - return ret; -} - static void free_context_table(struct intel_iommu *iommu) { struct context_entry *context; @@ -2099,30 +2086,6 @@ domain_context_mapping(struct dmar_domain *domain, s= truct device *dev) &domain_context_mapping_cb, &data); } =20 -static int domain_context_mapped_cb(struct pci_dev *pdev, - u16 alias, void *opaque) -{ - struct intel_iommu *iommu =3D opaque; - - return !device_context_mapped(iommu, PCI_BUS_NUM(alias), alias & 0xff); -} - -static int domain_context_mapped(struct device *dev) -{ - struct intel_iommu *iommu; - u8 bus, devfn; - - iommu =3D device_to_iommu(dev, &bus, &devfn); - if (!iommu) - return -ENODEV; - - if (!dev_is_pci(dev)) - return device_context_mapped(iommu, bus, devfn); - - return !pci_for_each_dma_alias(to_pci_dev(dev), - domain_context_mapped_cb, iommu); -} - /* Returns a number of VTD pages, but aligned to MM page size */ static inline unsigned long aligned_nrpages(unsigned long host_addr, size_t size) @@ -4245,6 +4208,7 @@ static int prepare_domain_attach_device(struct iommu_= domain *domain, static int intel_iommu_attach_device(struct iommu_domain *domain, struct device *dev) { + struct device_domain_info *info =3D dev_iommu_priv_get(dev); int ret; =20 if (domain->type =3D=3D IOMMU_DOMAIN_UNMANAGED && @@ -4253,13 +4217,8 @@ static int intel_iommu_attach_device(struct iommu_do= main *domain, return -EPERM; } =20 - /* normally dev is not mapped */ - if (unlikely(domain_context_mapped(dev))) { - struct device_domain_info *info =3D dev_iommu_priv_get(dev); - - if (info->domain) - device_block_translation(dev); - } + if (info->domain) + device_block_translation(dev); =20 ret =3D prepare_domain_attach_device(domain, dev); if (ret) --=20 2.34.1 From nobody Mon Apr 13 14:32:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1840C4332F for ; Mon, 14 Nov 2022 01:48:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235723AbiKNBsi (ORCPT ); Sun, 13 Nov 2022 20:48:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235715AbiKNBsP (ORCPT ); Sun, 13 Nov 2022 20:48:15 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18043DFC3 for ; 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a="707124274" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124274" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:48:01 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 7/7] iommu/vt-d: Use real field for indication of first level Date: Mon, 14 Nov 2022 09:40:49 +0800 Message-Id: <20221114014049.3959-8-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The dmar_domain uses bit field members to indicate the behaviors. Add a bit field for using first level and remove the flags member to avoid duplication. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.h | 15 +++++---------- drivers/iommu/intel/iommu.c | 25 ++++++++++--------------- 2 files changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 251a609fdce3..7b7234689cb4 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -515,14 +515,6 @@ struct context_entry { u64 hi; }; =20 -/* - * When VT-d works in the scalable mode, it allows DMA translation to - * happen through either first level or second level page table. This - * bit marks that the DMA translation for the domain goes through the - * first level page table, otherwise, it goes through the second level. - */ -#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1) - struct iommu_domain_info { struct intel_iommu *iommu; unsigned int refcnt; /* Refcount of devices per iommu */ @@ -539,6 +531,11 @@ struct dmar_domain { u8 iommu_coherency: 1; /* indicate coherency of iommu access */ u8 force_snooping : 1; /* Create IOPTEs with snoop control */ u8 set_pte_snp:1; + u8 use_first_level:1; /* DMA translation for the domain goes + * through the first level page table, + * otherwise, goes through the second + * level. + */ =20 spinlock_t lock; /* Protect device tracking lists */ struct list_head devices; /* all devices' list */ @@ -548,8 +545,6 @@ struct dmar_domain { =20 /* adjusted guest address width, 0 is level 2 30-bit */ int agaw; - - int flags; /* flags to find out type of domain */ int iommu_superpage;/* Level of superpages supported: 0 =3D=3D 4KiB (no superpages), 1 =3D=3D 2MiB, 2 =3D=3D 1GiB, 3 =3D=3D 512GiB, 4 =3D=3D 1TiB */ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 83d941b792f2..2e6829da460a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -383,11 +383,6 @@ static inline int domain_type_is_si(struct dmar_domain= *domain) return domain->domain.type =3D=3D IOMMU_DOMAIN_IDENTITY; } =20 -static inline bool domain_use_first_level(struct dmar_domain *domain) -{ - return domain->flags & DOMAIN_FLAG_USE_FIRST_LEVEL; -} - static inline int domain_pfn_supported(struct dmar_domain *domain, unsigned long pfn) { @@ -501,7 +496,7 @@ static int domain_update_iommu_superpage(struct dmar_do= main *domain, rcu_read_lock(); for_each_active_iommu(iommu, drhd) { if (iommu !=3D skip) { - if (domain && domain_use_first_level(domain)) { + if (domain && domain->use_first_level) { if (!cap_fl1gp_support(iommu->cap)) mask =3D 0x1; } else { @@ -579,7 +574,7 @@ static void domain_update_iommu_cap(struct dmar_domain = *domain) * paging and 57-bits with 5-level paging). Hence, skip bit * [N-1]. */ - if (domain_use_first_level(domain)) + if (domain->use_first_level) domain->domain.geometry.aperture_end =3D __DOMAIN_MAX_ADDR(domain->gaw -= 1); else domain->domain.geometry.aperture_end =3D __DOMAIN_MAX_ADDR(domain->gaw); @@ -947,7 +942,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domai= n *domain, =20 domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); pteval =3D ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DM= A_PTE_READ | DMA_PTE_WRITE; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { pteval |=3D DMA_FL_PTE_XD | DMA_FL_PTE_US; if (iommu_is_dma_domain(&domain->domain)) pteval |=3D DMA_FL_PTE_ACCESS; @@ -1500,7 +1495,7 @@ static void iommu_flush_iotlb_psi(struct intel_iommu = *iommu, if (ih) ih =3D 1 << 6; =20 - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { qi_flush_piotlb(iommu, did, PASID_RID2PASID, addr, pages, ih); } else { unsigned long bitmask =3D aligned_pages - 1; @@ -1554,7 +1549,7 @@ static inline void __mapping_notify_one(struct intel_= iommu *iommu, * It's a non-present to present mapping. Only flush if caching mode * and second level. */ - if (cap_caching_mode(iommu->cap) && !domain_use_first_level(domain)) + if (cap_caching_mode(iommu->cap) && !domain->use_first_level) iommu_flush_iotlb_psi(iommu, domain, pfn, pages, 0, 1); else iommu_flush_write_buffer(iommu); @@ -1570,7 +1565,7 @@ static void intel_flush_iotlb_all(struct iommu_domain= *domain) struct intel_iommu *iommu =3D info->iommu; u16 did =3D domain_id_iommu(dmar_domain, iommu); =20 - if (domain_use_first_level(dmar_domain)) + if (dmar_domain->use_first_level) qi_flush_piotlb(iommu, did, PASID_RID2PASID, 0, -1, 0); else iommu->flush.flush_iotlb(iommu, did, 0, 0, @@ -1743,7 +1738,7 @@ static struct dmar_domain *alloc_domain(unsigned int = type) =20 domain->nid =3D NUMA_NO_NODE; if (first_level_by_default(type)) - domain->flags |=3D DOMAIN_FLAG_USE_FIRST_LEVEL; + domain->use_first_level =3D true; domain->has_iotlb_device =3D false; INIT_LIST_HEAD(&domain->devices); spin_lock_init(&domain->lock); @@ -2175,7 +2170,7 @@ __domain_mapping(struct dmar_domain *domain, unsigned= long iov_pfn, =20 attr =3D prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); attr |=3D DMA_FL_PTE_PRESENT; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { attr |=3D DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS; if (prot & DMA_PTE_WRITE) attr |=3D DMA_FL_PTE_DIRTY; @@ -2445,7 +2440,7 @@ static int dmar_domain_attach_device(struct dmar_doma= in *domain, if (hw_pass_through && domain_type_is_si(domain)) ret =3D intel_pasid_setup_pass_through(iommu, domain, dev, PASID_RID2PASID); - else if (domain_use_first_level(domain)) + else if (domain->use_first_level) ret =3D domain_setup_first_level(iommu, domain, dev, PASID_RID2PASID); else @@ -4388,7 +4383,7 @@ static void domain_set_force_snooping(struct dmar_dom= ain *domain) * Second level page table supports per-PTE snoop control. The * iommu_map() interface will handle this by setting SNP bit. */ - if (!domain_use_first_level(domain)) { + if (!domain->use_first_level) { domain->set_pte_snp =3D true; return; } --=20 2.34.1