From nobody Sun Sep 14 20:28:48 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF712C677F1 for ; Wed, 18 Jan 2023 16:24:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231127AbjARQYm (ORCPT ); Wed, 18 Jan 2023 11:24:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229989AbjARQYU (ORCPT ); Wed, 18 Jan 2023 11:24:20 -0500 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3A2A589BC for ; Wed, 18 Jan 2023 08:22:44 -0800 (PST) Received: by mail-wm1-x32b.google.com with SMTP id f19-20020a1c6a13000000b003db0ef4dedcso1765485wmc.4 for ; Wed, 18 Jan 2023 08:22:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=OhbZjX/koZrX9iSh81WiUJwKhhql/MHhaB/Kr/N+S/w=; b=yr/9wmZiTzFYxxilRSLGpxIbrlCS5ZK5VyA5sRbddu88WfeakbJ267et7UfBOZhkzL C8PxREakRwiCY6uHFhdvZGYBckjHMeOpl0CGuJNamF9PdqUuaGtfD1hvcfBrXHpAWPxV Ghjuz9jwroP90wZodO67XTyqIBdEQfbismAZmoB9AiaF3MxmB3jyuwpMgNG8GuzbIq7y kiRN6B0ihQ5eMRnpv8sXsUH+2d31laYsXjzTyJf4GagN78tcei6oScCImsP+caau9QTx 8enV/4WUdaHkNOgXPglo2lh75rfgkH1nGRCo4In8aRyt6xGBAHnRAX0pLzWMT8aO2bDY 4a0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OhbZjX/koZrX9iSh81WiUJwKhhql/MHhaB/Kr/N+S/w=; b=lRsz6TbYM5+wq8RMPvZszS7MfYDOi3cnUs8UJW+Jh0+lMV9bxaX5L/tBgc04cPDLry yX8AZcv3pJPokITvwF8VfKAp8OVos7PtwLYqo4WzSkoLz85+MlG3JhAxMXTrQjoCxHmm 3QLePCTdmeuq1juVoNPAwzyNDnc/aVwRkEOpXj998Lm462ZBg9XkEXsdp1i4rOWGt6Dy AkUDSbtK0tSARfuS/T/1CXOEvq1K8RHPtajfDTpoOqrf5VEsKhkS4fKjZKZurd7a7zQD GNXVLIO2piDa25/FQ10YEW54hpZj4ghOYUEL/4ApmhCwUXBObbrB0qxZ1iXxbDxs8eyr Otrg== X-Gm-Message-State: AFqh2krSEp/OVFxDtR3YS3YlkOPNDtfsN2us3ixkqOGzf8oLOd0V9Il2 shsziT+7XkcwpZ8swOby7B2rvA== X-Google-Smtp-Source: AMrXdXvMYEjz/xdcBYIRDbh2a4jrJIHNl505YxCHZvp+zi/0bFGENp2nhe7nwKmk7s5aaE3zgSXVuw== X-Received: by 2002:a05:600c:4910:b0:3d3:4406:8a3a with SMTP id f16-20020a05600c491000b003d344068a3amr7562958wmp.30.1674058963373; Wed, 18 Jan 2023 08:22:43 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l23-20020a05600c1d1700b003db0dbbea53sm2744393wms.30.2023.01.18.08.22.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 08:22:42 -0800 (PST) From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:39 +0100 Subject: [PATCH v4 1/5] dt-bindings: remoteproc: qcom: adsp: move memory-region and firmware-name out of pas-common MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-1-54154c08c0b7@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Srinivas Kandagatla , Amol Maheshwari Cc: Alex Elder , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move memory-region and firmware-name definitions out of qcom,pas-common.yaml since they will be redefined differently for SM8550 PAS bindings documentat= ion. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml | 4 ++++ Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml | 8 ----= ---- Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml | 8 ++++= ++++ Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml | 8 ++++= ++++ .../devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml | 8 ++++= ++++ .../devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml | 8 ++++= ++++ Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml | 8 ++++= ++++ Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml | 8 ++++= ++++ Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml | 8 ++++= ++++ Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 8 ++++= ++++ 10 files changed, 68 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/= Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index d3bfc0f472a9..643ee787a81f 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -40,6 +40,10 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. =20 + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core + required: - compatible =20 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml index 1d5e01c8d8bc..171ef85de193 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml @@ -52,14 +52,6 @@ properties: minItems: 1 maxItems: 3 =20 - firmware-name: - $ref: /schemas/types.yaml#/definitions/string - description: Firmware name for the Hexagon core - - memory-region: - maxItems: 1 - description: Reference to the reserved-memory for the Hexagon core - qcom,smem-states: $ref: /schemas/types.yaml#/definitions/phandle-array description: States used by the AP to signal the Hexagon core diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml index 007349ef51ed..5efa0e5c0439 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml @@ -41,6 +41,14 @@ properties: power-domain-names: false smd-edge: false =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml index 6fd768609a66..5cefd2c58593 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml @@ -50,12 +50,20 @@ properties: - const: mx - const: mss =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. =20 smd-edge: false =20 + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.= yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml index 3026cfde5582..c1f8dd8d0e4c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml @@ -37,6 +37,14 @@ properties: =20 smd-edge: false =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas= .yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml index c08274aaa6f8..f6fbc531dc28 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml @@ -37,6 +37,14 @@ properties: =20 smd-edge: false =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.ya= ml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml index cbeaa00ca4d4..c66e298462c7 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml @@ -45,12 +45,20 @@ properties: - const: cx - const: mss =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. =20 smd-edge: false =20 + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml index 911529400142..fee02fa800b5 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml @@ -35,8 +35,16 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + smd-edge: false =20 + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml index b934252cf02b..2c085ac2c3fb 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml @@ -39,8 +39,16 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + smd-edge: false =20 + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml index 853f97d6879f..af24f9a3cdf1 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml @@ -42,6 +42,14 @@ properties: =20 smd-edge: false =20 + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg --=20 2.34.1 From nobody Sun Sep 14 20:28:48 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33DC9C678DB for ; Wed, 18 Jan 2023 16:24:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231176AbjARQYq (ORCPT ); Wed, 18 Jan 2023 11:24:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230087AbjARQYV (ORCPT ); Wed, 18 Jan 2023 11:24:21 -0500 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBE9C3F299 for ; Wed, 18 Jan 2023 08:22:45 -0800 (PST) Received: by mail-wm1-x32e.google.com with SMTP id f19-20020a1c6a13000000b003db0ef4dedcso1765521wmc.4 for ; Wed, 18 Jan 2023 08:22:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vJhhwuYzq1Okb5/4x8Q7mNbhcHN2GG5v0qhyd4tEid4=; b=uwsUKsmC2V17s84crcW8TRooIA5Rn0Q1yi+v8X06HeswNhLV+psovM+vY86swB0Uja 9ZO2TwwtjqufNFDcMVjdgEJi7EnZ7AOcFyXHlph8/VV5ukGNydv2HgcJ+KqSjy+KKju6 Lot76QQigWhJLkhuMiXfAf5B/OA2VD8lc1rdymF/9/rLhhws44OPFhXcm53WcVthZSnU pX4+v80EZGi+3fYJkrMuZUNLcEqRvKLOHxe7AodCRSofeQq457Jj5/g/LSxRlWhgLrW/ JkWFA6Txm/zgl7bRB4ZJtuRUNyShMkXyvxy5RL1gqmxHA+UnmHImm5lrzPkyg3iaPZAa OcCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vJhhwuYzq1Okb5/4x8Q7mNbhcHN2GG5v0qhyd4tEid4=; b=jyjP+acFzs02iQ8nKjxJj+/2VRfPYVLz+DLWup46/ErKoJvWd12PRvhJ2eDsmGZX8q x+8F4qAoo/9eCByF3JtB7YT1sHFmRo2f7nk74XTZMT1pGOp/dTmS9Rf/Xc+g5SiZdK7V 58FzVIduMd1oTAHUL2gjuFWUCW4na7jmyvM2AyLNy0UjaqJGef7tve83toEw7kREXkOT K3OkDqSj04NSnkhYaZH3zk5ZrICNJqEUBmt+k94fXdnH6JtErRM0wGR0qeb81rEJwBmC OeaNDdBAnsorrCftTxA0ykWk/AU4SbjKLN5a0MGDfEGNVEKSTIRtjEgw57SxQEg56r9t /rxw== X-Gm-Message-State: AFqh2kpE5E/QBlvF2gZmaMGozf7YjCsgzZP4DLEtDs/VDUHkpvdpqsXw GCatyf6mCPAjUcYZRptRMdGRJQ== X-Google-Smtp-Source: AMrXdXsIc/v2+fEOdkqPKYNvyN8uXLNGCFxgDDsXSjYSe5vF1CdC2jX21aOkGe6a06P1C6/8JMNBmA== X-Received: by 2002:a05:600c:4191:b0:3d4:5741:af9b with SMTP id p17-20020a05600c419100b003d45741af9bmr15911084wmh.0.1674058964422; Wed, 18 Jan 2023 08:22:44 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l23-20020a05600c1d1700b003db0dbbea53sm2744393wms.30.2023.01.18.08.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 08:22:44 -0800 (PST) From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:40 +0100 Subject: [PATCH v4 2/5] dt-bindings: remoteproc: qcom: adsp: document sm8550 adsp, cdsp & mpss compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-2-54154c08c0b7@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Srinivas Kandagatla , Amol Maheshwari Cc: Alex Elder , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This documents the compatible for the component used to boot the aDSP, cDSP and MPSS on the SM8550 SoC. The SM8550 boot process on SM8550 now requires a secondary "Devicetree" firmware to be passed along the main Firmware, and the cDSP a new power domain named "NSP". A third memory domain for the DSM memory zone is also needed for the MPSS PAS bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- .../bindings/remoteproc/qcom,sm8550-pas.yaml | 178 +++++++++++++++++= ++++ 1 file changed, 178 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml new file mode 100644 index 000000000000..ae612809e260 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8550 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots fi= rmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + minItems: 2 + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + memory-region: + maxItems: 2 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + memory-region: + minItems: 3 + + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm8550-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + power-domain-names: + items: + - const: cx + - const: mxc + - if: + properties: + compatible: + enum: + - qcom,sm8550-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + remoteproc@30000000 { + compatible =3D "qcom,sm8550-adsp-pas"; + reg =3D <0x030000000 0x100>; + + clocks =3D <&rpmhcc RPMH_CXO_CLK>; + clock-names =3D "xo"; + + interrupts-extended =3D <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region =3D <&adsp_mem>, <&dtb_adsp_mem>; + + firmware-name =3D "qcom/sm8550/adsp.mbn", + "qcom/sm8550/adsp_dtb.mbn"; + + power-domains =3D <&rpmhpd_sm8550_lcx>, + <&rpmhpd_sm8550_lmx>; + power-domain-names =3D "lcx", "lmx"; + + qcom,qmp =3D <&aoss_qmp>; + qcom,smem-states =3D <&smp2p_adsp_out 0>; + qcom,smem-state-names =3D "stop"; + + glink-edge { + interrupts-extended =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes =3D <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QM= P>; + + label =3D "lpass"; + qcom,remote-pid =3D <2>; + + /* ... */ + }; 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Wed, 18 Jan 2023 08:22:45 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l23-20020a05600c1d1700b003db0dbbea53sm2744393wms.30.2023.01.18.08.22.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 08:22:45 -0800 (PST) From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:41 +0100 Subject: [PATCH v4 3/5] remoteproc: qcom_q6v5_pas: add support for dtb co-firmware loading MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-3-54154c08c0b7@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Srinivas Kandagatla , Amol Maheshwari Cc: Alex Elder , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Starting from the SM8550 SoC, starting the aDSP, cDSP and MPSS will require loading a separate "Devicetree" firmware. In order to satisfy the load & authentication order required by the SM8550 SoC, the following is implemented: - "Devicetree" firmware request & load in dedicated memory - Q6V5 prepare - Power Domain & Clocks enable - "Devicetree" firmware authentication - Main firmware load in dedicated memory - Main firmware authentication - Q6V5 startup - "Devicetree" firmware metadata release - Main metadata release When booting older platforms, the "Devicetree" steps would be bypassed and the load & authentication order would still be valid. Signed-off-by: Neil Armstrong --- drivers/remoteproc/qcom_q6v5_pas.c | 134 +++++++++++++++++++++++++++++++++= ---- 1 file changed, 121 insertions(+), 13 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index f95e0229a6c1..3837a21820d6 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -35,7 +35,9 @@ struct adsp_data { int crash_reason_smem; const char *firmware_name; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; bool auto_boot; bool decrypt_shutdown; @@ -64,19 +66,28 @@ struct qcom_adsp { =20 int proxy_pd_count; =20 + const char *dtb_firmware_name;=09 int pas_id; + int dtb_pas_id; unsigned int minidump_id; int crash_reason_smem; bool decrypt_shutdown; const char *info_name; =20 + const struct firmware *firmware; + const struct firmware *dtb_firmware; + struct completion start_done; struct completion stop_done; =20 phys_addr_t mem_phys; + phys_addr_t dtb_mem_phys; phys_addr_t mem_reloc; + phys_addr_t dtb_mem_reloc; void *mem_region; + void *dtb_mem_region; size_t mem_size; + size_t dtb_mem_size; =20 struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; @@ -84,6 +95,7 @@ struct qcom_adsp { struct qcom_sysmon *sysmon; =20 struct qcom_scm_pas_metadata pas_metadata; + struct qcom_scm_pas_metadata dtb_pas_metadata; }; =20 static void adsp_minidump(struct rproc *rproc) @@ -158,6 +170,8 @@ static int adsp_unprepare(struct rproc *rproc) * here. */ qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); =20 return 0; } @@ -167,20 +181,40 @@ static int adsp_load(struct rproc *rproc, const struc= t firmware *fw) struct qcom_adsp *adsp =3D (struct qcom_adsp *)rproc->priv; int ret; =20 - ret =3D qcom_mdt_pas_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_phys, &adsp->pas_metadata); - if (ret) - return ret; + /* Store firmware handle to be used in adsp_start() */ + adsp->firmware =3D fw; =20 - ret =3D qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, adsp->pas_i= d, - adsp->mem_region, adsp->mem_phys, adsp->mem_size, - &adsp->mem_reloc); - if (ret) - return ret; + if (adsp->dtb_pas_id) { + ret =3D request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, a= dsp->dev); + if (ret) { + dev_err(adsp->dev, "request_firmware failed for %s: %d\n", + adsp->dtb_firmware_name, ret); + return ret; + } =20 - qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret =3D qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmw= are_name, + adsp->dtb_pas_id, adsp->dtb_mem_phys, + &adsp->dtb_pas_metadata); + if (ret) + goto release_dtb_firmware; + + ret =3D qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_f= irmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_region, + adsp->dtb_mem_phys, adsp->dtb_mem_size, + &adsp->dtb_mem_reloc); + if (ret) + goto release_dtb_metadata; + } =20 return 0; + +release_dtb_metadata: + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + +release_dtb_firmware: + release_firmware(adsp->dtb_firmware); + + return ret; } =20 static int adsp_start(struct rproc *rproc) @@ -216,24 +250,55 @@ static int adsp_start(struct rproc *rproc) goto disable_cx_supply; } =20 + if (adsp->dtb_pas_id) { + ret =3D qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id); + if (ret) { + dev_err(adsp->dev, + "failed to authenticate dtb image and release reset\n"); + goto disable_px_supply; + } + } + + ret =3D qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, ads= p->pas_id, + adsp->mem_phys, &adsp->pas_metadata); + if (ret) + goto disable_px_supply; + + ret =3D qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware,= adsp->pas_id, + adsp->mem_region, adsp->mem_phys, adsp->mem_size, + &adsp->mem_reloc); + if (ret) + goto release_pas_metadata; + + qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret =3D qcom_scm_pas_auth_and_reset(adsp->pas_id); if (ret) { dev_err(adsp->dev, "failed to authenticate image and release reset\n"); - goto disable_px_supply; + goto release_pas_metadata; } =20 ret =3D qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); if (ret =3D=3D -ETIMEDOUT) { dev_err(adsp->dev, "start timed out\n"); qcom_scm_pas_shutdown(adsp->pas_id); - goto disable_px_supply; + goto release_pas_metadata; } =20 qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + + /* Remove pointer to the loaded firmware, only valid in adsp_load() & ads= p_start() */ + adsp->firmware =3D NULL; =20 return 0; =20 +release_pas_metadata: + qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); disable_px_supply: if (adsp->px_supply) regulator_disable(adsp->px_supply); @@ -249,6 +314,9 @@ static int adsp_start(struct rproc *rproc) disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); =20 + /* Remove pointer to the loaded firmware, only valid in adsp_load() & ads= p_start() */ + adsp->firmware =3D NULL; + return ret; } =20 @@ -282,6 +350,12 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); =20 + if (adsp->dtb_pas_id) { + ret =3D qcom_scm_pas_shutdown(adsp->dtb_pas_id); + if (ret) + dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret); + } + handover =3D qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_pas_handover(&adsp->q6v5); @@ -458,6 +532,28 @@ static int adsp_alloc_memory_region(struct qcom_adsp *= adsp) return -EBUSY; } =20 + if (!adsp->dtb_pas_id) + return 0; + + node =3D of_parse_phandle(adsp->dev->of_node, "memory-region", 1); + if (!node) { + dev_err(adsp->dev, "no dtb memory-region specified\n"); + return -EINVAL; + } + + ret =3D of_address_to_resource(node, 0, &r); + if (ret) + return ret; + + adsp->dtb_mem_phys =3D adsp->dtb_mem_reloc =3D r.start; + adsp->dtb_mem_size =3D resource_size(&r); + adsp->dtb_mem_region =3D devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, a= dsp->dtb_mem_size); + if (!adsp->dtb_mem_region) { + dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", + &r.start, adsp->dtb_mem_size); + return -EBUSY; + } + return 0; } =20 @@ -466,7 +562,7 @@ static int adsp_probe(struct platform_device *pdev) const struct adsp_data *desc; struct qcom_adsp *adsp; struct rproc *rproc; - const char *fw_name; + const char *fw_name, *dtb_fw_name =3D NULL; const struct rproc_ops *ops =3D &adsp_ops; int ret; =20 @@ -483,6 +579,14 @@ static int adsp_probe(struct platform_device *pdev) if (ret < 0 && ret !=3D -EINVAL) return ret; =20 + if (desc->dtb_firmware_name) { + dtb_fw_name =3D desc->dtb_firmware_name; + ret =3D of_property_read_string_index(pdev->dev.of_node, "firmware-name"= , 1, + &dtb_fw_name); + if (ret < 0 && ret !=3D -EINVAL) + return ret; + } + if (desc->minidump_id) ops =3D &adsp_minidump_ops; =20 @@ -503,6 +607,10 @@ static int adsp_probe(struct platform_device *pdev) adsp->pas_id =3D desc->pas_id; adsp->info_name =3D desc->sysmon_name; adsp->decrypt_shutdown =3D desc->decrypt_shutdown; + if (dtb_fw_name) { + adsp->dtb_firmware_name =3D dtb_fw_name; + adsp->dtb_pas_id =3D desc->dtb_pas_id; + } platform_set_drvdata(pdev, adsp); =20 ret =3D device_init_wakeup(adsp->dev, true); --=20 2.34.1 From nobody Sun Sep 14 20:28:48 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A58BC38147 for ; Wed, 18 Jan 2023 16:25:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230087AbjARQZM (ORCPT ); Wed, 18 Jan 2023 11:25:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230203AbjARQYX (ORCPT ); Wed, 18 Jan 2023 11:24:23 -0500 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FA97589A1 for ; Wed, 18 Jan 2023 08:22:47 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id m5-20020a05600c4f4500b003db03b2559eso1935851wmq.5 for ; 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Wed, 18 Jan 2023 08:22:46 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l23-20020a05600c1d1700b003db0dbbea53sm2744393wms.30.2023.01.18.08.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 08:22:46 -0800 (PST) From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:42 +0100 Subject: [PATCH v4 4/5] remoteproc: qcom_q6v5_pas: add support for assigning memory to firmware MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-4-54154c08c0b7@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Srinivas Kandagatla , Amol Maheshwari Cc: Alex Elder , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Starting with SM8550, the DSM memory must now be shared to the firmware by the APPS process instead of beeing defined in the carveout memory reserved for MPSS. In order to handle that, add a region_assign_idx in adsp_data to specify with index of memory-region must be assigned to the MPSS via the qcom_scm_assign_mem() call at probe time. Signed-off-by: Neil Armstrong --- drivers/remoteproc/qcom_q6v5_pas.c | 71 ++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 71 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index 3837a21820d6..445020f8baf8 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -48,6 +48,8 @@ struct adsp_data { const char *ssr_name; const char *sysmon_name; int ssctl_id; + + int region_assign_idx; }; =20 struct qcom_adsp { @@ -84,10 +86,15 @@ struct qcom_adsp { phys_addr_t dtb_mem_phys; phys_addr_t mem_reloc; phys_addr_t dtb_mem_reloc; + phys_addr_t region_assign_phys; void *mem_region; void *dtb_mem_region; size_t mem_size; size_t dtb_mem_size; + size_t region_assign_size; + + int region_assign_idx; + int region_assign_perms; =20 struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; @@ -557,6 +564,64 @@ static int adsp_alloc_memory_region(struct qcom_adsp *= adsp) return 0; } =20 +static int adsp_assign_memory_region(struct qcom_adsp *adsp) +{ + struct qcom_scm_vmperm perm; + struct device_node *node; + struct resource r; + int ret; + + if (!adsp->region_assign_idx) + return 0; + + node =3D of_parse_phandle(adsp->dev->of_node, "memory-region", adsp->regi= on_assign_idx); + if (!node) { + dev_err(adsp->dev, "missing shareable memory-region\n"); + return -EINVAL; + } + + ret =3D of_address_to_resource(node, 0, &r); + if (ret) + return ret; + + perm.vmid =3D QCOM_SCM_VMID_MSS_MSA; + perm.perm =3D QCOM_SCM_PERM_RW; + + adsp->region_assign_phys =3D r.start; + adsp->region_assign_size =3D resource_size(&r); + adsp->region_assign_perms =3D BIT(QCOM_SCM_VMID_HLOS); + + ret =3D qcom_scm_assign_mem(adsp->region_assign_phys, + adsp->region_assign_size, + &adsp->region_assign_perms, + &perm, 1); + if (ret < 0) { + dev_err(adsp->dev, "assign memory failed\n"); + return ret; + } + + return 0; +} + +static void adsp_unassign_memory_region(struct qcom_adsp *adsp) +{ + struct qcom_scm_vmperm perm; + int ret; + + if (!adsp->region_assign_idx) + return; + + perm.vmid =3D QCOM_SCM_VMID_HLOS; + perm.perm =3D QCOM_SCM_PERM_RW; + + ret =3D qcom_scm_assign_mem(adsp->region_assign_phys, + adsp->region_assign_size, + &adsp->region_assign_perms, + &perm, 1); + if (ret < 0) + dev_err(adsp->dev, "unassign memory failed\n"); +} + static int adsp_probe(struct platform_device *pdev) { const struct adsp_data *desc; @@ -607,6 +672,7 @@ static int adsp_probe(struct platform_device *pdev) adsp->pas_id =3D desc->pas_id; adsp->info_name =3D desc->sysmon_name; adsp->decrypt_shutdown =3D desc->decrypt_shutdown; + adsp->region_assign_idx =3D desc->region_assign_idx; if (dtb_fw_name) { adsp->dtb_firmware_name =3D dtb_fw_name; adsp->dtb_pas_id =3D desc->dtb_pas_id; @@ -621,6 +687,10 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto free_rproc; =20 + ret =3D adsp_assign_memory_region(adsp); + if (ret) + goto free_rproc; + ret =3D adsp_init_clock(adsp); if (ret) goto free_rproc; @@ -673,6 +743,7 @@ static int adsp_remove(struct platform_device *pdev) rproc_del(adsp->rproc); =20 qcom_q6v5_deinit(&adsp->q6v5); + adsp_unassign_memory_region(adsp); qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); qcom_remove_sysmon_subdev(adsp->sysmon); qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); --=20 2.34.1 From nobody Sun Sep 14 20:28:48 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B1C5C32793 for ; Wed, 18 Jan 2023 16:25:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230157AbjARQZR (ORCPT ); Wed, 18 Jan 2023 11:25:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230357AbjARQY0 (ORCPT ); Wed, 18 Jan 2023 11:24:26 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 454A05895B for ; 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Wed, 18 Jan 2023 08:22:47 -0800 (PST) From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:43 +0100 Subject: [PATCH v4 5/5] remoteproc: qcom_q6v5_pas: add sm8550 adsp, cdsp & mpss compatible & data MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-5-54154c08c0b7@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Srinivas Kandagatla , Amol Maheshwari Cc: Alex Elder , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds the compatible & data for the aDSP, cDSP and MPSS found in the SM8550 SoC. This platform requires the "Devicetree" firmware to be loaded along the main firmware. The MPSS DSM memory to be assigned to the MPSS subsystem is the third memory-region entry as defined in the bindings. Signed-off-by: Neil Armstrong --- drivers/remoteproc/qcom_q6v5_pas.c | 63 ++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 63 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index 445020f8baf8..abe47c990082 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1101,6 +1101,66 @@ static const struct adsp_data sm8450_mpss_resource = =3D { .ssctl_id =3D 0x12, }; =20 +static const struct adsp_data sm8550_adsp_resource =3D { + .crash_reason_smem =3D 423, + .firmware_name =3D "adsp.mdt", + .dtb_firmware_name =3D "adsp_dtb.mdt", + .pas_id =3D 1, + .dtb_pas_id =3D 0x24, + .minidump_id =3D 5, + .auto_boot =3D false, + .proxy_pd_names =3D (char*[]){ + "lcx", + "lmx", + NULL + }, + .load_state =3D "adsp", + .ssr_name =3D "lpass", + .sysmon_name =3D "adsp", + .ssctl_id =3D 0x14, +}; + +static const struct adsp_data sm8550_cdsp_resource =3D { + .crash_reason_smem =3D 601, + .firmware_name =3D "cdsp.mdt", + .dtb_firmware_name =3D "cdsp_dtb.mdt", + .pas_id =3D 18, + .dtb_pas_id =3D 0x25, + .minidump_id =3D 7, + .auto_boot =3D false, + .proxy_pd_names =3D (char*[]){ + "cx", + "mxc", + "nsp", + NULL + }, + .load_state =3D "cdsp", + .ssr_name =3D "cdsp", + .sysmon_name =3D "cdsp", + .ssctl_id =3D 0x17, +}; + +static const struct adsp_data sm8550_mpss_resource =3D { + .crash_reason_smem =3D 421, + .firmware_name =3D "modem.mdt", + .dtb_firmware_name =3D "modem_dtb.mdt", + .pas_id =3D 4, + .dtb_pas_id =3D 0x26, + .minidump_id =3D 3, + .auto_boot =3D false, + .decrypt_shutdown =3D true, + .proxy_pd_names =3D (char*[]){ + "cx", + "mss", + NULL + }, + .load_state =3D "modem", + .ssr_name =3D "mpss", + .sysmon_name =3D "modem", + .ssctl_id =3D 0x12, + .region_assign_idx =3D 2, +}; + static const struct of_device_id adsp_of_match[] =3D { { .compatible =3D "qcom,msm8226-adsp-pil", .data =3D &adsp_resource_init}, { .compatible =3D "qcom,msm8953-adsp-pil", .data =3D &msm8996_adsp_resour= ce}, @@ -1142,6 +1202,9 @@ static const struct of_device_id adsp_of_match[] =3D { { .compatible =3D "qcom,sm8450-cdsp-pas", .data =3D &sm8350_cdsp_resource= }, { .compatible =3D "qcom,sm8450-slpi-pas", .data =3D &sm8350_slpi_resource= }, { .compatible =3D "qcom,sm8450-mpss-pas", .data =3D &sm8450_mpss_resource= }, + { .compatible =3D "qcom,sm8550-adsp-pas", .data =3D &sm8550_adsp_resource= }, + { .compatible =3D "qcom,sm8550-cdsp-pas", .data =3D &sm8550_cdsp_resource= }, + { .compatible =3D "qcom,sm8550-mpss-pas", .data =3D &sm8550_mpss_resource= }, { }, }; MODULE_DEVICE_TABLE(of, adsp_of_match); --=20 2.34.1