From nobody Mon Apr 13 21:43:02 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6004C4332F for ; Wed, 16 Nov 2022 10:22:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238779AbiKPKWZ (ORCPT ); Wed, 16 Nov 2022 05:22:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233569AbiKPKVy (ORCPT ); Wed, 16 Nov 2022 05:21:54 -0500 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 167E92314E for ; Wed, 16 Nov 2022 02:21:53 -0800 (PST) Received: by mail-wr1-x42c.google.com with SMTP id cl5so29115553wrb.9 for ; Wed, 16 Nov 2022 02:21:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GhLipikR7108xt+mQGUUpQ8DfphnyPitqRKsqUFWNfk=; b=uzGLOFK7HLGuw5ikgGebxyMvFO/YG/0WPs2EZK7lQL9wOc+ovH2QiL5jyClmZDb++I TgLk9JewfYlZ/tM/I95VAvNpDv96sWTM/cY2ien470qNK+LusJG39CWx7+4JTu3oC5LA d/mcWzx5lhj+coxrVaUMCsjoOor4VX3d5xBRYPj136r65+oAEsXRnznn9Kwg53YgMxmX QKAime4lKE6UtHKOD1dnZZI6mgJ44YCn4BZS9Q4MmnBhg09XTl/sV/8qKkJ3sflK8jHA rm5grcfNAuPXIv3yeGhb8d0r0+GbB0tre0Q5bXNmWygQsSHHkUqG3NM/jDyMd6Z92dCx usiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GhLipikR7108xt+mQGUUpQ8DfphnyPitqRKsqUFWNfk=; b=ifw6Gj/KXj6OWGghb9OJlLuJHDKXWEjuwI4XzWAjeBADM90rYN8aL4VaPgSaaLxQAr LwEPkTIKv7A1CKVJvNPQ56knNzZbSTxsEcuPe7OPi+ZIBwYf4oqCNKqDpJWSnQmYqBrN vWZOi6T3vwb5JoPnW4vI9zDP5peHLw2IBJHITRBIL7m+4WpKHavHBSm6RyJfrNkEK4W4 0ZC08VEzaGkEP2CqJL4kOo1SILpJkfif4uVQ+NGd8bwPCziIvYpqiiMObsT68S43uBga Qq4A2jiJ5DN/3xU+KfX15W2sWFsJ4Zq1LZLKbYTsWL+8yWmbM7q2Y4XA66sn6Uxwn2VL mMjw== X-Gm-Message-State: ANoB5pkGuv0zKcvNauya3/lJLTQBB44KKnq5gCpqa7qbmNtf0XljVt+F bE/oeW9Tb3aPLrf5hSVb+6yBUQ== X-Google-Smtp-Source: AA0mqf6q94C59AQmoLyhgHlUnaZXMBa0QgFqdLxiqIcqlI+DAHVwL9HaiMGcAaNAwXm5105TBddUWQ== X-Received: by 2002:adf:e2d1:0:b0:236:8638:121a with SMTP id d17-20020adfe2d1000000b002368638121amr12635622wrj.188.1668594111621; Wed, 16 Nov 2022 02:21:51 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id o5-20020a05600c510500b003b4ff30e566sm6133615wms.3.2022.11.16.02.21.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 02:21:51 -0800 (PST) From: Neil Armstrong Date: Wed, 16 Nov 2022 11:21:50 +0100 Subject: [PATCH 3/6] soc: qcom: geni-se: add desc struct to specify clocks from device match data MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20221114-narmstrong-sm8550-upstream-i2c-master-hub-v1-3-64449106a148@linaro.org> References: <20221114-narmstrong-sm8550-upstream-i2c-master-hub-v1-0-64449106a148@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-i2c-master-hub-v1-0-64449106a148@linaro.org> To: Rob Herring , Konrad Dybcio , Andy Gross , Krzysztof Kozlowski , Bjorn Andersson Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.10.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The I2C Master Hub is a stripped down version of the GENI Serial Engine QUP Wrapper Controller but only supporting I2C serial engines without DMA support. This prepares support for the I2C Master Hub variant, by moving the required clocks list to a new desc struct then passing it through the compatible match data. Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- drivers/soc/qcom/qcom-geni-se.c | 57 +++++++++++++++++++++++++++++++------= ---- 1 file changed, 43 insertions(+), 14 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-s= e.c index a0ceeede450f..f4f54d92a01a 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -81,19 +81,31 @@ */ =20 #define MAX_CLK_PERF_LEVEL 32 -#define NUM_AHB_CLKS 2 +#define MAX_CLKS 2 =20 /** * struct geni_wrapper - Data structure to represent the QUP Wrapper Core * @dev: Device pointer of the QUP wrapper core * @base: Base address of this instance of QUP wrapper core - * @ahb_clks: Handle to the primary & secondary AHB clocks + * @clks: Handle to the primary & optional secondary AHB clocks + * @num_clks: Count of clocks * @to_core: Core ICC path */ struct geni_wrapper { struct device *dev; void __iomem *base; - struct clk_bulk_data ahb_clks[NUM_AHB_CLKS]; + struct clk_bulk_data clks[MAX_CLKS]; + unsigned int num_clks; +}; + +/** + * struct geni_se_desc - Data structure to represent the QUP Wrapper resou= rces + * @clks: Name of the primary & optional secondary AHB clocks + * @num_clks: Count of clock names + */ +struct geni_se_desc { + unsigned int num_clks; + const char * const *clks; }; =20 static const char * const icc_path_names[] =3D {"qup-core", "qup-config", @@ -496,8 +508,7 @@ static void geni_se_clks_off(struct geni_se *se) struct geni_wrapper *wrapper =3D se->wrapper; =20 clk_disable_unprepare(se->clk); - clk_bulk_disable_unprepare(ARRAY_SIZE(wrapper->ahb_clks), - wrapper->ahb_clks); + clk_bulk_disable_unprepare(wrapper->num_clks, wrapper->clks); } =20 /** @@ -528,15 +539,13 @@ static int geni_se_clks_on(struct geni_se *se) int ret; struct geni_wrapper *wrapper =3D se->wrapper; =20 - ret =3D clk_bulk_prepare_enable(ARRAY_SIZE(wrapper->ahb_clks), - wrapper->ahb_clks); + ret =3D clk_bulk_prepare_enable(wrapper->num_clks, wrapper->clks); if (ret) return ret; =20 ret =3D clk_prepare_enable(se->clk); if (ret) - clk_bulk_disable_unprepare(ARRAY_SIZE(wrapper->ahb_clks), - wrapper->ahb_clks); + clk_bulk_disable_unprepare(wrapper->num_clks, wrapper->clks); return ret; } =20 @@ -887,11 +896,21 @@ static int geni_se_probe(struct platform_device *pdev) return PTR_ERR(wrapper->base); =20 if (!has_acpi_companion(&pdev->dev)) { - wrapper->ahb_clks[0].id =3D "m-ahb"; - wrapper->ahb_clks[1].id =3D "s-ahb"; - ret =3D devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks); + const struct geni_se_desc *desc; + int i; + + desc =3D device_get_match_data(&pdev->dev); + if (!desc) + return -EINVAL; + + wrapper->num_clks =3D min_t(unsigned int, desc->num_clks, MAX_CLKS); + + for (i =3D 0; i < wrapper->num_clks; ++i) + wrapper->clks[i].id =3D desc->clks[i]; + + ret =3D devm_clk_bulk_get(dev, wrapper->num_clks, wrapper->clks); if (ret) { - dev_err(dev, "Err getting AHB clks %d\n", ret); + dev_err(dev, "Err getting clks %d\n", ret); return ret; } } @@ -901,8 +920,18 @@ static int geni_se_probe(struct platform_device *pdev) return devm_of_platform_populate(dev); } =20 +static const char * const qup_clks[] =3D { + "m-ahb", + "s-ahb", +}; + +static const struct geni_se_desc qup_desc =3D { + .clks =3D qup_clks, + .num_clks =3D ARRAY_SIZE(qup_clks), +}; + static const struct of_device_id geni_se_dt_match[] =3D { - { .compatible =3D "qcom,geni-se-qup", }, + { .compatible =3D "qcom,geni-se-qup", .data =3D &qup_desc }, {} }; MODULE_DEVICE_TABLE(of, geni_se_dt_match); --=20 b4 0.10.1