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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id iv16-20020a05600c549000b003cf87623c16sm14605752wmb.4.2022.11.12.08.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Nov 2022 08:04:28 -0800 (PST) From: Nicolas Frattaroli To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/6] arm64: dts: rockchip: Enable video output and HDMI on SOQuartz Date: Sat, 12 Nov 2022 17:03:59 +0100 Message-Id: <20221112160404.70868-3-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221112160404.70868-1-frattaroli.nicolas@gmail.com> References: <20221112160404.70868-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch adds and enables the necessary device tree nodes to enable video output and HDMI functionality on the SOQuartz module. Signed-off-by: Nicolas Frattaroli --- .../boot/dts/rockchip/rk3566-soquartz.dtsi | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi b/arch/arm64= /boot/dts/rockchip/rk3566-soquartz.dtsi index 6e99f049501c..0bfb0cea7d6b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi @@ -4,6 +4,7 @@ =20 #include #include +#include #include "rk3566.dtsi" =20 / { @@ -28,6 +29,17 @@ gmac1_clkin: external-gmac1-clock { #clock-cells =3D <0>; }; =20 + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + leds { compatible =3D "gpio-leds"; =20 @@ -148,6 +160,24 @@ &gpu { status =3D "okay"; }; =20 +&hdmi { + avdd-0v9-supply =3D <&vdda0v9_image>; + avdd-1v8-supply =3D <&vcca1v8_image>; + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + &i2c0 { status =3D "okay"; =20 @@ -619,3 +649,20 @@ &usb2phy0_otg { &usb_host0_xhci { status =3D "disabled"; }; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; --=20 2.38.1