From nobody Mon Dec 15 23:27:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21C56C4332F for ; Thu, 10 Nov 2022 01:54:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232449AbiKJByy (ORCPT ); Wed, 9 Nov 2022 20:54:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232332AbiKJByj (ORCPT ); Wed, 9 Nov 2022 20:54:39 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1756A636E; Wed, 9 Nov 2022 17:54:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668045279; x=1699581279; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lg09VbI/60vYnXZzpwRBHqC+c64eQ+EJZudgsq58kIU=; b=EJ5g+K8UCkL3crMRMmrLlFZ2rtYqPI/JW83lMSR+65pe1vwJ/i0vOkdQ A3vN24L915r4I5L8P7yQ34hX+LUJ2yyax4jZfsriWwV5fFNKJjVqNhtpK o9kGMdXpyjF0Oywve/TFNgo/fId5lcos+YXxf37a+U4hsVIFZPTXnfZi2 smF+QqyZjbcH7pzjAwrmGy7honNSv4t3+/YsBtqgnPZsroN6sJS9O2BD0 LJHu+j6kbRTjHyz4aiK/mGccpF+kF1Bw3ssj/kIss+na5thWdJF31TGUm wpacCh20lRPrubhKzROQp23d43c6uS70Zx2pVV4SriQeZXUoRSc/OS/Dk Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="308803587" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="308803587" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 17:53:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="762099904" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="762099904" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by orsmga004.jf.intel.com with ESMTP; 09 Nov 2022 17:53:04 -0800 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/7] x86: KVM: Advertise AMX-FP16 CPUID to user space Date: Thu, 10 Nov 2022 09:52:48 +0800 Message-Id: <20221110015252.202566-4-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221110015252.202566-1-jiaxi.chen@linux.intel.com> References: <20221110015252.202566-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Latest Intel platform Granite Rapids has introduced a new instruction - AMX-FP16, which performs dot-products of two FP16 tiles and accumulates the results into a packed single precision tile. This instrucion needs no additional enabling on top of the existing kernel AMX enabling. AMX-FP16 adds FP16 capability and also allows a FP16 GPU trained model to run faster without loss of accuracy or added SW overhead. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EAX[bit 21] This CPUID is exposed to user space. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index b388ef52f8c8..19ef02d5b11b 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -657,7 +657,7 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EAX, - F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) + F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 24f570ddb225..05fd43ebd226 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -29,6 +29,7 @@ enum kvm_only_cpuid_leafs { #define X86_FEATURE_AVX_VNNI KVM_X86_FEATURE(CPUID_7_1_EAX, 4) #define X86_FEATURE_AVX512_BF16 KVM_X86_FEATURE(CPUID_7_1_EAX, 5) #define X86_FEATURE_CMPCCXADD KVM_X86_FEATURE(CPUID_7_1_EAX, 7) +#define X86_FEATURE_AMX_FP16 KVM_X86_FEATURE(CPUID_7_1_EAX, 21) =20 struct cpuid_reg { u32 function; --=20 2.27.0