From nobody Mon Dec 15 23:27:04 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09BDDC433FE for ; Thu, 10 Nov 2022 01:54:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232400AbiKJByn (ORCPT ); Wed, 9 Nov 2022 20:54:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232267AbiKJByc (ORCPT ); Wed, 9 Nov 2022 20:54:32 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FDFC27B35; Wed, 9 Nov 2022 17:54:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668045270; x=1699581270; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=taX06KsU8mQXBQxKFDkHqGSkrqNdhC3yQd3XBk1YjEY=; b=c/aZyX/QBQk1sSFG1gsj6d1Ab/BOnOsxZsr94Ee0X0xB1MhK9VHSmuCS tI7tjQ26NcCsNQY/hnJQQpaqn90qHHKuQcXUR56StmRqfzzUvBsV4U1Wb LPa/I4WF4DXDfHBYGGjwnUbl7r1kK298mtlVVIxLYzf3vGHi9qITjOpa7 iMie5KBENr7gPIAX4Oj+KyjfaejKaXBNe+mf2UhsEySaAiKYq9dhoBp8D RVQoWpfR6L6DnqL8pkDD7Bw2Qk0Bz/+xd4p1w2dImoOuhfCZqbbcLkwU8 t/KLwSgHBvJ9Ukb7i4J0Vt4c8wLZNHtQ65hXtYu7ZY7X5RYIa1L4Ht/e/ A==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="397475871" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="397475871" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 17:53:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="762099833" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="762099833" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by orsmga004.jf.intel.com with ESMTP; 09 Nov 2022 17:52:59 -0800 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/7] x86: KVM: Advertise CMPccXADD CPUID to user space Date: Thu, 10 Nov 2022 09:52:47 +0800 Message-Id: <20221110015252.202566-3-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221110015252.202566-1-jiaxi.chen@linux.intel.com> References: <20221110015252.202566-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" CMPccXADD is a new set of instructions in the latest Intel platform Sierra Forest. This new instruction set includes a semaphore operation that can compare and add the operands if condition is met, which can improve database performance. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EAX[bit 7] This CPUID is exposed to userspace. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 89f5e7f0402b..b388ef52f8c8 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -657,7 +657,7 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EAX, - F(AVX_VNNI) | F(AVX512_BF16) + F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 674de5b24f8d..24f570ddb225 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -28,6 +28,7 @@ enum kvm_only_cpuid_leafs { /* Intel-defined sub-features, CPUID level 0x00000007:1 (EAX) */ #define X86_FEATURE_AVX_VNNI KVM_X86_FEATURE(CPUID_7_1_EAX, 4) #define X86_FEATURE_AVX512_BF16 KVM_X86_FEATURE(CPUID_7_1_EAX, 5) +#define X86_FEATURE_CMPCCXADD KVM_X86_FEATURE(CPUID_7_1_EAX, 7) =20 struct cpuid_reg { u32 function; --=20 2.27.0