From nobody Sat Apr 11 13:36:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7388CC4332F for ; Tue, 8 Nov 2022 00:39:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233076AbiKHAjz (ORCPT ); Mon, 7 Nov 2022 19:39:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233019AbiKHAjw (ORCPT ); Mon, 7 Nov 2022 19:39:52 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBC2413F6F; Mon, 7 Nov 2022 16:39:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667867991; x=1699403991; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p/aKgQPwXxZNULQAZONJmKS+Fb81oYGXbZJp0mJgn80=; b=iTZsEW51SlMoFbkLQjBuu/OIMmyZlT/VW77R1vyxp/sstt+uBfLfkxyt Io50VA/6VP0NlT1b00AIWzXs0Pd3wKY+O8LQnQ1A7/9Qxr6gj7Fcf7rX9 njxGXk5mN2eNN//AzShJzXexX4dX7ONPNwmQCXUV8OatImINvBx9/UrsT YaqG+AutiJq3eufFT9vOdQ0r3Wu7KJBc+p3CnGMzyh8QThLeKaj9NsUo4 zgPQ4OvqMoEs+4Wsh0wpKWy/jsUy53eQeJWnhWVISOBHL6bjoPotKU64O psoUuPWOf2NQhgjhYkp4LyO7DYgGfjmyB19u4Kw81SMhrUjnqWuafF+Mm g==; X-IronPort-AV: E=McAfee;i="6500,9779,10524"; a="374833334" X-IronPort-AV: E=Sophos;i="5.96,145,1665471600"; d="scan'208";a="374833334" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2022 16:39:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10524"; a="811041351" X-IronPort-AV: E=Sophos;i="5.96,145,1665471600"; d="scan'208";a="811041351" Received: from fyu1.sc.intel.com ([172.25.103.126]) by orsmga005.jf.intel.com with ESMTP; 07 Nov 2022 16:39:50 -0800 From: Fenghua Yu To: "Vinod Koul" , "Dave Jiang" Cc: dmaengine@vger.kernel.org, "linux-kernel" , Fenghua Yu Subject: [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Date: Mon, 7 Nov 2022 16:39:42 -0800 Message-Id: <20221108003944.2095567-2-fenghua.yu@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20221108003944.2095567-1-fenghua.yu@intel.com> References: <20221108003944.2095567-1-fenghua.yu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The memory fill operation (0x04) can fill in memory with either 8 bytes or 16 bytes of pattern. To fill in memory with 16 bytes of pattern, the first 8 bytes are provided in pattern lower in bytes 16-23 and the next 8 bytes are in pattern upper in bytes 40-47 in the descriptor. Currently only 8 bytes of pattern is enabled. Add descriptor definitions for pattern lower and pattern upper so that user can use 16 bytes of pattern to fill memory. Signed-off-by: Fenghua Yu Reviewed-by: Dave Jiang --- include/uapi/linux/idxd.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h index 095299c75828..04a2f6411820 100644 --- a/include/uapi/linux/idxd.h +++ b/include/uapi/linux/idxd.h @@ -179,6 +179,7 @@ struct dsa_hw_desc { uint64_t rdback_addr; uint64_t pattern; uint64_t desc_list_addr; + uint64_t pattern_lower; }; union { uint64_t dst_addr; @@ -243,6 +244,11 @@ struct dsa_hw_desc { uint16_t dest_app_tag_seed; }; =20 + /* Fill */ + struct { + uint64_t pattern_upper; + }; + uint8_t op_specific[24]; }; } __attribute__((packed)); --=20 2.32.0