From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37142C433FE for ; Thu, 3 Nov 2022 02:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230460AbiKCCuy (ORCPT ); Wed, 2 Nov 2022 22:50:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231230AbiKCCum (ORCPT ); Wed, 2 Nov 2022 22:50:42 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E30F11164; Wed, 2 Nov 2022 19:50:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667443840; x=1698979840; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OrIoPfAaFxyGwyJ42VnSxwQIBSLZ5vI600fUBQrgg84=; b=N9By31Nm3WrJH4uoTxmqZRHOWL7UmMZKvZD0GU50u4KGS/VV34plA72A xax5n1Z3ZeHhRRyPmX2e1bFcQv//1zpaw5ccE9ZoMIXEIGGhjwPth+1Su ZEYF1+nSK+q2NGLWf6gzV7g78vyB2orQRctRwow32ENvIKJLAJvkBvdbT Gu+GCHdwoX2apjLODBEeVJ1clXTvmnN2pP5HNlOFzn2InDhh6p6kgfcqv ujadCowDqFibpGj19/bBGdSPgk7aSZVtQFFq5DtAY4VUXeDgapDG2d2/T 0tTrsLZBDRxj04vquQCWGrbrYH/22QS+aw01nSAmZkyp6hDTtN6KUUUIf A==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="289961921" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="289961921" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:50:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047821" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047821" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:50:35 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/8] x86: KVM: Move existing x86 CPUID leaf [CPUID_7_1_EAX] to kvm-only leaf Date: Thu, 3 Nov 2022 10:50:23 +0800 Message-Id: <20221103025030.78371-2-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" cpuid_leaf[12] CPUID_7_1_EAX has only two bits are in use currently: - AVX-VNNI CPUID.(EAX=3D7,ECX=3D1):EAX[bit 4] - AVX512-BF16 CPUID.(EAX=3D7,ECX=3D1):EAX[bit 5] These two bits have no other kernel usages other than the guest CPUID advertisement in KVM. Given that and to save space for kernel feature bits, move these two bits to the kvm-only subleaves. The existing leaf cpuid_leafs[12] is set to CPUID_DUMMY so future feature can pick it. This basically reverts: - commit b85a0425d805 ("Enumerate AVX Vector Neural Network instructions") - commit b302e4b176d0 ("x86/cpufeatures: Enumerate the new AVX512 BFLOAT16 instructions") - commit 1085a6b585d7 ("KVM: Expose AVX_VNNI instruction to guset") Signed-off-by: Jiaxi Chen --- arch/x86/include/asm/cpufeature.h | 2 +- arch/x86/include/asm/cpufeatures.h | 4 ---- arch/x86/kernel/cpu/common.c | 6 ------ arch/x86/kernel/cpu/cpuid-deps.c | 1 - arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/reverse_cpuid.h | 5 +++++ 6 files changed, 7 insertions(+), 13 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufe= ature.h index 1a85e1fb0922..fbb4e7bd2288 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -24,7 +24,7 @@ enum cpuid_leafs CPUID_7_0_EBX, CPUID_D_1_EAX, CPUID_LNX_4, - CPUID_7_1_EAX, + CPUID_DUMMY, CPUID_8000_0008_EBX, CPUID_6_EAX, CPUID_8000_000A_EDX, diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index ef4775c6db01..cabe96df9555 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -305,10 +305,6 @@ #define X86_FEATURE_USE_IBPB_FW (11*32+16) /* "" Use IBPB during runtime = firmware calls */ #define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on VM exit w= hen EIBRS is enabled */ =20 -/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ -#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ -#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instruction= s */ - /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 3e508f239098..0c19c84d7ba0 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1026,12 +1026,6 @@ void get_cpu_cap(struct cpuinfo_x86 *c) c->x86_capability[CPUID_7_0_EBX] =3D ebx; c->x86_capability[CPUID_7_ECX] =3D ecx; c->x86_capability[CPUID_7_EDX] =3D edx; - - /* Check valid sub-leaf index before accessing it */ - if (eax >=3D 1) { - cpuid_count(0x00000007, 1, &eax, &ebx, &ecx, &edx); - c->x86_capability[CPUID_7_1_EAX] =3D eax; - } } =20 /* Extended state features: level 0x0000000d */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-d= eps.c index c881bcafba7d..a88e0e8c39fa 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -68,7 +68,6 @@ static const struct cpuid_dep cpuid_deps[] =3D { { X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, - { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, { X86_FEATURE_PER_THREAD_MBA, X86_FEATURE_MBA }, diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 7065462378e2..89f5e7f0402b 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -656,7 +656,7 @@ void kvm_set_cpu_caps(void) if (boot_cpu_has(X86_FEATURE_AMD_SSBD)) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); =20 - kvm_cpu_cap_mask(CPUID_7_1_EAX, + kvm_cpu_cap_init_scattered(CPUID_7_1_EAX, F(AVX_VNNI) | F(AVX512_BF16) ); =20 diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index a19d473d0184..674de5b24f8d 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -13,6 +13,7 @@ */ enum kvm_only_cpuid_leafs { CPUID_12_EAX =3D NCAPINTS, + CPUID_7_1_EAX, NR_KVM_CPU_CAPS, =20 NKVMCAPINTS =3D NR_KVM_CPU_CAPS - NCAPINTS, @@ -24,6 +25,10 @@ enum kvm_only_cpuid_leafs { #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0) #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1) =20 +/* Intel-defined sub-features, CPUID level 0x00000007:1 (EAX) */ +#define X86_FEATURE_AVX_VNNI KVM_X86_FEATURE(CPUID_7_1_EAX, 4) +#define X86_FEATURE_AVX512_BF16 KVM_X86_FEATURE(CPUID_7_1_EAX, 5) + struct cpuid_reg { u32 function; u32 index; --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15ACBC4332F for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="308289825" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="308289825" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:50:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047877" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047877" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:50:40 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/8] x86/cpufeatures: Replace [CPUID_DUMMY] in cpuid_leafs[] with the last leaf Date: Thu, 3 Nov 2022 10:50:24 +0800 Message-Id: <20221103025030.78371-3-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" We now have empty feature bits in cpuid_leafs[12] CPUID_DUMMY, move the last one cpuid_leafs[19] CPUID_8000_001F_EAX to the hole and we can shorten the length of cpuid_leafs[] from current 20 to 19. Signed-off-by: Jiaxi Chen --- arch/x86/include/asm/cpufeature.h | 9 +++------ arch/x86/include/asm/cpufeatures.h | 18 +++++++++--------- arch/x86/include/asm/disabled-features.h | 3 +-- arch/x86/include/asm/required-features.h | 3 +-- 4 files changed, 14 insertions(+), 19 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufe= ature.h index fbb4e7bd2288..bf273d796331 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -24,14 +24,13 @@ enum cpuid_leafs CPUID_7_0_EBX, CPUID_D_1_EAX, CPUID_LNX_4, - CPUID_DUMMY, + CPUID_8000_001F_EAX, CPUID_8000_0008_EBX, CPUID_6_EAX, CPUID_8000_000A_EDX, CPUID_7_ECX, CPUID_8000_0007_EBX, CPUID_7_EDX, - CPUID_8000_001F_EAX, }; =20 #define X86_CAP_FMT_NUM "%d:%d" @@ -93,9 +92,8 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \ - CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \ REQUIRED_MASK_CHECK || \ - BUILD_BUG_ON_ZERO(NCAPINTS !=3D 20)) + BUILD_BUG_ON_ZERO(NCAPINTS !=3D 19)) =20 #define DISABLED_MASK_BIT_SET(feature_bit) \ ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \ @@ -117,9 +115,8 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \ - CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \ DISABLED_MASK_CHECK || \ - BUILD_BUG_ON_ZERO(NCAPINTS !=3D 20)) + BUILD_BUG_ON_ZERO(NCAPINTS !=3D 19)) =20 #define cpu_has(c, bit) \ (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index cabe96df9555..df67a638f650 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -13,7 +13,7 @@ /* * Defines x86 CPU feature bits */ -#define NCAPINTS 20 /* N 32-bit words worth of info */ +#define NCAPINTS 19 /* N 32-bit words worth of info */ #define NBUGINTS 1 /* N 32-bit bug flags */ =20 /* @@ -305,6 +305,14 @@ #define X86_FEATURE_USE_IBPB_FW (11*32+16) /* "" Use IBPB during runtime = firmware calls */ #define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on VM exit w= hen EIBRS is enabled */ =20 +/* AMD-defined memory encryption features, CPUID level 0x8000001f (EAX), w= ord 12 */ +#define X86_FEATURE_SME (12*32+ 0) /* AMD Secure Memory Encryption */ +#define X86_FEATURE_SEV (12*32+ 1) /* AMD Secure Encrypted Virtualizatio= n */ +#define X86_FEATURE_VM_PAGE_FLUSH (12*32+ 2) /* "" VM Page Flush MSR is su= pported */ +#define X86_FEATURE_SEV_ES (12*32+ 3) /* AMD Secure Encrypted Virtualizat= ion - Encrypted State */ +#define X86_FEATURE_V_TSC_AUX (12*32+ 9) /* "" Virtual TSC_AUX */ +#define X86_FEATURE_SME_COHERENT (12*32+10) /* "" AMD hardware-enforced ca= che coherency */ + /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ @@ -408,14 +416,6 @@ #define X86_FEATURE_CORE_CAPABILITIES (18*32+30) /* "" IA32_CORE_CAPABILIT= IES MSR */ #define X86_FEATURE_SPEC_CTRL_SSBD (18*32+31) /* "" Speculative Store Bypa= ss Disable */ =20 -/* AMD-defined memory encryption features, CPUID level 0x8000001f (EAX), w= ord 19 */ -#define X86_FEATURE_SME (19*32+ 0) /* AMD Secure Memory Encryption */ -#define X86_FEATURE_SEV (19*32+ 1) /* AMD Secure Encrypted Virtualizatio= n */ -#define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* "" VM Page Flush MSR is su= pported */ -#define X86_FEATURE_SEV_ES (19*32+ 3) /* AMD Secure Encrypted Virtualizat= ion - Encrypted State */ -#define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* "" Virtual TSC_AUX */ -#define X86_FEATURE_SME_COHERENT (19*32+10) /* "" AMD hardware-enforced ca= che coherency */ - /* * BUG word(s) */ diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/as= m/disabled-features.h index 33d2cd04d254..192618cc0a42 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -110,7 +110,6 @@ DISABLE_ENQCMD) #define DISABLED_MASK17 0 #define DISABLED_MASK18 0 -#define DISABLED_MASK19 0 -#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS !=3D 20) +#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS !=3D 19) =20 #endif /* _ASM_X86_DISABLED_FEATURES_H */ diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/as= m/required-features.h index aff774775c67..ff5e091efd2c 100644 --- a/arch/x86/include/asm/required-features.h +++ b/arch/x86/include/asm/required-features.h @@ -97,7 +97,6 @@ #define REQUIRED_MASK16 0 #define REQUIRED_MASK17 0 #define REQUIRED_MASK18 0 -#define REQUIRED_MASK19 0 -#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS !=3D 20) +#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS !=3D 19) =20 #endif /* _ASM_X86_REQUIRED_FEATURES_H */ --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04B06C4332F for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="308289832" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="308289832" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:50:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047890" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047890" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:50:45 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/8] x86: KVM: Advertise CMPccXADD CPUID to user space Date: Thu, 3 Nov 2022 10:50:25 +0800 Message-Id: <20221103025030.78371-4-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" CMPccXADD is a new set of instructions in the latest Intel platform Sierra Forest. This new instruction set includes a semaphore operation that can compare and add the operands if condition is met, which can improve database performance. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EAX[bit 7] This CPUID is exposed to userspace. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 89f5e7f0402b..b388ef52f8c8 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -657,7 +657,7 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EAX, - F(AVX_VNNI) | F(AVX512_BF16) + F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 674de5b24f8d..24f570ddb225 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -28,6 +28,7 @@ enum kvm_only_cpuid_leafs { /* Intel-defined sub-features, CPUID level 0x00000007:1 (EAX) */ #define X86_FEATURE_AVX_VNNI KVM_X86_FEATURE(CPUID_7_1_EAX, 4) #define X86_FEATURE_AVX512_BF16 KVM_X86_FEATURE(CPUID_7_1_EAX, 5) +#define X86_FEATURE_CMPCCXADD KVM_X86_FEATURE(CPUID_7_1_EAX, 7) =20 struct cpuid_reg { u32 function; --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAE8EC4332F for ; Thu, 3 Nov 2022 02:51:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230006AbiKCCvX (ORCPT ); Wed, 2 Nov 2022 22:51:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231260AbiKCCu6 (ORCPT ); Wed, 2 Nov 2022 22:50:58 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E3B313E9B; Wed, 2 Nov 2022 19:50:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667443855; x=1698979855; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lg09VbI/60vYnXZzpwRBHqC+c64eQ+EJZudgsq58kIU=; b=WrcQQ9l7ltZb7HpcXDVAO+QcAL+f83wQBO2shMQDiR/mz68mJSf/ZIyb HxpliXC3OhCwEvE9cT8epwkCDAbFO4DwR8mZ86PRzWnDO2fj4o45XON7n 7xRo7bvSsr2PzRDvMl+pSURgq6liAbmzqtyZzRJRtJXQkReo8992iY/xr TyQIhH8+rnnMjk7VKhGYleFn+HxRY/+UbSGXryaS6VrsK0Jgg7GG/RBqO 3/4tWk7iaJ7LWuDPshDP4C3t7rIDP2pTr02aVX04TiWxY6uaexG65VIuz rrb7imCSJbnIrcdommYv+XZA3BArRVHHhjwSMXZb4LR+i4cDSd7+8d6iO g==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="308289844" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="308289844" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:50:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047897" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047897" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:50:50 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/8] x86: KVM: Advertise AMX-FP16 CPUID to user space Date: Thu, 3 Nov 2022 10:50:26 +0800 Message-Id: <20221103025030.78371-5-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Latest Intel platform Granite Rapids has introduced a new instruction - AMX-FP16, which performs dot-products of two FP16 tiles and accumulates the results into a packed single precision tile. This instrucion needs no additional enabling on top of the existing kernel AMX enabling. AMX-FP16 adds FP16 capability and also allows a FP16 GPU trained model to run faster without loss of accuracy or added SW overhead. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EAX[bit 21] This CPUID is exposed to user space. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index b388ef52f8c8..19ef02d5b11b 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -657,7 +657,7 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EAX, - F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) + F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 24f570ddb225..05fd43ebd226 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -29,6 +29,7 @@ enum kvm_only_cpuid_leafs { #define X86_FEATURE_AVX_VNNI KVM_X86_FEATURE(CPUID_7_1_EAX, 4) #define X86_FEATURE_AVX512_BF16 KVM_X86_FEATURE(CPUID_7_1_EAX, 5) #define X86_FEATURE_CMPCCXADD KVM_X86_FEATURE(CPUID_7_1_EAX, 7) +#define X86_FEATURE_AMX_FP16 KVM_X86_FEATURE(CPUID_7_1_EAX, 21) =20 struct cpuid_reg { u32 function; --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44415C433FE for ; Thu, 3 Nov 2022 02:51:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231381AbiKCCvj (ORCPT ); Wed, 2 Nov 2022 22:51:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231339AbiKCCvU (ORCPT ); Wed, 2 Nov 2022 22:51:20 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A271814036; Wed, 2 Nov 2022 19:51:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667443860; x=1698979860; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qDIvJKQbDJZne66SN3OTzm4SJ9/jbIpx8cLqn7z/wuU=; b=iz/GVGE5QBtI4TYG4NahYz0/f/T7FIlc9l7j4ami0KHFb8gj9AYA/l06 Ex2pG/CNpPSc7KlrjUWAStNs6t3L4z9CZoPxdu5qTmP530fAGeZhvPLdE P6b9hcqYuJT5+T83uJXVGZAzwIzorhlZ38ebCCXCdWQzingg7upTAxq0G Kxc5MFSsMcd5nboKVQ16yUAP0N1wG7Oen3qEnbDqLGErTeoGlm4SkiKOl p9E2RxN85ttR2l0pCrGzVOQ2B1SHbxgyZhYSB8wAG66bjHxwkyQ1KbA7l IThtwJ/IGmV6/F8i8Hy+Ume8fqwlvgfEQe9CZln+BGMS9M1Jf0FW8xqby w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="307186647" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="307186647" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:51:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047904" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047904" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:50:55 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/8] x86: KVM: Advertise AVX-IFMA CPUID to user space Date: Thu, 3 Nov 2022 10:50:27 +0800 Message-Id: <20221103025030.78371-6-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" AVX-IFMA is a new instruction in the latest Intel platform Sierra Forest. This instruction packed multiplies unsigned 52-bit integers and adds the low/high 52-bit products to Qword Accumulators. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EAX[bit 23] This CPUID is exposed to user space. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 3 ++- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 19ef02d5b11b..e84c6216a72c 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -657,7 +657,8 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EAX, - F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) + F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) | + F(AVX_IFMA) ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 05fd43ebd226..954c0ceb1e90 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -30,6 +30,7 @@ enum kvm_only_cpuid_leafs { #define X86_FEATURE_AVX512_BF16 KVM_X86_FEATURE(CPUID_7_1_EAX, 5) #define X86_FEATURE_CMPCCXADD KVM_X86_FEATURE(CPUID_7_1_EAX, 7) #define X86_FEATURE_AMX_FP16 KVM_X86_FEATURE(CPUID_7_1_EAX, 21) +#define X86_FEATURE_AVX_IFMA KVM_X86_FEATURE(CPUID_7_1_EAX, 23) =20 struct cpuid_reg { u32 function; --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9AFFC4332F for ; Thu, 3 Nov 2022 02:52:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229700AbiKCCv6 (ORCPT ); Wed, 2 Nov 2022 22:51:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231307AbiKCCvZ (ORCPT ); Wed, 2 Nov 2022 22:51:25 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4CC715721; Wed, 2 Nov 2022 19:51:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667443865; x=1698979865; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QZah9F13AjoVe9tv/CykWOC6OrnYXLMSXtZoIq5C0N0=; b=VPshaeWWC+w/wq2XqKqj43wHvKnGfJWlDgNRNLywEZjOf5JlkTscNPmC fqmbsuBHuyRMyQUQ0ekf63Iiv0r9Lv6tQjKvDSob/4KYUM0/EXg2k0BRa GBul/rjhP3vGk8afERl3pkiqV9GPR/aLdfWpmwNFk/WvsqREvZAUi8haX 4EDc7q0Sn6POS3ahaUY0VEduU0qvsiRV4K4RfSk4AugPJHtTS2Xr3eaGy /HckDOTdu/ztIpzNKKMNbhCEJKCYn4n0CmV5u0a0simbPhAfYlUvmtYbi NG5tu/GttnCvE0Y895bC1KpWVTM24EQIeWfjydLPFGUrtcIivxmzRzp3I w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="307186654" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="307186654" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:51:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047919" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047919" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:51:00 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/8] x86: KVM: Advertise AVX-VNNI-INT8 CPUID to user space Date: Thu, 3 Nov 2022 10:50:28 +0800 Message-Id: <20221103025030.78371-7-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" AVX-VNNI-INT8 is a new set of instructions in the latest Intel platform Sierra Forest, aims for the platform to have superior AI capabilities. This instruction multiplies the individual bytes of two unsigned or unsigned source operands, then adds and accumulates the results into the destination dword element size operand. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EDX[bit 4] This CPUID is exposed to user space. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 5 ++++- arch/x86/kvm/reverse_cpuid.h | 5 +++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index e84c6216a72c..06dacf71ff9c 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -661,6 +661,9 @@ void kvm_set_cpu_caps(void) F(AVX_IFMA) ); =20 + kvm_cpu_cap_init_scattered(CPUID_7_1_EDX, + F(AVX_VNNI_INT8)); + kvm_cpu_cap_mask(CPUID_D_1_EAX, F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES) | f_xfd ); @@ -914,9 +917,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_arra= y *array, u32 function) goto out; =20 cpuid_entry_override(entry, CPUID_7_1_EAX); + cpuid_entry_override(entry, CPUID_7_1_EDX); entry->ebx =3D 0; entry->ecx =3D 0; - entry->edx =3D 0; } break; case 0xa: { /* Architectural Performance Monitoring */ diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 954c0ceb1e90..819b4e0b13a3 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -14,6 +14,7 @@ enum kvm_only_cpuid_leafs { CPUID_12_EAX =3D NCAPINTS, CPUID_7_1_EAX, + CPUID_7_1_EDX, NR_KVM_CPU_CAPS, =20 NKVMCAPINTS =3D NR_KVM_CPU_CAPS - NCAPINTS, @@ -32,6 +33,9 @@ enum kvm_only_cpuid_leafs { #define X86_FEATURE_AMX_FP16 KVM_X86_FEATURE(CPUID_7_1_EAX, 21) #define X86_FEATURE_AVX_IFMA KVM_X86_FEATURE(CPUID_7_1_EAX, 23) =20 +/* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ +#define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) + struct cpuid_reg { u32 function; u32 index; @@ -56,6 +60,7 @@ static const struct cpuid_reg reverse_cpuid[] =3D { [CPUID_7_1_EAX] =3D { 7, 1, CPUID_EAX}, [CPUID_12_EAX] =3D {0x00000012, 0, CPUID_EAX}, [CPUID_8000_001F_EAX] =3D {0x8000001f, 0, CPUID_EAX}, + [CPUID_7_1_EDX] =3D { 7, 1, CPUID_EDX}, }; =20 /* --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CA00C4332F for ; Thu, 3 Nov 2022 02:52:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231321AbiKCCwE (ORCPT ); Wed, 2 Nov 2022 22:52:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231326AbiKCCvd (ORCPT ); Wed, 2 Nov 2022 22:51:33 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49B8F16585; Wed, 2 Nov 2022 19:51:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667443871; x=1698979871; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z3o7gjqmPQSafhqSVWDWNYduM/0WLm1c0YsgTUqZbj8=; b=OxvPh9f9UgtEKHIgGYdQJNUGNlWVXtIRz0HsUhjg3XwusXPIqx2ATPp/ BlL/BMU6yWimZOLm95L9rmAbOdGppDWXHhtcmMP99pGt3n42kMj9fDpJd c9sl4JDSW2N1LSt1n7xE9UWO2ErnmpV1h3xgk1XPWUPZdlB3OBag8EiPg yTACcoObMSK9p0cFGj9TLQeOp3K5u3LrqXFWNRHhO2tea0fE11P5jZudx iSfbTmMTRIoZCbyBX9DB6B16GplzT/Yem/9kvgSfbA0i+kBIpXJjVUzMp YmazmjBwFbXGyETaK9T/JROrke1JPcP4uaLKPVbf+RgXSLFjUPeKDYcDT w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="289282952" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="289282952" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:51:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047930" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047930" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:51:05 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/8] x86: KVM: Advertise AVX-NE-CONVERT CPUID to user space Date: Thu, 3 Nov 2022 10:50:29 +0800 Message-Id: <20221103025030.78371-8-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" AVX-NE-CONVERT is a new set of instructions which can convert low precision floating point like BF16/FP16 to high precision floating point FP32, and can also convert FP32 elements to BF16. This instruction allows the platform to have improved AI capabilities and better compatibility. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EDX[bit 5] This CPUID is exposed to user space. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 3 ++- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 06dacf71ff9c..47ac2a502d91 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -662,7 +662,8 @@ void kvm_set_cpu_caps(void) ); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EDX, - F(AVX_VNNI_INT8)); + F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) + ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES) | f_xfd diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 819b4e0b13a3..b8addd85b062 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -35,6 +35,7 @@ enum kvm_only_cpuid_leafs { =20 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) +#define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5) =20 struct cpuid_reg { u32 function; --=20 2.27.0 From nobody Fri Dec 19 17:34:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE400C43217 for ; Thu, 3 Nov 2022 02:52:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231366AbiKCCwZ (ORCPT ); Wed, 2 Nov 2022 22:52:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231364AbiKCCvy (ORCPT ); Wed, 2 Nov 2022 22:51:54 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F81F13F2F; Wed, 2 Nov 2022 19:51:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667443880; x=1698979880; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JwR3352mQmtvv3jNZ1XhkuwmOLMITQeiSm1roomzunE=; b=cEZsyvxplYHWJiTf93ddNqPEoTWsWua48H/ANx5El3I5/fCvHAAj86rE 65+rvWoWzRpjtTqvdJz7j4sUnp/E8HrIFc9A2tM7ks3AXxDFmnsEd+5zA TK4SgMzjjRLOUUopHP7fc4hHX6VadkD7KoOfJ4FbEtq/i4xHCRi//TRxV izx5scHctphqvbaUPD+/sNUm0pnFavrmDFjRA2hIO/Xsrdn4LidozhsBp JgNKXsWDRh5BK+OjPlrJfPTK0fMN+0+fAM7Uv1V5TX+5fTD9S/WMBh4Eb jbJO/j0TL/2oqq0smhTv4wxuaejktfu2kpl43F4A28QQnuOJQKUN8r3yX w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="289282961" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="289282961" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 19:51:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="698047945" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="698047945" Received: from jiaxichen-precision-3650-tower.sh.intel.com ([10.239.159.75]) by fmsmga008.fm.intel.com with ESMTP; 02 Nov 2022 19:51:10 -0700 From: Jiaxi Chen To: kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 8/8] x86: KVM: Advertise PREFETCHIT0/1 CPUID to user space Date: Thu, 3 Nov 2022 10:50:30 +0800 Message-Id: <20221103025030.78371-9-jiaxi.chen@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> References: <20221103025030.78371-1-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Latest Intel platform Granite Rapids has introduced a new instruction - PREFETCHIT0/1, which moves code to memory (cache) closer to the processor depending on specific hints. The bit definition: CPUID.(EAX=3D7,ECX=3D1):EDX[bit 14] This CPUID is exposed to user space. Besides, there is no other VMX control for this instruction. Signed-off-by: Jiaxi Chen --- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/reverse_cpuid.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 47ac2a502d91..9021a80b3553 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -662,7 +662,7 @@ void kvm_set_cpu_caps(void) ); =20 kvm_cpu_cap_init_scattered(CPUID_7_1_EDX, - F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) + F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) | F(PREFETCHITI) ); =20 kvm_cpu_cap_mask(CPUID_D_1_EAX, diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index b8addd85b062..884aebe7b3c2 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -36,6 +36,7 @@ enum kvm_only_cpuid_leafs { /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5) +#define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14) =20 struct cpuid_reg { u32 function; --=20 2.27.0