From nobody Wed Apr 8 22:48:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AFEEC433FE for ; Sun, 30 Oct 2022 00:19:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229943AbiJ3ATJ (ORCPT ); Sat, 29 Oct 2022 20:19:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229853AbiJ3ASr (ORCPT ); Sat, 29 Oct 2022 20:18:47 -0400 Received: from mail-il1-x132.google.com (mail-il1-x132.google.com [IPv6:2607:f8b0:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 757FB24F0E for ; Sat, 29 Oct 2022 17:18:45 -0700 (PDT) Received: by mail-il1-x132.google.com with SMTP id x16so4722744ilm.5 for ; Sat, 29 Oct 2022 17:18:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R88kCoeCwDv+6qx8H8D1eKrnunl5yRlCsLCL15HFklE=; b=F1+aFWl9mh16nV+3OhidAUkfR8KopPxpN92zsTwEGVEphUWqJtVtDlSMjRjOpGxUmG XMy8lwKkGE6/E+YVPj3ZDdAfaUwmGqDWbgmu/4YtRWvg37LLXBK7uXdbioJX7PNlwt1k 3uLIEXp2cgBNoVpCWmmqSmmsfrhloczhjmsqFt7MbVy9W1zYyjYi/wvQDRiwJshL9Q4o JFcVsjhnAfuTeixlcaASHodHRvZbmLzbK31vH1B2qqe08f2z5w7JKSCZ/NGx1/O4hUop /TKpWLB+1Dg1hY1a4ZR/Nxdq3ZUsolUL9IxMovRHXE+P4b2Db0kaPXFNOcw7gv6qo0h0 gPqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R88kCoeCwDv+6qx8H8D1eKrnunl5yRlCsLCL15HFklE=; b=0qHbQDYHjV6yfLVVeMjmR9Hdhts60hY+yYRNUmmXHeVBvyB+kDC6qIOzUYN6IZLaLm 2hoy3XP6uLI2n6KHNChFTw4GXYbXONogXZ3YFOdhFPKaiHIzIOnaIWnPhrmPKvwAjR7Q V+pR00vKJbqK9VJ2gJufWMoZfmoth5JFrDVSP24YTZDd2xLjuwImU8IXGSk/AqObBET3 wb++YUf+k8AfVNi26Te13YvhEYh4Jggm7IAoAmkaO1x2OVe874eLw4QBNMnr1hHNd8IJ UarY43dSRB0ER9Y/seu5RjaY1eDtNVi8v86pxq7y+zB642+qyi6A7ctTXmcTWNm2fIGd cmHQ== X-Gm-Message-State: ACrzQf07idI1hsTqfuM0HqXBM/MAGKQ2QBpN/TTJfgP4b3DSOfSDvWO3 y7K8S9UpNDYt2n8aJSzsUVFfXA== X-Google-Smtp-Source: AMsMyM5Eufyl9Abspn/K5iqnZ9+ZEgPo1s95Ze8BT24YGErCd18WlOw/mlZwABCMJ7cu+3WyezWs7Q== X-Received: by 2002:a92:502:0:b0:2fc:5e54:b4a6 with SMTP id q2-20020a920502000000b002fc5e54b4a6mr2946656ile.41.1667089124808; Sat, 29 Oct 2022 17:18:44 -0700 (PDT) Received: from presto.localdomain ([98.61.227.136]) by smtp.gmail.com with ESMTPSA id co20-20020a0566383e1400b00375126ae55fsm1087519jab.58.2022.10.29.17.18.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Oct 2022 17:18:44 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: mka@chromium.org, evgreen@chromium.org, andersson@kernel.org, quic_cpratapa@quicinc.com, quic_avuyyuru@quicinc.com, quic_jponduru@quicinc.com, quic_subashab@quicinc.com, elder@kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 5/9] net: ipa: use a bitmap for defined endpoints Date: Sat, 29 Oct 2022 19:18:24 -0500 Message-Id: <20221030001828.754010-6-elder@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221030001828.754010-1-elder@linaro.org> References: <20221030001828.754010-1-elder@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" IPA v5.0 supports more than 32 endpoints, so we will be unable to represent endpoints defined in the configuration data with a 32-bit value. To prepare for that, convert the field in the IPA structure representing defined endpoints to be a Linux bitmap. Convert loops based on that field into for_each_set_bit() calls over the new bitmap. Note that the loop in ipa_endpoint_config() still assumes there are 32 or fewer endpoints (when comparing against the available endpoint bit mask); that assumption goes away in the next patch. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa.h | 6 ++--- drivers/net/ipa/ipa_endpoint.c | 49 +++++++++++++++------------------- 2 files changed, 24 insertions(+), 31 deletions(-) diff --git a/drivers/net/ipa/ipa.h b/drivers/net/ipa/ipa.h index a44595575d066..261c7263f9e31 100644 --- a/drivers/net/ipa/ipa.h +++ b/drivers/net/ipa/ipa.h @@ -62,7 +62,7 @@ struct ipa_interrupt; * @zero_virt: Virtual address of preallocated zero-filled memory * @zero_size: Size (bytes) of preallocated zero-filled memory * @endpoint_count: Number of endpoints represented by bit masks below - * @defined: Bit mask indicating endpoints defined in config data + * @defined: Bitmap of endpoints defined in config data * @available: Bit mask indicating endpoints hardware supports * @filter_map: Bit mask indicating endpoints that support filtering * @set_up: Bit mask indicating endpoints set up @@ -117,9 +117,9 @@ struct ipa { void *zero_virt; size_t zero_size; =20 - /* Bit masks indicating endpoint state */ + /* Bitmaps indicating endpoint state */ u32 endpoint_count; - u32 defined; /* Defined in configuration data */ + unsigned long *defined; /* Defined in configuration data */ u32 available; /* Supported by hardware */ u32 filter_map; u32 set_up; diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c index 32559ed498c19..56908ee097cf6 100644 --- a/drivers/net/ipa/ipa_endpoint.c +++ b/drivers/net/ipa/ipa_endpoint.c @@ -459,8 +459,8 @@ void ipa_endpoint_modem_pause_all(struct ipa *ipa, bool= enable) /* Reset all modem endpoints to use the default exception endpoint */ int ipa_endpoint_modem_exception_reset_all(struct ipa *ipa) { - u32 defined =3D ipa->defined; struct gsi_trans *trans; + u32 endpoint_id; u32 count; =20 /* We need one command per modem TX endpoint, plus the commands @@ -474,14 +474,11 @@ int ipa_endpoint_modem_exception_reset_all(struct ipa= *ipa) return -EBUSY; } =20 - while (defined) { - u32 endpoint_id =3D __ffs(defined); + for_each_set_bit(endpoint_id, ipa->defined, ipa->endpoint_count) { struct ipa_endpoint *endpoint; const struct ipa_reg *reg; u32 offset; =20 - defined ^=3D BIT(endpoint_id); - /* We only reset modem TX endpoints */ endpoint =3D &ipa->endpoint[endpoint_id]; if (!(endpoint->ee_id =3D=3D GSI_EE_MODEM && endpoint->toward_ipa)) @@ -1823,16 +1820,11 @@ static void ipa_endpoint_teardown_one(struct ipa_en= dpoint *endpoint) =20 void ipa_endpoint_setup(struct ipa *ipa) { - u32 defined =3D ipa->defined; + u32 endpoint_id; =20 ipa->set_up =3D 0; - while (defined) { - u32 endpoint_id =3D __ffs(defined); - - defined ^=3D BIT(endpoint_id); - + for_each_set_bit(endpoint_id, ipa->defined, ipa->endpoint_count) ipa_endpoint_setup_one(&ipa->endpoint[endpoint_id]); - } } =20 void ipa_endpoint_teardown(struct ipa *ipa) @@ -1853,10 +1845,10 @@ int ipa_endpoint_config(struct ipa *ipa) { struct device *dev =3D &ipa->pdev->dev; const struct ipa_reg *reg; + u32 endpoint_id; u32 tx_count; u32 rx_count; u32 rx_base; - u32 defined; u32 limit; u32 val; =20 @@ -1896,13 +1888,9 @@ int ipa_endpoint_config(struct ipa *ipa) /* Mark all supported RX and TX endpoints as available */ ipa->available =3D GENMASK(limit - 1, rx_base) | GENMASK(tx_count - 1, 0); =20 - defined =3D ipa->defined; - while (defined) { - u32 endpoint_id =3D __ffs(defined); + for_each_set_bit(endpoint_id, ipa->defined, ipa->endpoint_count) { struct ipa_endpoint *endpoint; =20 - defined ^=3D BIT(endpoint_id); - if (endpoint_id >=3D limit) { dev_err(dev, "invalid endpoint id, %u > %u\n", endpoint_id, limit - 1); @@ -1954,27 +1942,26 @@ static void ipa_endpoint_init_one(struct ipa *ipa, = enum ipa_endpoint_name name, endpoint->toward_ipa =3D data->toward_ipa; endpoint->config =3D data->endpoint.config; =20 - ipa->defined |=3D BIT(endpoint->endpoint_id); + __set_bit(endpoint->endpoint_id, ipa->defined); } =20 static void ipa_endpoint_exit_one(struct ipa_endpoint *endpoint) { - endpoint->ipa->defined &=3D ~BIT(endpoint->endpoint_id); + __clear_bit(endpoint->endpoint_id, endpoint->ipa->defined); =20 memset(endpoint, 0, sizeof(*endpoint)); } =20 void ipa_endpoint_exit(struct ipa *ipa) { - u32 defined =3D ipa->defined; - - while (defined) { - u32 endpoint_id =3D __fls(defined); - - defined ^=3D BIT(endpoint_id); + u32 endpoint_id; =20 + for_each_set_bit(endpoint_id, ipa->defined, ipa->endpoint_count) ipa_endpoint_exit_one(&ipa->endpoint[endpoint_id]); - } + + bitmap_free(ipa->defined); + ipa->defined =3D NULL; + memset(ipa->name_map, 0, sizeof(ipa->name_map)); memset(ipa->channel_map, 0, sizeof(ipa->channel_map)); } @@ -1983,6 +1970,7 @@ void ipa_endpoint_exit(struct ipa *ipa) u32 ipa_endpoint_init(struct ipa *ipa, u32 count, const struct ipa_gsi_endpoint_data *data) { + struct device *dev =3D &ipa->pdev->dev; enum ipa_endpoint_name name; u32 filter_map; =20 @@ -1993,7 +1981,12 @@ u32 ipa_endpoint_init(struct ipa *ipa, u32 count, if (!ipa->endpoint_count) return 0; /* Error */ =20 - ipa->defined =3D 0; + /* Set up the defined endpoint bitmap */ + ipa->defined =3D bitmap_zalloc(ipa->endpoint_count, GFP_KERNEL); + if (!ipa->defined) { + dev_err(dev, "unable to allocate defined endpoint bitmap\n"); + return 0; + } =20 filter_map =3D 0; for (name =3D 0; name < count; name++, data++) { --=20 2.34.1