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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL02EPF0000C409.mail.protection.outlook.com (10.167.241.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5723.20 via Frontend Transport; Fri, 28 Oct 2022 05:09:50 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Fri, 28 Oct 2022 00:09:49 -0500 Received: from xhdpranavis40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.31 via Frontend Transport; Fri, 28 Oct 2022 00:09:45 -0500 From: Sarath Babu Naidu Gaddam To: , , , , CC: , , , , , , , , , Subject: [PATCH 1/5] dt-bindings: dmaengine: xilinx_dma: Add xlnx,axistream-connected property Date: Thu, 27 Oct 2022 23:09:36 -0600 Message-ID: <20221028050940.27888-2-sarath.babu.naidu.gaddam@amd.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221028050940.27888-1-sarath.babu.naidu.gaddam@amd.com> References: <20221028050940.27888-1-sarath.babu.naidu.gaddam@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000C409:EE_|BL0PR12MB4945:EE_ X-MS-Office365-Filtering-Correlation-Id: e64f3747-8d9e-4b0d-66c4-08dab8a2a424 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 05:09:50.3314 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e64f3747-8d9e-4b0d-66c4-08dab8a2a424 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C409.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4945 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Radhey Shyam Pandey Add an optional DMA property 'xlnx,axistream-connected'. This can be specified to indicate that DMA is connected to a streaming IP in the hardware design and dma driver needs to do some additional handling i.e pass metadata and perform streaming IP specific configuration. Signed-off-by: Radhey Shyam Pandey Acked-by: Rob Herring Signed-off-by: Sarath Babu Naidu Gaddam --- Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/= Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index d1700a5c36bf..18445aa092ab 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -49,6 +49,8 @@ Optional properties for AXI DMA and MCDMA: register as configured in h/w. Takes values {8...26}. If the property is missing or invalid then the default value 23 is used. This is the maximum value that is supported by all IP versions. +- xlnx,axistream-connected: Tells whether DMA is connected to AXI stream I= P. + Optional properties for VDMA: - xlnx,flush-fsync: Tells which channel to Flush on Frame sync. It takes following values: --=20 2.25.1 From nobody Wed Apr 8 17:30:14 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43616ECAAA1 for ; Fri, 28 Oct 2022 05:10:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229849AbiJ1FKT (ORCPT ); Fri, 28 Oct 2022 01:10:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229798AbiJ1FKG (ORCPT ); Fri, 28 Oct 2022 01:10:06 -0400 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2057.outbound.protection.outlook.com [40.107.92.57]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8ABEB209A7; Thu, 27 Oct 2022 22:10:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; 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Fri, 28 Oct 2022 00:09:49 -0500 From: Sarath Babu Naidu Gaddam To: , , , , CC: , , , , , , , , , Subject: [PATCH 2/5] dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property Date: Thu, 27 Oct 2022 23:09:37 -0600 Message-ID: <20221028050940.27888-3-sarath.babu.naidu.gaddam@amd.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221028050940.27888-1-sarath.babu.naidu.gaddam@amd.com> References: <20221028050940.27888-1-sarath.babu.naidu.gaddam@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000C409:EE_|BL1PR12MB5141:EE_ X-MS-Office365-Filtering-Correlation-Id: 8b44f080-d1dd-4d92-a66c-08dab8a2a74c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JgKc2S/gzyVVBSp6P0ryPxWJv6ZTo4BCvR86tjnU91iiNJYtrpYLWS7erbSNqzslm5m6Ckkg8SCT6QVodZ8l2CpC0YqUVOIcP513Rn7WThFXc2JmUQUcyWQGQOlIPUSVvwGJ7IR3YVSyis1xNBnRqavyLToc5bxvyYuaZ5d2s5/fmu99V4BBUPgpTSPfd71eAoU1HB/aqlvpiCWuLdHy58Y+aC4GNBx+zX1kzWrvESRt6++/L6ZjpJE4P4WMdVLiBP79p1Fk0qM42V5sMIQJeDxeyjsTludenrRtH9jC8LqBjGtBkwW9F6eo9hVGuRjvGpyudbtwDJvXTUwmHU9jw0Os3FvaveHoMPRFCyTPpyfW3LJxa1k6PLqxzR1M/56jBI860FdKpWgUrtL2TzccYdfY+kGp4wBdKcv3ZekIca8JqlueQHo04VU0+nqqGwV7bClVoXUBGjYzzAK9BeFhh2IJeZtmD17MWk+sApSN4HJNZ/b1wYjDZ1tmDxLhAC0fxIw1YeMhF2/pnnjWnU9vD6jU9AC6stmRE+yTgUyADq8E8YSTBduoE4UFOpacVJXEj/P5ucpJNFrjKt7CUXqlfRcaVjRJpyYcMlMTro9PWZZYnnFE2GdApgaDo8SAlXYaCbgQ3pLlYRoDblxKJ42i790825UZ73jAse43A3SRPYIyEH/dA9AHxD58NGhW1LGOxemaW/3qNGM1uugiwIQHqfNPQnzw6EUh5L3JpM7Cvu/MXwVutZd9Zv86p13IjyGawPqqjR/Ew+Hl9Lrbwd1hnA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(451199015)(36840700001)(40470700004)(46966006)(5660300002)(47076005)(36860700001)(8676002)(54906003)(40460700003)(6666004)(36756003)(1076003)(336012)(8936002)(4326008)(82310400005)(316002)(103116003)(70206006)(70586007)(2616005)(26005)(2906002)(508600001)(110136005)(426003)(186003)(86362001)(83380400001)(81166007)(356005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 05:09:55.6752 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8b44f080-d1dd-4d92-a66c-08dab8a2a74c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C409.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5141 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Radhey Shyam Pandey Add an optional AXI DMA property 'xlnx,irq-delay'. It specifies interrupt timeout value and causes the DMA engine to generate an interrupt after the delay time period has expired. Timer begins counting at the end of a packet and resets with receipt of a new packet or a timeout event occurs. This property is useful when AXI DMA is connected to the streaming IP i.e axiethernet where inter packet latency is critical while still taking the benefit of interrupt coalescing. Signed-off-by: Radhey Shyam Pandey Acked-by: Rob Herring Signed-off-by: Sarath Babu Naidu Gaddam --- Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/= Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index 18445aa092ab..9793523633a4 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -50,7 +50,9 @@ Optional properties for AXI DMA and MCDMA: is missing or invalid then the default value 23 is used. This is the maximum value that is supported by all IP versions. - xlnx,axistream-connected: Tells whether DMA is connected to AXI stream I= P. - +- xlnx,irq-delay: Tells the interrupt delay timeout value. Valid range is = from + 0-255. Setting this value to zero disables the delay timer interrupt. + 1 timeout interval =3D 125 * clock period of SG clock. Optional properties for VDMA: - xlnx,flush-fsync: Tells which channel to Flush on Frame sync. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 05:09:58.8159 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5336b17-6f8c-470f-7c8a-08dab8a2a929 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C403.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5268 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Radhey Shyam Pandey Read DT property to check if AXI DMA is connected to streaming IP i.e axiethernet. If connected pass AXI4-Stream control words to dma client using metadata_ops dmaengine API. Signed-off-by: Radhey Shyam Pandey Signed-off-by: Sarath Babu Naidu Gaddam --- drivers/dma/xilinx/xilinx_dma.c | 37 +++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dm= a.c index 8cd4e69dc7b4..b69e0482a50f 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -493,6 +493,7 @@ struct xilinx_dma_config { * @s2mm_chan_id: DMA s2mm channel identifier * @mm2s_chan_id: DMA mm2s channel identifier * @max_buffer_len: Max buffer length + * @has_axistream_connected: AXI DMA connected to AXI Stream IP */ struct xilinx_dma_device { void __iomem *regs; @@ -511,6 +512,7 @@ struct xilinx_dma_device { u32 s2mm_chan_id; u32 mm2s_chan_id; u32 max_buffer_len; + bool has_axistream_connected; }; =20 /* Macros */ @@ -623,6 +625,29 @@ static inline void xilinx_aximcdma_buf(struct xilinx_d= ma_chan *chan, } } =20 +/** + * xilinx_dma_get_metadata_ptr- Populate metadata pointer and payload leng= th + * @tx: async transaction descriptor + * @payload_len: metadata payload length + * @max_len: metadata max length + * Return: The app field pointer. + */ +static void *xilinx_dma_get_metadata_ptr(struct dma_async_tx_descriptor *t= x, + size_t *payload_len, size_t *max_len) +{ + struct xilinx_dma_tx_descriptor *desc =3D to_dma_tx_descriptor(tx); + struct xilinx_axidma_tx_segment *seg; + + *max_len =3D *payload_len =3D sizeof(u32) * XILINX_DMA_NUM_APP_WORDS; + seg =3D list_first_entry(&desc->segments, + struct xilinx_axidma_tx_segment, node); + return seg->hw.app; +} + +static struct dma_descriptor_metadata_ops xilinx_dma_metadata_ops =3D { + .get_ptr =3D xilinx_dma_get_metadata_ptr, +}; + /* -----------------------------------------------------------------------= ------ * Descriptors and segments alloc and free */ @@ -2326,6 +2351,9 @@ static struct dma_async_tx_descriptor *xilinx_dma_pre= p_dma_cyclic( segment->hw.control |=3D XILINX_DMA_BD_EOP; } =20 + if (chan->xdev->has_axistream_connected) + desc->async_tx.metadata_ops =3D &xilinx_dma_metadata_ops; + return &desc->async_tx; =20 error: @@ -3065,6 +3093,11 @@ static int xilinx_dma_probe(struct platform_device *= pdev) } } =20 + if (xdev->dma_config->dmatype =3D=3D XDMA_TYPE_AXIDMA) { + xdev->has_axistream_connected =3D + of_property_read_bool(node, "xlnx,axistream-connected"); + } + if (xdev->dma_config->dmatype =3D=3D XDMA_TYPE_VDMA) { err =3D of_property_read_u32(node, "xlnx,num-fstores", &num_frames); @@ -3090,6 +3123,10 @@ static int xilinx_dma_probe(struct platform_device *= pdev) else xdev->ext_addr =3D false; =20 + /* Set metadata mode */ + if (xdev->has_axistream_connected) + xdev->common.desc_metadata_modes =3D DESC_METADATA_ENGINE; + /* Set the dma mask bits */ err =3D dma_set_mask_and_coherent(xdev->dev, DMA_BIT_MASK(addr_width)); if (err < 0) { --=20 2.25.1 From nobody Wed Apr 8 17:30:14 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 325CFC38A02 for ; Fri, 28 Oct 2022 05:11:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229692AbiJ1FLE (ORCPT ); Fri, 28 Oct 2022 01:11:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229535AbiJ1FKi (ORCPT ); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 05:10:28.4318 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da6407fb-9562-42a5-e7ae-08dab8a2bad2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C407.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6022 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Radhey Shyam Pandey Increase AXI DMA transaction segments count to ensure that even in high load we always get a free segment in prepare descriptor for a DMA_SLAVE transaction. Signed-off-by: Radhey Shyam Pandey Signed-off-by: Sarath Babu Naidu Gaddam --- drivers/dma/xilinx/xilinx_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dm= a.c index b69e0482a50f..43737e0f3625 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -178,7 +178,7 @@ #define XILINX_DMA_BD_SOP BIT(27) #define XILINX_DMA_BD_EOP BIT(26) #define XILINX_DMA_COALESCE_MAX 255 -#define XILINX_DMA_NUM_DESCS 255 +#define XILINX_DMA_NUM_DESCS 512 #define XILINX_DMA_NUM_APP_WORDS 5 =20 /* AXI CDMA Specific Registers/Offsets */ --=20 2.25.1 From nobody Wed Apr 8 17:30:14 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DE92C38A02 for ; Fri, 28 Oct 2022 05:11:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229866AbiJ1FLV (ORCPT ); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 05:10:55.3925 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1ed7878-fb25-4e90-6608-08dab8a2cae2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT070.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7566 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Radhey Shyam Pandey Schedule tasklet with high priority to ensure that callback processing is prioritized. It improves throughput for netdev dma clients. Signed-off-by: Radhey Shyam Pandey Signed-off-by: Sarath Babu Naidu Gaddam --- drivers/dma/xilinx/xilinx_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dm= a.c index 43737e0f3625..bee21e4f1e59 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -1839,7 +1839,7 @@ static irqreturn_t xilinx_mcdma_irq_handler(int irq, = void *data) spin_unlock(&chan->lock); } =20 - tasklet_schedule(&chan->tasklet); + tasklet_hi_schedule(&chan->tasklet); return IRQ_HANDLED; } =20 --=20 2.25.1