From nobody Sat Sep 21 11:55:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4A74C38A2D for ; Thu, 27 Oct 2022 09:55:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235017AbiJ0JzZ (ORCPT ); Thu, 27 Oct 2022 05:55:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234870AbiJ0JzR (ORCPT ); Thu, 27 Oct 2022 05:55:17 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 616F54DF2C; Thu, 27 Oct 2022 02:55:16 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id EBC0566028C7; Thu, 27 Oct 2022 10:55:13 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666864514; bh=zdy18YQDKtXStsbVbpC3wzp0voDORe/EGo/4QyaE8oo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Zodexra/+zqui8rth+sqsOGV/oCKAO7Uvp0AD71PrnLDBMw21gPfIlEL9wrUYxmIk wiKn+mf/uVPieCFdSjHgqt0I8JBD4WIBCGqkZEainaE0DmSO2oT1l5QBSidSgbcb99 ubsN/CP5BLera7OClMgjfO1iXictsQAe0kLsTTv1Yu6NeBkrlAYD92g9lm212+z1RD o0HxA8yxVCUYBTG7DK4cMsGA6vleiA16+FUkKyA4QxFkAlCDAPx4dlaagst03h2qmS 1vIvrsR+u6wru49AomGYvEsj5DsRNHLXAMIGX4YEu3CIEy6j7qFp+3AN35ubnSEpJ2 HCUiGBw11zMCg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, sam.shih@mediatek.com, andrew@lunn.ch, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/6] arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets Date: Thu, 27 Oct 2022 11:54:59 +0200 Message-Id: <20221027095504.37432-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> References: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add nodes for topckgen, infracfg and pericfg, providing various clocks and resets and needed to support basic IPs of this SoC. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 46f0e54be766..1801cafd9c13 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -6,7 +6,9 @@ =20 #include #include +#include #include +#include =20 / { compatible =3D "mediatek,mt6795"; @@ -192,6 +194,26 @@ soc { compatible =3D "simple-bus"; ranges; =20 + topckgen: syscon@10000000 { + compatible =3D "mediatek,mt6795-topckgen", "syscon"; + reg =3D <0 0x10000000 0 0x1000>; + #clock-cells =3D <1>; + }; + + infracfg: syscon@10001000 { + compatible =3D "mediatek,mt6795-infracfg", "syscon"; + reg =3D <0 0x10001000 0 0x1000>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + }; + + pericfg: syscon@10003000 { + compatible =3D "mediatek,mt6795-pericfg", "syscon"; + reg =3D <0 0x10003000 0 0x1000>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + }; + pio: pinctrl@10005000 { compatible =3D "mediatek,mt6795-pinctrl"; reg =3D <0 0x10005000 0 0x1000>, <0 0x1000b000 0 0x1000>; --=20 2.37.2 From nobody Sat Sep 21 11:55:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12787FA373D for ; Thu, 27 Oct 2022 09:55:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235033AbiJ0JzX (ORCPT ); Thu, 27 Oct 2022 05:55:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234886AbiJ0JzR (ORCPT ); Thu, 27 Oct 2022 05:55:17 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB3D34E877; Thu, 27 Oct 2022 02:55:16 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C776166028CF; Thu, 27 Oct 2022 10:55:14 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666864515; bh=XOuhqy5hOPdqpQ8sIzWrIZYqHoZW6wPK8VwlJ/w9e6I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UnwvIyUa4IWPVyjXR2fNMiz5qjQnnEkogRbBxsht2kmsemjK7xKOR5FEVXYwQhd1m q3i0iQb7IdfQ7FG4cCSv4IVm8mkyKZPzyyX+g5zxMXa9nOcge6UGnm+f6IVeMCDQoQ 8UTG+p4fGQhBkH6DJpnG54buzqNtEbS3xJRULPDF5eJvP9ZBJW39DkbCMtypU8+Pok 1LcyLAY4DzjxiEWKF2leT5/LsJgtZhBEShdLwPHnYcPSrayWGcaL32xyd0jmSOFWg4 4c5GCCPSTd1tR0FAOBuEpQ1zoqdO1BJJyIpLBKGVnrYyWZmetKCDZIAtkRiQFLH7EX 15LqX6tlkEWsQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, sam.shih@mediatek.com, andrew@lunn.ch, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/6] arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg Date: Thu, 27 Oct 2022 11:55:00 +0200 Message-Id: <20221027095504.37432-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> References: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The UART nodes had a dummy clock for early bringup, as it is expected that these are left on by the bootloader: now that the pericfg clock controller is supported, we can replace them with the real clocks. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 1801cafd9c13..60a07410ff63 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -314,7 +314,8 @@ uart0: serial@11002000 { "mediatek,mt6577-uart"; reg =3D <0 0x11002000 0 0x400>; interrupts =3D ; - clocks =3D <&clk26m>; + clocks =3D <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>; + clock-names =3D "baud", "bus"; status =3D "disabled"; }; =20 @@ -323,7 +324,8 @@ uart1: serial@11003000 { "mediatek,mt6577-uart"; reg =3D <0 0x11003000 0 0x400>; interrupts =3D ; - clocks =3D <&clk26m>; + clocks =3D <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>; + clock-names =3D "baud", "bus"; status =3D "disabled"; }; =20 @@ -332,7 +334,8 @@ uart2: serial@11004000 { "mediatek,mt6577-uart"; reg =3D <0 0x11004000 0 0x400>; interrupts =3D ; - clocks =3D <&clk26m>; + clocks =3D <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>; + clock-names =3D "baud", "bus"; status =3D "disabled"; }; =20 @@ -341,7 +344,8 @@ uart3: serial@11005000 { "mediatek,mt6577-uart"; reg =3D <0 0x11005000 0 0x400>; interrupts =3D ; - clocks =3D <&clk26m>; + clocks =3D <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>; + clock-names =3D "baud", "bus"; status =3D "disabled"; }; }; --=20 2.37.2 From nobody Sat Sep 21 11:55:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B6D3C38A2D for ; Thu, 27 Oct 2022 09:55:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234995AbiJ0Jza (ORCPT ); Thu, 27 Oct 2022 05:55:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234975AbiJ0JzT (ORCPT ); Thu, 27 Oct 2022 05:55:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 861865052B; Thu, 27 Oct 2022 02:55:17 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A63F466028D0; Thu, 27 Oct 2022 10:55:15 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666864516; bh=fGsfOe2bAmOVkry45CNvtIEGojv6PfIqmE22PGHK688=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rc3JAj1zQyYp1VwfxOFOGFOZ+GDbLEUYNn4qeoyaqE/GMuExuAQmEQy2Q2nI2HLh+ SfE2HnuFP9P/ovZLCgIf4ZIATGyPoyN3CQi1kqt4R7TTFjhoUsIZM2R3ct+c4FQ+9j UQmhjB4KneDIQM2RTPNU1MIKkw1mixop8pW2PKjOONRM9e0B8gyW9dzSSoTilZuZp4 1Ln648Vvg1ztouXOEzbtwCaE9AP49XJv6lzIgpE7i5KNZukzVaG3UvMFlkXulK1xTn pxUyVnQLfl6s9rqPBI1sii3JWuHFIR3UaQPj8yJ7lZHps1ovuSWTxl8VZjRCJ2+7vx Ex1xdxu9hK3/A== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, sam.shih@mediatek.com, andrew@lunn.ch, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 3/6] arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAs Date: Thu, 27 Oct 2022 11:55:01 +0200 Message-Id: <20221027095504.37432-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> References: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This SoC has a DMA controller with tx/rx channels for all of the UART controller IPs: add the apdma node and wire up the DMAs on all controllers. When one of the UART controllers is used as a serial console, the DMA will be automatically ignored. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 34 ++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 60a07410ff63..39677eec388b 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -316,6 +316,8 @@ uart0: serial@11002000 { interrupts =3D ; clocks =3D <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>; clock-names =3D "baud", "bus"; + dmas =3D <&apdma 0>, <&apdma 1>; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -326,9 +328,37 @@ uart1: serial@11003000 { interrupts =3D ; clocks =3D <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>; clock-names =3D "baud", "bus"; + dmas =3D <&apdma 2>, <&apdma 3>; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 + apdma: dma-controller@11000380 { + compatible =3D "mediatek,mt6795-uart-dma", + "mediatek,mt6577-uart-dma"; + reg =3D <0 0x11000380 0 0x60>, + <0 0x11000400 0 0x60>, + <0 0x11000480 0 0x60>, + <0 0x11000500 0 0x60>, + <0 0x11000580 0 0x60>, + <0 0x11000600 0 0x60>, + <0 0x11000680 0 0x60>, + <0 0x11000700 0 0x60>; + interrupts =3D , + , + , + , + , + , + , + ; + dma-requests =3D <8>; + clocks =3D <&pericfg CLK_PERI_AP_DMA>; + clock-names =3D "apdma"; + mediatek,dma-33bits; + #dma-cells =3D <1>; + }; + uart2: serial@11004000 { compatible =3D "mediatek,mt6795-uart", "mediatek,mt6577-uart"; @@ -336,6 +366,8 @@ uart2: serial@11004000 { interrupts =3D ; clocks =3D <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>; clock-names =3D "baud", "bus"; + dmas =3D <&apdma 4>, <&apdma 5>; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -346,6 +378,8 @@ uart3: serial@11005000 { interrupts =3D ; clocks =3D <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>; clock-names =3D "baud", "bus"; + dmas =3D <&apdma 6>, <&apdma 7>; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; }; --=20 2.37.2 From nobody Sat Sep 21 11:55:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CE84C38A2D for ; Thu, 27 Oct 2022 09:55:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233283AbiJ0Jzd (ORCPT ); Thu, 27 Oct 2022 05:55:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234596AbiJ0JzT (ORCPT ); Thu, 27 Oct 2022 05:55:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67B7F5246F; Thu, 27 Oct 2022 02:55:18 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 817CD66028D1; Thu, 27 Oct 2022 10:55:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666864517; bh=WgoDvhQSuu9tCIfcj5g2O+S6s8LD3ydjrKtrkug1bN8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SnKNDqmZtNk88QMipJd9MBel8LetO0m14vAXi+1AN6ZMUBQcwyma2gpDrn4WqMyNP w7bIFB2zyhQ5HHAuyg+YVo+VezBU9CFCJ0jSxp4CRr91z4hTW+CpLNWVPMoBJSZBc1 lLH37j84X32yTegGV2SPVOZlM4f2I5tV0VC9yWynRspbJXgRg7NdRQJ+y1FH7MEAYa CEquSj+IFB8KgjiD7eFvVqzB8auWh4xsWthPf3lO7Je6aWS/W+ijqEL2HC2SgnAWIn t3a76O4ei/O8+helnxhfCZuZJcsOoWH84HKBdKYrDynXMWXgKoKULhkuvvS4V4i6k6 6x+SYGwIECTQQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, sam.shih@mediatek.com, andrew@lunn.ch, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 4/6] arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers Date: Thu, 27 Oct 2022 11:55:02 +0200 Message-Id: <20221027095504.37432-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> References: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the mmc nodes to support all of the four controllers, used for eMMC, SD/MicroSD and SDIO storage. All of these controller nodes are left disabled by default, as usage is board dependent. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 41 ++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 39677eec388b..1564f2c127c4 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -382,5 +382,46 @@ uart3: serial@11005000 { dma-names =3D "tx", "rx"; status =3D "disabled"; }; + + mmc0: mmc@11230000 { + compatible =3D "mediatek,mt6795-mmc"; + reg =3D <0 0x11230000 0 0x1000>; + interrupts =3D ; + clocks =3D <&pericfg CLK_PERI_MSDC30_0>, + <&topckgen CLK_TOP_MSDC50_0_H_SEL>, + <&topckgen CLK_TOP_MSDC50_0_SEL>; + clock-names =3D "source", "hclk", "source_cg"; + status =3D "disabled"; + }; + + mmc1: mmc@11240000 { + compatible =3D "mediatek,mt6795-mmc"; + reg =3D <0 0x11240000 0 0x1000>; + interrupts =3D ; + clocks =3D <&pericfg CLK_PERI_MSDC30_1>, + <&topckgen CLK_TOP_AXI_SEL>; + clock-names =3D "source", "hclk"; + status =3D "disabled"; + }; + + mmc2: mmc@11250000 { + compatible =3D "mediatek,mt6795-mmc"; + reg =3D <0 0x11250000 0 0x1000>; + interrupts =3D ; + clocks =3D <&pericfg CLK_PERI_MSDC30_2>, + <&topckgen CLK_TOP_AXI_SEL>; + clock-names =3D "source", "hclk"; + status =3D "disabled"; + }; + + mmc3: mmc@11260000 { + compatible =3D "mediatek,mt6795-mmc"; + reg =3D <0 0x11260000 0 0x1000>; + interrupts =3D ; + clocks =3D <&pericfg CLK_PERI_MSDC30_3>, + <&topckgen CLK_TOP_AXI_SEL>; + clock-names =3D "source", "hclk"; + status =3D "disabled"; + }; }; }; --=20 2.37.2 From nobody Sat Sep 21 11:55:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0A09C67871 for ; Thu, 27 Oct 2022 09:55:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235287AbiJ0Jzg (ORCPT ); Thu, 27 Oct 2022 05:55:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234997AbiJ0JzU (ORCPT ); Thu, 27 Oct 2022 05:55:20 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42C8B52FD6; Thu, 27 Oct 2022 02:55:19 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5CBD766028D2; Thu, 27 Oct 2022 10:55:17 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666864518; bh=W8SEx0xapJJdUfHfS4BFtY3HtU4jbX1ZpxNLzv2olK8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SbL5im1DrRuFVThK8Et1NFIXOa0kw9VUBh3iZ6XNTqtB6k7yRU0CGbhg1p81W9vet URFH82qFjD1EpvYPczHsA+I7xoviwfe30+z9hnqGWZtGA4biNsdwpcf0RfhCWHAWex 1nkr7qGnByNOL5d/0//IOs7NqPLPiXRQO8meoOrE4kAtU2olEOBpbtT49qHQvzDjDv qohCakq6tZE3Fk9ki9m7lcOgIb1nc3Ul++IqZYO1G8OgCIarMdLiG3MCWP1vRdOoqU +Y/176vWxVIqcsw+JrGCprCTvASnpvv8sgn+XiMBSon/bfV4xRgo2gBbNIjpnNTULx RN/9oVZZhSpHw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, sam.shih@mediatek.com, andrew@lunn.ch, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 5/6] dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5 Date: Thu, 27 Oct 2022 11:55:03 +0200 Message-Id: <20221027095504.37432-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> References: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a compatible for the Sony Xperia M5 smartphone. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/mediatek.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index d76ce4c3819d..49153d66796a 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -58,6 +58,7 @@ properties: - items: - enum: - mediatek,mt6795-evb + - sony,xperia-m5 - const: mediatek,mt6795 - items: - enum: --=20 2.37.2 From nobody Sat Sep 21 11:55:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAA01C38A2D for ; Thu, 27 Oct 2022 09:55:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234235AbiJ0Jzl (ORCPT ); Thu, 27 Oct 2022 05:55:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234962AbiJ0JzV (ORCPT ); Thu, 27 Oct 2022 05:55:21 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4274557247; Thu, 27 Oct 2022 02:55:20 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 41C2066028D3; Thu, 27 Oct 2022 10:55:18 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666864518; bh=xcx9U/aROaZZ49l0z81maIZawW15cVft/U5u/XSuPjY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kRI1BCTmmBayY8GX84Fj90iefNeS98hIY11MZn66mHWuztY07oE+LM46VcMnuO0tD wGht6GYbb/gzDUEUqaRBZM5vYhcRjrQPFX3+7NQVExsfc7fBV0PojqR7oNCDmjyVfn zkrGtWC4Q1IpS+VA4Ie3RVriVA6Gt8/8DbPDG8gLb6iGZPfOd8YSIXUZg2PC7iS5op xg2TgEi3iEdNNRRARi0RV3jYVQBY66QT2EOoqamWZFggdVIWh8jPQOAuK6LGGtaHMn FpMDX5yZXEbA7oPEXV4Kci6lDhjLYKQTfCAQ8piOHILL2+zW5cOdTFIke/VQPU2nYw JXpziFrc5PG3g== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, sam.shih@mediatek.com, andrew@lunn.ch, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 6/6] arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone Date: Thu, 27 Oct 2022 11:55:04 +0200 Message-Id: <20221027095504.37432-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> References: <20221027095504.37432-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a basic support for the Sony Xperia M5 (codename "Holly") smartphone, powered by a MediaTek Helio X10 SoC. This achieves a console boot. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/Makefile | 1 + .../dts/mediatek/mt6795-sony-xperia-m5.dts | 88 +++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index 04597ffc4286..179661c9cc1c 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt2712-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6755-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6779-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6795-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6795-sony-xperia-m5.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6797-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6797-x20-dev.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7622-rfb1.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/= arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts new file mode 100644 index 000000000000..d3415527d389 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022, Collabora Ltd + * Author: AngeloGioacchino Del Regno + */ + +/dts-v1/; +#include "mt6795.dtsi" + +/ { + model =3D "Sony Xperia M5"; + compatible =3D "sony,xperia-m5", "mediatek,mt6795"; + chassis-type =3D "handset"; + + aliases { + mmc0 =3D &mmc0; + mmc1 =3D &mmc1; + serial0 =3D &uart0; + serial1 =3D &uart1; + }; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0 0x40000000 0 0x1e800000>; + }; + + reserved_memory: reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: secmon@43000000 { + reg =3D <0 0x43000000 0 0x30000>; + no-map; + }; + + /* preloader and bootloader regions cannot be touched */ + preloader-region@44800000 { + reg =3D <0 0x44800000 0 0x100000>; + no-map; + }; + + bootloader-region@46000000 { + reg =3D <0 0x46000000 0 0x400000>; + no-map; + }; + }; +}; + +&pio { + uart0_pins: uart0-pins { + pins-rx { + pinmux =3D ; + bias-pull-up; + input-enable; + }; + pins-tx { + pinmux =3D ; + output-high; + }; + }; + + uart2_pins: uart2-pins { + pins-rx { + pinmux =3D ; + bias-pull-up; + input-enable; + }; + pins-tx { + pinmux =3D ; + }; + }; +}; + +&uart0 { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; +}; + +&uart2 { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart2_pins>; +}; --=20 2.37.2