From nobody Wed Apr 8 11:44:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD5F4FA3740 for ; Tue, 25 Oct 2022 11:33:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231720AbiJYLd1 (ORCPT ); Tue, 25 Oct 2022 07:33:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231921AbiJYLdV (ORCPT ); Tue, 25 Oct 2022 07:33:21 -0400 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD3A6123454; Tue, 25 Oct 2022 04:33:20 -0700 (PDT) Received: from canpemm500009.china.huawei.com (unknown [172.30.72.57]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4MxV7H1q3QzmVJ8; Tue, 25 Oct 2022 19:28:27 +0800 (CST) Received: from localhost.localdomain (10.67.164.66) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Tue, 25 Oct 2022 19:33:19 +0800 From: Yicong Yang To: Shaokun Zhang , , Jonathan Corbet , Will Deacon , Mark Rutland , John Garry , CC: , , , , , Subject: [PATCH 2/3] docs: perf: Fix PMU instance name of hisi-pcie-pmu Date: Tue, 25 Oct 2022 19:32:41 +0800 Message-ID: <20221025113242.58271-3-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20221025113242.58271-1-yangyicong@huawei.com> References: <20221025113242.58271-1-yangyicong@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.67.164.66] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Yicong Yang The PMU instance will be called hisi_pcie_core rather than hisi_pcie_. Fix this in the documentation. Fixes: c8602008e247 ("docs: perf: Add description for HiSilicon PCIe PMU dr= iver") Signed-off-by: Yicong Yang Reviewed-by: Jonathan Cameron --- .../admin-guide/perf/hisi-pcie-pmu.rst | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst b/Documentati= on/admin-guide/perf/hisi-pcie-pmu.rst index 294ebbdb22af..bbe66480ff85 100644 --- a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pcie-pmu.rst @@ -15,10 +15,10 @@ HiSilicon PCIe PMU driver The PCIe PMU driver registers a perf PMU with the name of its sicl-id and = PCIe Core id.:: =20 - /sys/bus/event_source/hisi_pcie_ + /sys/bus/event_source/hisi_pcie_core =20 PMU driver provides description of available events and filter options in = sysfs, -see /sys/bus/event_source/devices/hisi_pcie_. +see /sys/bus/event_source/devices/hisi_pcie_core. =20 The "format" directory describes all formats of the config (events) and co= nfig1 (filter options) fields of the perf_event_attr structure. The "events" dir= ectory @@ -33,13 +33,13 @@ monitored by PMU. Example usage of perf:: =20 $# perf list - hisi_pcie0_0/rx_mwr_latency/ [kernel PMU event] - hisi_pcie0_0/rx_mwr_cnt/ [kernel PMU event] + hisi_pcie0_core0/rx_mwr_latency/ [kernel PMU event] + hisi_pcie0_core0/rx_mwr_cnt/ [kernel PMU event] ------------------------------------------ =20 - $# perf stat -e hisi_pcie0_0/rx_mwr_latency/ - $# perf stat -e hisi_pcie0_0/rx_mwr_cnt/ - $# perf stat -g -e hisi_pcie0_0/rx_mwr_latency/ -e hisi_pcie0_0/rx_mwr_c= nt/ + $# perf stat -e hisi_pcie0_core0/rx_mwr_latency/ + $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt/ + $# perf stat -g -e hisi_pcie0_core0/rx_mwr_latency/ -e hisi_pcie0_core0/= rx_mwr_cnt/ =20 The current driver does not support sampling. So "perf record" is unsuppor= ted. Also attach to a task is unsupported for PCIe PMU. @@ -64,7 +64,7 @@ bit8 is set, port=3D0x100; if these two Root Ports are bo= th monitored, port=3D0x101. =20 Example usage of perf:: =20 - $# perf stat -e hisi_pcie0_0/rx_mwr_latency,port=3D0x1/ sleep 5 + $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=3D0x1/ sleep 5 =20 -bdf =20 @@ -76,7 +76,7 @@ For example, "bdf=3D0x3900" means BDF of target Endpoint = is 0000:39:00.0. =20 Example usage of perf:: =20 - $# perf stat -e hisi_pcie0_0/rx_mrd_flux,bdf=3D0x3900/ sleep 5 + $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,bdf=3D0x3900/ sleep 5 =20 2. Trigger filter Event statistics start when the first time TLP length is greater/smaller @@ -90,7 +90,7 @@ means start when TLP length < condition. =20 Example usage of perf:: =20 - $# perf stat -e hisi_pcie0_0/rx_mrd_flux,trig_len=3D0x4,trig_mode=3D1/ s= leep 5 + $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,trig_len=3D0x4,trig_mode=3D= 1/ sleep 5 =20 3. Threshold filter Counter counts when TLP length within the specified range. You can set the @@ -103,4 +103,4 @@ when TLP length < threshold. =20 Example usage of perf:: =20 - $# perf stat -e hisi_pcie0_0/rx_mrd_flux,thr_len=3D0x4,thr_mode=3D1/ sle= ep 5 + $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,thr_len=3D0x4,thr_mode=3D1/= sleep 5 --=20 2.24.0