From nobody Sat Feb 7 23:24:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4671EC04A95 for ; Sat, 22 Oct 2022 08:42:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234655AbiJVImB (ORCPT ); Sat, 22 Oct 2022 04:42:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234371AbiJVIhh (ORCPT ); Sat, 22 Oct 2022 04:37:37 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDE4315A8DC; Sat, 22 Oct 2022 01:05:17 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D538560B40; Sat, 22 Oct 2022 08:05:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E99B0C433D7; Sat, 22 Oct 2022 08:05:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1666425913; bh=KHeH/veQXK9e9vaTszK2hpVy92B/G+tiu9lNn5UDWDA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=1x2YLjiaDaQcR4jRS5zOmmSktwE8XpRe1VjTKqiobw6r6ITTImuvwzi7A8Tky3X6E AmCHL01KKLROP2q+ZxaPwttijWrjDUDJY9fPJq8zNnl7/1je8ZQW6RHcUYhPH8M323 ou+aJuNu7IP4ZSqgNR7ofjqPknmtVb0HlEraWsE8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jaehyun Chung , Jasdeep Dhillon , Aric Cyr , Daniel Wheeler , Alex Deucher , Sasha Levin Subject: [PATCH 5.19 626/717] drm/amd/display: Remove interface for periodic interrupt 1 Date: Sat, 22 Oct 2022 09:28:25 +0200 Message-Id: <20221022072526.146536060@linuxfoundation.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221022072415.034382448@linuxfoundation.org> References: <20221022072415.034382448@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Aric Cyr [ Upstream commit 97d8d6f075bd8f988589be02b91f6fa644d0b0b8 ] [why] Only a single VLINE interrupt is available so interface should not expose the second one which is used by DMU firmware. [how] Remove references to periodic_interrupt1 and VLINE1 from DC interfaces. Reviewed-by: Jaehyun Chung Acked-by: Jasdeep Dhillon Signed-off-by: Aric Cyr Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/core/dc.c | 16 +++------ drivers/gpu/drm/amd/display/dc/dc_stream.h | 6 ++-- .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 35 ++++++------------- .../amd/display/dc/dcn10/dcn10_hw_sequencer.h | 3 +- .../gpu/drm/amd/display/dc/inc/hw_sequencer.h | 8 +---- 5 files changed, 18 insertions(+), 50 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd= /display/dc/core/dc.c index 9dbd965d8afb..6ca29b887fce 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2632,11 +2632,8 @@ static void copy_stream_update_to_stream(struct dc *= dc, if (update->abm_level) stream->abm_level =3D *update->abm_level; =20 - if (update->periodic_interrupt0) - stream->periodic_interrupt0 =3D *update->periodic_interrupt0; - - if (update->periodic_interrupt1) - stream->periodic_interrupt1 =3D *update->periodic_interrupt1; + if (update->periodic_interrupt) + stream->periodic_interrupt =3D *update->periodic_interrupt; =20 if (update->gamut_remap) stream->gamut_remap_matrix =3D *update->gamut_remap; @@ -2723,13 +2720,8 @@ static void commit_planes_do_stream_update(struct dc= *dc, =20 if (!pipe_ctx->top_pipe && !pipe_ctx->prev_odm_pipe && pipe_ctx->stream= =3D=3D stream) { =20 - if (stream_update->periodic_interrupt0 && - dc->hwss.setup_periodic_interrupt) - dc->hwss.setup_periodic_interrupt(dc, pipe_ctx, VLINE0); - - if (stream_update->periodic_interrupt1 && - dc->hwss.setup_periodic_interrupt) - dc->hwss.setup_periodic_interrupt(dc, pipe_ctx, VLINE1); + if (stream_update->periodic_interrupt && dc->hwss.setup_periodic_interr= upt) + dc->hwss.setup_periodic_interrupt(dc, pipe_ctx); =20 if ((stream_update->hdr_static_metadata && !stream->use_dynamic_meta) || stream_update->vrr_infopacket || diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/a= md/display/dc/dc_stream.h index 58941f4defb3..a7f319d404a1 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_stream.h +++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h @@ -200,8 +200,7 @@ struct dc_stream_state { /* DMCU info */ unsigned int abm_level; =20 - struct periodic_interrupt_config periodic_interrupt0; - struct periodic_interrupt_config periodic_interrupt1; + struct periodic_interrupt_config periodic_interrupt; =20 /* from core_stream struct */ struct dc_context *ctx; @@ -268,8 +267,7 @@ struct dc_stream_update { struct dc_info_packet *hdr_static_metadata; unsigned int *abm_level; =20 - struct periodic_interrupt_config *periodic_interrupt0; - struct periodic_interrupt_config *periodic_interrupt1; + struct periodic_interrupt_config *periodic_interrupt; =20 struct dc_info_packet *vrr_infopacket; struct dc_info_packet *vsc_infopacket; diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/dr= ivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index d9ab27991535..33c87e53b6a3 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -3623,7 +3623,7 @@ void dcn10_calc_vupdate_position( { const struct dc_crtc_timing *dc_crtc_timing =3D &pipe_ctx->stream->timing; int vline_int_offset_from_vupdate =3D - pipe_ctx->stream->periodic_interrupt0.lines_offset; + pipe_ctx->stream->periodic_interrupt.lines_offset; int vupdate_offset_from_vsync =3D dc->hwss.get_vupdate_offset_from_vsync(= pipe_ctx); int start_position; =20 @@ -3648,18 +3648,10 @@ void dcn10_calc_vupdate_position( static void dcn10_cal_vline_position( struct dc *dc, struct pipe_ctx *pipe_ctx, - enum vline_select vline, uint32_t *start_line, uint32_t *end_line) { - enum vertical_interrupt_ref_point ref_point =3D INVALID_POINT; - - if (vline =3D=3D VLINE0) - ref_point =3D pipe_ctx->stream->periodic_interrupt0.ref_point; - else if (vline =3D=3D VLINE1) - ref_point =3D pipe_ctx->stream->periodic_interrupt1.ref_point; - - switch (ref_point) { + switch (pipe_ctx->stream->periodic_interrupt.ref_point) { case START_V_UPDATE: dcn10_calc_vupdate_position( dc, @@ -3668,7 +3660,9 @@ static void dcn10_cal_vline_position( end_line); break; case START_V_SYNC: - // Suppose to do nothing because vsync is 0; + // vsync is line 0 so start_line is just the requested line offset + *start_line =3D pipe_ctx->stream->periodic_interrupt.lines_offset; + *end_line =3D *start_line + 2; break; default: ASSERT(0); @@ -3678,24 +3672,15 @@ static void dcn10_cal_vline_position( =20 void dcn10_setup_periodic_interrupt( struct dc *dc, - struct pipe_ctx *pipe_ctx, - enum vline_select vline) + struct pipe_ctx *pipe_ctx) { struct timing_generator *tg =3D pipe_ctx->stream_res.tg; + uint32_t start_line =3D 0; + uint32_t end_line =3D 0; =20 - if (vline =3D=3D VLINE0) { - uint32_t start_line =3D 0; - uint32_t end_line =3D 0; + dcn10_cal_vline_position(dc, pipe_ctx, &start_line, &end_line); =20 - dcn10_cal_vline_position(dc, pipe_ctx, vline, &start_line, &end_line); - - tg->funcs->setup_vertical_interrupt0(tg, start_line, end_line); - - } else if (vline =3D=3D VLINE1) { - pipe_ctx->stream_res.tg->funcs->setup_vertical_interrupt1( - tg, - pipe_ctx->stream->periodic_interrupt1.lines_offset); - } + tg->funcs->setup_vertical_interrupt0(tg, start_line, end_line); } =20 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ct= x) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/dr= ivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h index 9ae07c77fdc0..0ef7bf7ddb75 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h @@ -175,8 +175,7 @@ void dcn10_set_cursor_attribute(struct pipe_ctx *pipe_c= tx); void dcn10_set_cursor_sdr_white_level(struct pipe_ctx *pipe_ctx); void dcn10_setup_periodic_interrupt( struct dc *dc, - struct pipe_ctx *pipe_ctx, - enum vline_select vline); + struct pipe_ctx *pipe_ctx); enum dc_status dcn10_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gp= u/drm/amd/display/dc/inc/hw_sequencer.h index 05053f3b4ab7..21a9eedec092 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h @@ -32,11 +32,6 @@ #include "inc/hw/link_encoder.h" #include "core_status.h" =20 -enum vline_select { - VLINE0, - VLINE1 -}; - struct pipe_ctx; struct dc_state; struct dc_stream_status; @@ -116,8 +111,7 @@ struct hw_sequencer_funcs { int group_index, int group_size, struct pipe_ctx *grouped_pipes[]); void (*setup_periodic_interrupt)(struct dc *dc, - struct pipe_ctx *pipe_ctx, - enum vline_select vline); + struct pipe_ctx *pipe_ctx); void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, struct dc_crtc_timing_adjust adjust); void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, --=20 2.35.1