From nobody Fri Dec 19 20:12:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A6F0C433FE for ; Sat, 22 Oct 2022 07:47:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231560AbiJVHr0 (ORCPT ); Sat, 22 Oct 2022 03:47:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230245AbiJVHpz (ORCPT ); Sat, 22 Oct 2022 03:45:55 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80387CABC2; Sat, 22 Oct 2022 00:43:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C1760B82E1B; Sat, 22 Oct 2022 07:42:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1D78DC433C1; Sat, 22 Oct 2022 07:42:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1666424576; bh=Z5u/4kskGVbcyMVpAm9IC/je4fIBuE6fauWq6ihOXDY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KY69y8oqXuGaJ4uVoqc4M9FABU+NR5hqu9+Dp2Pt7XBtSQ4DqAHwx6JbB7mtdxaf/ ulxde7aXOVHFQZsVDuxvL9DTnvVcl2/rlFsHZ7fQ8h6XhCu03HIFdqmDWGrPBXG50E f2j25VITooTxGi7Z59feMlXHgVYinukRX43qybv4= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Chris Wilson , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Matthew Auld , Tvrtko Ursulin Subject: [PATCH 5.19 167/717] drm/i915/gt: Use i915_vm_put on ppgtt_create error paths Date: Sat, 22 Oct 2022 09:20:46 +0200 Message-Id: <20221022072445.054445928@linuxfoundation.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221022072415.034382448@linuxfoundation.org> References: <20221022072415.034382448@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chris Wilson commit 20e377e7b2e7c327039f10db80ba5bcc1f6c882d upstream. Now that the scratch page and page directories have a reference back to the i915_address_space, we cannot do an immediate free of the ppgtt upon error as those buffer objects will perform a later i915_vm_put in their deferred frees. The downside is that by replacing the onion unwind along the error paths, the ppgtt cleanup must handle a partially constructed vm. This includes ensuring that the vm->cleanup is set prior to the error path. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6900 Signed-off-by: Chris Wilson Fixes: 4d8151ae5329 ("drm/i915: Don't free shared locks while shared") Cc: Thomas Hellstr=C3=B6m Cc: Matthew Auld Cc: # v5.14+ Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld Link: https://patchwork.freedesktop.org/patch/msgid/20220926153333.102195-1= -matthew.auld@intel.com (cherry picked from commit c286558f58535cf97b717b946d6c96d774a09d17) Signed-off-by: Tvrtko Ursulin Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 16 ++++----- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 58 ++++++++++++++++++------------= ----- drivers/gpu/drm/i915/gt/intel_gtt.c | 3 + 3 files changed, 41 insertions(+), 36 deletions(-) --- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c @@ -247,6 +247,7 @@ err_scratch1: i915_gem_object_put(vm->scratch[1]); err_scratch0: i915_gem_object_put(vm->scratch[0]); + vm->scratch[0] =3D NULL; return ret; } =20 @@ -268,9 +269,10 @@ static void gen6_ppgtt_cleanup(struct i9 gen6_ppgtt_free_pd(ppgtt); free_scratch(vm); =20 - mutex_destroy(&ppgtt->flush); + if (ppgtt->base.pd) + free_pd(&ppgtt->base.vm, ppgtt->base.pd); =20 - free_pd(&ppgtt->base.vm, ppgtt->base.pd); + mutex_destroy(&ppgtt->flush); } =20 static void pd_vma_bind(struct i915_address_space *vm, @@ -449,19 +451,17 @@ struct i915_ppgtt *gen6_ppgtt_create(str =20 err =3D gen6_ppgtt_init_scratch(ppgtt); if (err) - goto err_free; + goto err_put; =20 ppgtt->base.pd =3D gen6_alloc_top_pd(ppgtt); if (IS_ERR(ppgtt->base.pd)) { err =3D PTR_ERR(ppgtt->base.pd); - goto err_scratch; + goto err_put; } =20 return &ppgtt->base; =20 -err_scratch: - free_scratch(&ppgtt->base.vm); -err_free: - kfree(ppgtt); +err_put: + i915_vm_put(&ppgtt->base.vm); return ERR_PTR(err); } --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -196,7 +196,10 @@ static void gen8_ppgtt_cleanup(struct i9 if (intel_vgpu_active(vm->i915)) gen8_ppgtt_notify_vgt(ppgtt, false); =20 - __gen8_ppgtt_cleanup(vm, ppgtt->pd, gen8_pd_top_count(vm), vm->top); + if (ppgtt->pd) + __gen8_ppgtt_cleanup(vm, ppgtt->pd, + gen8_pd_top_count(vm), vm->top); + free_scratch(vm); } =20 @@ -803,8 +806,10 @@ static int gen8_init_scratch(struct i915 struct drm_i915_gem_object *obj; =20 obj =3D vm->alloc_pt_dma(vm, I915_GTT_PAGE_SIZE_4K); - if (IS_ERR(obj)) + if (IS_ERR(obj)) { + ret =3D PTR_ERR(obj); goto free_scratch; + } =20 ret =3D map_pt_dma(vm, obj); if (ret) { @@ -823,7 +828,8 @@ static int gen8_init_scratch(struct i915 free_scratch: while (i--) i915_gem_object_put(vm->scratch[i]); - return -ENOMEM; + vm->scratch[0] =3D NULL; + return ret; } =20 static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt) @@ -901,6 +907,7 @@ err_pd: struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, unsigned long lmem_pt_obj_flags) { + struct i915_page_directory *pd; struct i915_ppgtt *ppgtt; int err; =20 @@ -946,21 +953,7 @@ struct i915_ppgtt *gen8_ppgtt_create(str ppgtt->vm.alloc_scratch_dma =3D alloc_pt_dma; } =20 - err =3D gen8_init_scratch(&ppgtt->vm); - if (err) - goto err_free; - - ppgtt->pd =3D gen8_alloc_top_pd(&ppgtt->vm); - if (IS_ERR(ppgtt->pd)) { - err =3D PTR_ERR(ppgtt->pd); - goto err_free_scratch; - } - - if (!i915_vm_is_4lvl(&ppgtt->vm)) { - err =3D gen8_preallocate_top_level_pdp(ppgtt); - if (err) - goto err_free_pd; - } + ppgtt->vm.pte_encode =3D gen8_pte_encode; =20 ppgtt->vm.bind_async_flags =3D I915_VMA_LOCAL_BIND; ppgtt->vm.insert_entries =3D gen8_ppgtt_insert; @@ -971,22 +964,31 @@ struct i915_ppgtt *gen8_ppgtt_create(str ppgtt->vm.allocate_va_range =3D gen8_ppgtt_alloc; ppgtt->vm.clear_range =3D gen8_ppgtt_clear; ppgtt->vm.foreach =3D gen8_ppgtt_foreach; + ppgtt->vm.cleanup =3D gen8_ppgtt_cleanup; =20 - ppgtt->vm.pte_encode =3D gen8_pte_encode; + err =3D gen8_init_scratch(&ppgtt->vm); + if (err) + goto err_put; + + pd =3D gen8_alloc_top_pd(&ppgtt->vm); + if (IS_ERR(pd)) { + err =3D PTR_ERR(pd); + goto err_put; + } + ppgtt->pd =3D pd; + + if (!i915_vm_is_4lvl(&ppgtt->vm)) { + err =3D gen8_preallocate_top_level_pdp(ppgtt); + if (err) + goto err_put; + } =20 if (intel_vgpu_active(gt->i915)) gen8_ppgtt_notify_vgt(ppgtt, true); =20 - ppgtt->vm.cleanup =3D gen8_ppgtt_cleanup; - return ppgtt; =20 -err_free_pd: - __gen8_ppgtt_cleanup(&ppgtt->vm, ppgtt->pd, - gen8_pd_top_count(&ppgtt->vm), ppgtt->vm.top); -err_free_scratch: - free_scratch(&ppgtt->vm); -err_free: - kfree(ppgtt); +err_put: + i915_vm_put(&ppgtt->vm); return ERR_PTR(err); } --- a/drivers/gpu/drm/i915/gt/intel_gtt.c +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c @@ -405,6 +405,9 @@ void free_scratch(struct i915_address_sp { int i; =20 + if (!vm->scratch[0]) + return; + for (i =3D 0; i <=3D vm->top; i++) i915_gem_object_put(vm->scratch[i]); }