From nobody Fri Dec 19 18:59:44 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D3B0C04A95 for ; Sat, 22 Oct 2022 07:48:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231592AbiJVHs0 (ORCPT ); Sat, 22 Oct 2022 03:48:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231564AbiJVHsC (ORCPT ); Sat, 22 Oct 2022 03:48:02 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE63D474C5; Sat, 22 Oct 2022 00:44:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E812860B28; Sat, 22 Oct 2022 07:39:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0741AC433C1; Sat, 22 Oct 2022 07:39:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1666424383; bh=2W+EnrEqw1ZdduKBQk6+8YZEHNmfS8U/NiyiLPhgklc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Yxb3AyAC1T+EzRM/Wm9+juEjfu6Ed+Z2dVaDOH2KplrmVz4XT3nsTVEhJ/Av6ny8c LzzcZkiMuVMKITsLQEGMOJ9/qXL/aMbY7Wi6OUjowKxnsclaIcEHa1Mu2CTdpkoTGn LJdsqC3I+1RaYaYR5VXWpAebTu42oqPCXXPACyrA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Heiko Stuebner , Quentin Schulz , Linus Walleij Subject: [PATCH 5.19 098/717] pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback Date: Sat, 22 Oct 2022 09:19:37 +0200 Message-Id: <20221022072432.717806457@linuxfoundation.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221022072415.034382448@linuxfoundation.org> References: <20221022072415.034382448@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Quentin Schulz commit 4635c0e2a7f7f3568cbfccae70121f9835efa62c upstream. Before the split of gpio and pinctrl sections in their own driver, rockchip_set_mux was called in pinmux_ops.gpio_set_direction for configuring a pin in its GPIO function. This is essential for cases where pinctrl is "bypassed" by gpio consumers otherwise the GPIO function is not configured for the pin and it does not work. Such was the case for the sysfs/libgpiod userspace GPIO handling. Let's re-implement the pinmux_ops.gpio_set_direction callback so that the gpio subsystem can request from the pinctrl driver to put the pin in its GPIO function. Fixes: 9ce9a02039de ("pinctrl/rockchip: drop the gpio related codes") Cc: stable@vger.kernel.org Reviewed-by: Heiko Stuebner Signed-off-by: Quentin Schulz Link: https://lore.kernel.org/r/20220930132033.4003377-2-foss+kernel@0leil.= net Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman --- drivers/pinctrl/pinctrl-rockchip.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2393,11 +2393,24 @@ static int rockchip_pmx_set(struct pinct return 0; } =20 +static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset, + bool input) +{ + struct rockchip_pinctrl *info =3D pinctrl_dev_get_drvdata(pctldev); + struct rockchip_pin_bank *bank; + + bank =3D pin_to_bank(info, offset); + return rockchip_set_mux(bank, offset - bank->pin_base, RK_FUNC_GPIO); +} + static const struct pinmux_ops rockchip_pmx_ops =3D { .get_functions_count =3D rockchip_pmx_get_funcs_count, .get_function_name =3D rockchip_pmx_get_func_name, .get_function_groups =3D rockchip_pmx_get_groups, .set_mux =3D rockchip_pmx_set, + .gpio_set_direction =3D rockchip_pmx_gpio_set_direction, }; =20 /*