From nobody Tue Jun 30 04:32:05 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D825EC38A2D for ; Fri, 21 Oct 2022 22:28:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229779AbiJUW21 (ORCPT ); Fri, 21 Oct 2022 18:28:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229535AbiJUW2Y (ORCPT ); Fri, 21 Oct 2022 18:28:24 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AFF0215518 for ; Fri, 21 Oct 2022 15:28:22 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-36772c0c795so41304087b3.23 for ; Fri, 21 Oct 2022 15:28:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=UNGrrBQSFJPioHxic2YhpQaL13tNOPKKc9e4+Y6lW8k=; b=GRjRHyXTE27B29YnD2HJByyz3W+700Npn0UlJyjcUv0fTWRPpk97F2bNonvmnpiDxh g/78zE0v2v228u8mCtmIvNuulUIzJU1BjwAijMPIxh9Rcg1p7sOtw2GiPxuAx+TPnpQd syLdHCxlIqOxrJmbssi6cOkK3CP06GK+70QGTkOSqcnw5vpjij0H7u8hWTD6yC2WIxjz /UJ3W3L7OpKZO3zw8kAXtj0iectnuEdw3c9hoGKMLtIo3Oe6V/YlqbNOH/yGyj9YJBNm vaIsPoH74TVQXh/5h7oXgdBAyKbwRwb5LxAl4j9TTKx+te6MOjhqPpttBElipDkFhDf7 btJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=UNGrrBQSFJPioHxic2YhpQaL13tNOPKKc9e4+Y6lW8k=; b=ZNhvF2WIDp1ICXjW++YnakbrhNwL7MI67AwV3AkciOv0sdn4oYWWDARRpCDwUN6Tpf osOvZnk30Q9/Bw9Rok4uwTwWoEoqWI5TAFi9AZ6K9u+U8mVb+Q/UX7Z1SsLR8SgohwsG advP1FeBaqfnToWTr9fMci+KefR7EZuxJMEpAhhuKViqowUHkdRorlIsRkCDenld5Cg/ /IqvA+07XXtCtrZTiTLnt+i7etrh61siiVnr8XD5DzHhCkqVEbo/B8n36K9i6sVbXlkt cnMgrCSLb52Nl6M7tT8TGvyLSWVLQydsu5vrD8qtkhBpIhxRMl5cFz4tPibhmYbzR0ER z3XQ== X-Gm-Message-State: ACrzQf0OddDawcszG+8lifGWYKrxX4tmTqV0C/kNYcYMug5pVAC+Myf5 gKW4wLvQsywMSUSVA7SRD6M0lXtfCyBI X-Google-Smtp-Source: AMsMyM5TbyMWFj8dXnMjbTzsabuwCCGxprLxGdPNkjU9sB5Pn03oatqgJU6mjH6D+fPclNH2ondarbIPH43I X-Received: from eugenis.svl.corp.google.com ([2620:15c:2ce:200:8a12:10f5:7696:29de]) (user=eugenis job=sendgmr) by 2002:a81:130a:0:b0:360:9739:82be with SMTP id 10-20020a81130a000000b00360973982bemr19424499ywt.69.1666391301693; Fri, 21 Oct 2022 15:28:21 -0700 (PDT) Date: Fri, 21 Oct 2022 15:28:11 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.38.0.135.g90850a2211-goog Message-ID: <20221021222811.2366215-1-eugenis@google.com> Subject: [PATCH] arm64/mm: Consolidate TCR_EL1 fields From: Evgenii Stepanov To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Anshuman Khandual commit e921da6bc7cac5f0e8458fe5df18ae08eb538f54 upstream. This renames and moves SYS_TCR_EL1_TCMA1 and SYS_TCR_EL1_TCMA0 definitions into pgtable-hwdef.h thus consolidating all TCR fields in a single header. This does not cause any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: Catalin Marinas Signed-off-by: Anshuman Khandual Link: https://lore.kernel.org/r/1643121513-21854-1-git-send-email-anshuman.= khandual@arm.com Signed-off-by: Will Deacon --- arch/arm64/include/asm/pgtable-hwdef.h | 2 ++ arch/arm64/include/asm/sysreg.h | 4 ---- arch/arm64/mm/proc.S | 2 +- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/as= m/pgtable-hwdef.h index 40085e53f573..66671ff05183 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -273,6 +273,8 @@ #define TCR_NFD1 (UL(1) << 54) #define TCR_E0PD0 (UL(1) << 55) #define TCR_E0PD1 (UL(1) << 56) +#define TCR_TCMA0 (UL(1) << 57) +#define TCR_TCMA1 (UL(1) << 58) =20 /* * TTBR. diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysre= g.h index 394fc5998a4b..f79f3720e4cb 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1094,10 +1094,6 @@ #define CPACR_EL1_ZEN_EL0EN (BIT(17)) /* enable EL0 access, if EL1EN set */ #define CPACR_EL1_ZEN (CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN) =20 -/* TCR EL1 Bit Definitions */ -#define SYS_TCR_EL1_TCMA1 (BIT(58)) -#define SYS_TCR_EL1_TCMA0 (BIT(57)) - /* GCR_EL1 Definitions */ #define SYS_GCR_EL1_RRND (BIT(16)) #define SYS_GCR_EL1_EXCL_MASK 0xffffUL diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index d35c90d2e47a..50bbed947bec 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -46,7 +46,7 @@ #endif =20 #ifdef CONFIG_KASAN_HW_TAGS -#define TCR_MTE_FLAGS SYS_TCR_EL1_TCMA1 | TCR_TBI1 | TCR_TBID1 +#define TCR_MTE_FLAGS TCR_TCMA1 | TCR_TBI1 | TCR_TBID1 #else /* * The mte_zero_clear_page_tags() implementation uses DC GZVA, which relie= s on --=20 2.38.0.135.g90850a2211-goog