From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73496C433FE for ; Thu, 20 Oct 2022 16:04:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231156AbiJTQEN (ORCPT ); Thu, 20 Oct 2022 12:04:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229832AbiJTQDc (ORCPT ); Thu, 20 Oct 2022 12:03:32 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDB271BA1F2; Thu, 20 Oct 2022 09:03:30 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29KG37Bq005188; Thu, 20 Oct 2022 11:03:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666281787; bh=DyQWcVMVSf1fdWTs1YaebqdYIHq4T1NiKjgf/LlvdyU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mT5t/0OtkhrHoAiHt+UCJvQxeOG8aGaCMhNgEGcFITZUV2UCJBzwafm3HpJDsGLrF zLgvpmNvBN47C1EXt5zfpBPAHLrv+GTrtMMXcAm5zjUkODW/c1xZ80nLh1Rcmu0ywi fwkzbgRPCNLUaGAZfWfx7yJZVDsiEuUBDGXyCTBQ= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29KG37e1014806 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 20 Oct 2022 11:03:07 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:07 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:07 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG3639059665; Thu, 20 Oct 2022 11:03:06 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 01/12] arm64: dts: ti: k3-j721e: Enable UART nodes at the board level Date: Thu, 20 Oct 2022 11:02:54 -0500 Message-ID: <20221020160305.18711-2-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" UART nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the UART nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721e-common-proc-board.dts | 40 +++++++----------- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 10 +++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 + arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 42 ++++--------------- 4 files changed, 37 insertions(+), 57 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j721e-common-proc-board.dts index b1691ac3442dc..01afacfe6faaa 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -370,38 +370,30 @@ &wkup_uart0 { status =3D "reserved"; }; =20 -&main_uart0 { - power-domains =3D <&k3_pds 146 TI_SCI_PD_SHARED>; -}; - -&main_uart3 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart5 { - /* UART not brought out */ - status =3D "disabled"; +&mcu_uart0 { + status =3D "okay"; + /* Default pinmux */ }; =20 -&main_uart6 { - /* UART not brought out */ - status =3D "disabled"; +&main_uart0 { + status =3D "okay"; + /* Shared with ATF on this platform */ + power-domains =3D <&k3_pds 146 TI_SCI_PD_SHARED>; }; =20 -&main_uart7 { - /* UART not brought out */ - status =3D "disabled"; +&main_uart1 { + status =3D "okay"; + /* Default pinmux */ }; =20 -&main_uart8 { - /* UART not brought out */ - status =3D "disabled"; +&main_uart2 { + status =3D "okay"; + /* Default pinmux */ }; =20 -&main_uart9 { - /* UART not brought out */ - status =3D "disabled"; +&main_uart4 { + status =3D "okay"; + /* Default pinmux */ }; =20 &main_gpio2 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 917c9dc99efaa..5f85d1cc8b277 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -840,6 +840,7 @@ main_uart0: serial@2800000 { power-domains =3D <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 146 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart1: serial@2810000 { @@ -851,6 +852,7 @@ main_uart1: serial@2810000 { power-domains =3D <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 278 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart2: serial@2820000 { @@ -862,6 +864,7 @@ main_uart2: serial@2820000 { power-domains =3D <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 279 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart3: serial@2830000 { @@ -873,6 +876,7 @@ main_uart3: serial@2830000 { power-domains =3D <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 280 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart4: serial@2840000 { @@ -884,6 +888,7 @@ main_uart4: serial@2840000 { power-domains =3D <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 281 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart5: serial@2850000 { @@ -895,6 +900,7 @@ main_uart5: serial@2850000 { power-domains =3D <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 282 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart6: serial@2860000 { @@ -906,6 +912,7 @@ main_uart6: serial@2860000 { power-domains =3D <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 283 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart7: serial@2870000 { @@ -917,6 +924,7 @@ main_uart7: serial@2870000 { power-domains =3D <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 284 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart8: serial@2880000 { @@ -928,6 +936,7 @@ main_uart8: serial@2880000 { power-domains =3D <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 285 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart9: serial@2890000 { @@ -939,6 +948,7 @@ main_uart9: serial@2890000 { power-domains =3D <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 286 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_gpio0: gpio@600000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index df08724bbf1c5..fce88ed23596d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -79,6 +79,7 @@ wkup_uart0: serial@42300000 { power-domains =3D <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 287 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 mcu_uart0: serial@40a00000 { @@ -90,6 +91,7 @@ mcu_uart0: serial@40a00000 { power-domains =3D <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 149 0>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 wkup_gpio_intr: interrupt-controller@42200000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index 80358cba6954c..23538c5f43575 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -475,46 +475,22 @@ &wkup_uart0 { status =3D "reserved"; }; =20 +&mcu_uart0 { + status =3D "okay"; + /* Default pinmux */ +}; + &main_uart0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_uart0_pins_default>; /* Shared with ATF on this platform */ power-domains =3D <&k3_pds 146 TI_SCI_PD_SHARED>; }; =20 -&main_uart2 { - /* Brought out on RPi header */ - status =3D "disabled"; -}; - -&main_uart3 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart5 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart6 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart7 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart8 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart9 { - /* Brought out on M.2 E Key */ - status =3D "disabled"; +&main_uart1 { + status =3D "okay"; + /* Default pinmux */ }; =20 &main_sdhci0 { --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE9EBC4332F for ; Thu, 20 Oct 2022 16:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230398AbiJTQDj (ORCPT ); Thu, 20 Oct 2022 12:03:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230443AbiJTQD3 (ORCPT ); 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Thu, 20 Oct 2022 11:03:08 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:08 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363A059665; Thu, 20 Oct 2022 11:03:07 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 02/12] arm64: dts: ti: k3-j721e: Enable I2C nodes at the board level Date: Thu, 20 Oct 2022 11:02:55 -0500 Message-ID: <20221020160305.18711-3-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" I2C nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the I2C nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 7 ++++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 23 +++---------------- 4 files changed, 17 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 01afacfe6faaa..24e9db563b234 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -529,6 +529,7 @@ adc { }; =20 &main_i2c0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c0_pins_default>; clock-frequency =3D <400000>; @@ -565,6 +566,7 @@ p10-hog { }; =20 &main_i2c1 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c1_pins_default>; clock-frequency =3D <400000>; @@ -590,6 +592,7 @@ &k3_clks { }; =20 &main_i2c3 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c3_pins_default>; clock-frequency =3D <400000>; @@ -628,6 +631,7 @@ pcm3168a_1: audio-codec@44 { }; =20 &main_i2c6 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c6_pins_default>; clock-frequency =3D <400000>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 5f85d1cc8b277..61bba78ce354e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1229,6 +1229,7 @@ main_i2c0: i2c@2000000 { clock-names =3D "fck"; clocks =3D <&k3_clks 187 0>; power-domains =3D <&k3_pds 187 TI_SCI_PD_SHARED>; + status =3D "disabled"; }; =20 main_i2c1: i2c@2010000 { @@ -1240,6 +1241,7 @@ main_i2c1: i2c@2010000 { clock-names =3D "fck"; clocks =3D <&k3_clks 188 0>; power-domains =3D <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c2: i2c@2020000 { @@ -1251,6 +1253,7 @@ main_i2c2: i2c@2020000 { clock-names =3D "fck"; clocks =3D <&k3_clks 189 0>; power-domains =3D <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c3: i2c@2030000 { @@ -1262,6 +1265,7 @@ main_i2c3: i2c@2030000 { clock-names =3D "fck"; clocks =3D <&k3_clks 190 0>; power-domains =3D <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c4: i2c@2040000 { @@ -1273,6 +1277,7 @@ main_i2c4: i2c@2040000 { clock-names =3D "fck"; clocks =3D <&k3_clks 191 0>; power-domains =3D <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c5: i2c@2050000 { @@ -1284,6 +1289,7 @@ main_i2c5: i2c@2050000 { clock-names =3D "fck"; clocks =3D <&k3_clks 192 0>; power-domains =3D <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c6: i2c@2060000 { @@ -1295,6 +1301,7 @@ main_i2c6: i2c@2060000 { clock-names =3D "fck"; clocks =3D <&k3_clks 193 0>; power-domains =3D <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 ufs_wrapper: ufs-wrapper@4e80000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index fce88ed23596d..7bb6613796eab 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -147,6 +147,7 @@ mcu_i2c0: i2c@40b00000 { clock-names =3D "fck"; clocks =3D <&k3_clks 194 0>; power-domains =3D <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcu_i2c1: i2c@40b10000 { @@ -158,6 +159,7 @@ mcu_i2c1: i2c@40b10000 { clock-names =3D "fck"; clocks =3D <&k3_clks 195 0>; power-domains =3D <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 wkup_i2c0: i2c@42120000 { @@ -169,6 +171,7 @@ wkup_i2c0: i2c@42120000 { clock-names =3D "fck"; clocks =3D <&k3_clks 197 0>; power-domains =3D <&k3_pds 197 TI_SCI_PD_SHARED>; + status =3D "disabled"; }; =20 fss: fss@47000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index 23538c5f43575..1d5a90d968497 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -537,6 +537,7 @@ &ospi1 { }; =20 &main_i2c0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c0_pins_default>; clock-frequency =3D <400000>; @@ -564,18 +565,15 @@ i2c@1 { }; =20 &main_i2c1 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c1_pins_default>; /* i2c1 is used for DVI DDC, so we need to use 100kHz */ clock-frequency =3D <100000>; }; =20 -&main_i2c2 { - /* Unused */ - status =3D "disabled"; -}; - &main_i2c3 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c3_pins_default>; clock-frequency =3D <400000>; @@ -602,21 +600,6 @@ i2c@1 { }; }; =20 -&main_i2c4 { - /* Unused */ - status =3D "disabled"; -}; - -&main_i2c5 { - /* Brought out on RPi Header */ - status =3D "disabled"; -}; - -&main_i2c6 { - /* Unused */ - status =3D "disabled"; -}; - &main_gpio2 { status =3D "disabled"; }; --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69036C43219 for ; Thu, 20 Oct 2022 16:03:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230399AbiJTQDb (ORCPT ); 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Thu, 20 Oct 2022 11:03:09 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:09 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:08 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363B059665; Thu, 20 Oct 2022 11:03:08 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 03/12] arm64: dts: ti: k3-j721e: Enable MCASP nodes at the board level Date: Thu, 20 Oct 2022 11:02:56 -0500 Message-ID: <20221020160305.18711-4-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" MCASP nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the MCASP nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721e-common-proc-board.dts | 45 +------------- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 12 ++++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 60 ------------------- 3 files changed, 13 insertions(+), 104 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 24e9db563b234..6cee708e0d170 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -709,47 +709,8 @@ dp0_out: endpoint { }; }; =20 -&mcasp0 { - status =3D "disabled"; -}; - -&mcasp1 { - status =3D "disabled"; -}; - -&mcasp2 { - status =3D "disabled"; -}; - -&mcasp3 { - status =3D "disabled"; -}; - -&mcasp4 { - status =3D "disabled"; -}; - -&mcasp5 { - status =3D "disabled"; -}; - -&mcasp6 { - status =3D "disabled"; -}; - -&mcasp7 { - status =3D "disabled"; -}; - -&mcasp8 { - status =3D "disabled"; -}; - -&mcasp9 { - status =3D "disabled"; -}; - &mcasp10 { + status =3D "okay"; #sound-dai-cells =3D <0>; =20 pinctrl-names =3D "default"; @@ -767,10 +728,6 @@ &mcasp10 { rx-num-evt =3D <0>; }; =20 -&mcasp11 { - status =3D "disabled"; -}; - &cmn_refclk1 { clock-frequency =3D <100000000>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 61bba78ce354e..3706b319c46c6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1425,6 +1425,7 @@ mcasp0: mcasp@2b00000 { clocks =3D <&k3_clks 174 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 174 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp1: mcasp@2b10000 { @@ -1442,6 +1443,7 @@ mcasp1: mcasp@2b10000 { clocks =3D <&k3_clks 175 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 175 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp2: mcasp@2b20000 { @@ -1459,6 +1461,7 @@ mcasp2: mcasp@2b20000 { clocks =3D <&k3_clks 176 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 176 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp3: mcasp@2b30000 { @@ -1476,6 +1479,7 @@ mcasp3: mcasp@2b30000 { clocks =3D <&k3_clks 177 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 177 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp4: mcasp@2b40000 { @@ -1493,6 +1497,7 @@ mcasp4: mcasp@2b40000 { clocks =3D <&k3_clks 178 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp5: mcasp@2b50000 { @@ -1510,6 +1515,7 @@ mcasp5: mcasp@2b50000 { clocks =3D <&k3_clks 179 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp6: mcasp@2b60000 { @@ -1527,6 +1533,7 @@ mcasp6: mcasp@2b60000 { clocks =3D <&k3_clks 180 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 180 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp7: mcasp@2b70000 { @@ -1544,6 +1551,7 @@ mcasp7: mcasp@2b70000 { clocks =3D <&k3_clks 181 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp8: mcasp@2b80000 { @@ -1561,6 +1569,7 @@ mcasp8: mcasp@2b80000 { clocks =3D <&k3_clks 182 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp9: mcasp@2b90000 { @@ -1578,6 +1587,7 @@ mcasp9: mcasp@2b90000 { clocks =3D <&k3_clks 183 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 183 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp10: mcasp@2ba0000 { @@ -1595,6 +1605,7 @@ mcasp10: mcasp@2ba0000 { clocks =3D <&k3_clks 184 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcasp11: mcasp@2bb0000 { @@ -1612,6 +1623,7 @@ mcasp11: mcasp@2bb0000 { clocks =3D <&k3_clks 185 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 watchdog0: watchdog@2200000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index 1d5a90d968497..b7cb34007fb68 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -796,66 +796,6 @@ dp0_out: endpoint { }; }; =20 -&mcasp0 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp1 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp2 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp3 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp4 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp5 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp6 { - /* Brought out on RPi header */ - status =3D "disabled"; -}; - -&mcasp7 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp8 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp9 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp10 { - /* Unused */ - status =3D "disabled"; -}; - -&mcasp11 { - /* Brought out on M.2 E Key */ - status =3D "disabled"; -}; - &serdes0 { serdes0_pcie_link: phy@0 { reg =3D <0>; --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D008C4332F for ; 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Thu, 20 Oct 2022 11:03:10 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:09 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:09 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363C059665; Thu, 20 Oct 2022 11:03:09 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 04/12] arm64: dts: ti: k3-j721e: Enable MCAN nodes at the board level Date: Thu, 20 Oct 2022 11:02:57 -0500 Message-ID: <20221020160305.18711-5-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" MCAN nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the MCAN nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721e-common-proc-board.dts | 52 ++----------------- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 14 +++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 + 3 files changed, 20 insertions(+), 48 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 6cee708e0d170..1861598f3bb40 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -878,73 +878,29 @@ &icssg1_mdio { }; =20 &mcu_mcan0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&mcu_mcan0_pins_default>; phys =3D <&transceiver1>; }; =20 &mcu_mcan1 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&mcu_mcan1_pins_default>; phys =3D <&transceiver2>; }; =20 &main_mcan0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mcan0_pins_default>; phys =3D <&transceiver3>; }; =20 -&main_mcan1 { - status =3D "disabled"; -}; - &main_mcan2 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mcan2_pins_default>; phys =3D <&transceiver4>; }; - -&main_mcan3 { - status =3D "disabled"; -}; - -&main_mcan4 { - status =3D "disabled"; -}; - -&main_mcan5 { - status =3D "disabled"; -}; - -&main_mcan6 { - status =3D "disabled"; -}; - -&main_mcan7 { - status =3D "disabled"; -}; - -&main_mcan8 { - status =3D "disabled"; -}; - -&main_mcan9 { - status =3D "disabled"; -}; - -&main_mcan10 { - status =3D "disabled"; -}; - -&main_mcan11 { - status =3D "disabled"; -}; - -&main_mcan12 { - status =3D "disabled"; -}; - -&main_mcan13 { - status =3D "disabled"; -}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 3706b319c46c6..646885dd9f533 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2056,6 +2056,7 @@ main_mcan0: can@2701000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan1: can@2711000 { @@ -2070,6 +2071,7 @@ main_mcan1: can@2711000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan2: can@2721000 { @@ -2084,6 +2086,7 @@ main_mcan2: can@2721000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan3: can@2731000 { @@ -2098,6 +2101,7 @@ main_mcan3: can@2731000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan4: can@2741000 { @@ -2112,6 +2116,7 @@ main_mcan4: can@2741000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan5: can@2751000 { @@ -2126,6 +2131,7 @@ main_mcan5: can@2751000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan6: can@2761000 { @@ -2140,6 +2146,7 @@ main_mcan6: can@2761000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan7: can@2771000 { @@ -2154,6 +2161,7 @@ main_mcan7: can@2771000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan8: can@2781000 { @@ -2168,6 +2176,7 @@ main_mcan8: can@2781000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan9: can@2791000 { @@ -2182,6 +2191,7 @@ main_mcan9: can@2791000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan10: can@27a1000 { @@ -2196,6 +2206,7 @@ main_mcan10: can@27a1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan11: can@27b1000 { @@ -2210,6 +2221,7 @@ main_mcan11: can@27b1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan12: can@27c1000 { @@ -2224,6 +2236,7 @@ main_mcan12: can@27c1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan13: can@27d1000 { @@ -2238,5 +2251,6 @@ main_mcan13: can@27d1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 7bb6613796eab..f79e8100a7ac0 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -408,6 +408,7 @@ mcu_mcan0: can@40528000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 mcu_mcan1: can@40568000 { @@ -422,5 +423,6 @@ mcu_mcan1: can@40568000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; }; --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6C64C433FE for ; Thu, 20 Oct 2022 16:04:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231173AbiJTQEA (ORCPT ); Thu, 20 Oct 2022 12:04:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230457AbiJTQDa (ORCPT ); Thu, 20 Oct 2022 12:03:30 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C53671BA1E4; Thu, 20 Oct 2022 09:03:28 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29KG3A5l111496; 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Thu, 20 Oct 2022 11:03:10 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363D059665; Thu, 20 Oct 2022 11:03:09 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 05/12] arm64: dts: ti: k3-j7200: Enable UART nodes at the board level Date: Thu, 20 Oct 2022 11:02:58 -0500 Message-ID: <20221020160305.18711-6-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" UART nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the UART nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j7200-common-proc-board.dts | 46 +++++-------------- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 10 ++++ .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 2 + 3 files changed, 23 insertions(+), 35 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 7e8552fd2b6ae..bc3d1831f5cda 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -154,51 +154,27 @@ &wkup_uart0 { status =3D "reserved"; }; =20 +&mcu_uart0 { + status =3D "okay"; + /* Default pinmux */ +}; + &main_uart0 { + status =3D "okay"; /* Shared with ATF on this platform */ power-domains =3D <&k3_pds 146 TI_SCI_PD_SHARED>; }; =20 +&main_uart1 { + status =3D "okay"; + /* Default pinmux */ +}; + &main_uart2 { /* MAIN UART 2 is used by R5F firmware */ status =3D "reserved"; }; =20 -&main_uart3 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart4 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart5 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart6 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart7 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart8 { - /* UART not brought out */ - status =3D "disabled"; -}; - -&main_uart9 { - /* UART not brought out */ - status =3D "disabled"; -}; - &main_gpio2 { status =3D "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index 80a57916bcb3e..f9aefd3dbdcaf 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -319,6 +319,7 @@ main_uart0: serial@2800000 { power-domains =3D <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 146 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart1: serial@2810000 { @@ -330,6 +331,7 @@ main_uart1: serial@2810000 { power-domains =3D <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 278 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart2: serial@2820000 { @@ -341,6 +343,7 @@ main_uart2: serial@2820000 { power-domains =3D <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 279 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart3: serial@2830000 { @@ -352,6 +355,7 @@ main_uart3: serial@2830000 { power-domains =3D <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 280 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart4: serial@2840000 { @@ -363,6 +367,7 @@ main_uart4: serial@2840000 { power-domains =3D <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 281 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart5: serial@2850000 { @@ -374,6 +379,7 @@ main_uart5: serial@2850000 { power-domains =3D <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 282 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart6: serial@2860000 { @@ -385,6 +391,7 @@ main_uart6: serial@2860000 { power-domains =3D <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 283 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart7: serial@2870000 { @@ -396,6 +403,7 @@ main_uart7: serial@2870000 { power-domains =3D <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 284 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart8: serial@2880000 { @@ -407,6 +415,7 @@ main_uart8: serial@2880000 { power-domains =3D <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 285 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_uart9: serial@2890000 { @@ -418,6 +427,7 @@ main_uart9: serial@2890000 { power-domains =3D <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 286 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 main_i2c0: i2c@2000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j7200-mcu-wakeup.dtsi index e5be78a58682d..7c205b347f813 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -79,6 +79,7 @@ wkup_uart0: serial@42300000 { power-domains =3D <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 287 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 mcu_uart0: serial@40a00000 { @@ -90,6 +91,7 @@ mcu_uart0: serial@40a00000 { power-domains =3D <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 149 2>; clock-names =3D "fclk"; + status =3D "disabled"; }; =20 wkup_gpio_intr: interrupt-controller@42200000 { --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FD8CC433FE for ; Thu, 20 Oct 2022 16:04:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231158AbiJTQEU (ORCPT ); Thu, 20 Oct 2022 12:04:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230467AbiJTQDc (ORCPT ); Thu, 20 Oct 2022 12:03:32 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 681AC1BA1C8; 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Thu, 20 Oct 2022 11:03:10 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363E059665; Thu, 20 Oct 2022 11:03:10 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 06/12] arm64: dts: ti: k3-j7200: Enable I2C nodes at the board level Date: Thu, 20 Oct 2022 11:02:59 -0500 Message-ID: <20221020160305.18711-7-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" I2C nodes defined in the top-level J7200 SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the I2C nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 7 +++++++ arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++ 3 files changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j7200-common-proc-board.dts index bc3d1831f5cda..6240856e48631 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -210,6 +210,7 @@ &cpsw_port1 { }; =20 &main_i2c0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c0_pins_default>; clock-frequency =3D <400000>; @@ -237,6 +238,7 @@ exp2: gpio@22 { * The i2c1 of the CPB (as it is labeled) is not connected to j7200. */ &main_i2c1 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c1_pins_default>; clock-frequency =3D <400000>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index f9aefd3dbdcaf..610d042ffa1d6 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -439,6 +439,7 @@ main_i2c0: i2c@2000000 { clock-names =3D "fck"; clocks =3D <&k3_clks 187 1>; power-domains =3D <&k3_pds 187 TI_SCI_PD_SHARED>; + status =3D "disabled"; }; =20 main_i2c1: i2c@2010000 { @@ -450,6 +451,7 @@ main_i2c1: i2c@2010000 { clock-names =3D "fck"; clocks =3D <&k3_clks 188 1>; power-domains =3D <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c2: i2c@2020000 { @@ -461,6 +463,7 @@ main_i2c2: i2c@2020000 { clock-names =3D "fck"; clocks =3D <&k3_clks 189 1>; power-domains =3D <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c3: i2c@2030000 { @@ -472,6 +475,7 @@ main_i2c3: i2c@2030000 { clock-names =3D "fck"; clocks =3D <&k3_clks 190 1>; power-domains =3D <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c4: i2c@2040000 { @@ -483,6 +487,7 @@ main_i2c4: i2c@2040000 { clock-names =3D "fck"; clocks =3D <&k3_clks 191 1>; power-domains =3D <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c5: i2c@2050000 { @@ -494,6 +499,7 @@ main_i2c5: i2c@2050000 { clock-names =3D "fck"; clocks =3D <&k3_clks 192 1>; power-domains =3D <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c6: i2c@2060000 { @@ -505,6 +511,7 @@ main_i2c6: i2c@2060000 { clock-names =3D "fck"; clocks =3D <&k3_clks 193 1>; power-domains =3D <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_sdhci0: mmc@4f80000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 7c205b347f813..2006933f9b497 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -251,6 +251,7 @@ mcu_i2c0: i2c@40b00000 { clock-names =3D "fck"; clocks =3D <&k3_clks 194 1>; power-domains =3D <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcu_i2c1: i2c@40b10000 { @@ -262,6 +263,7 @@ mcu_i2c1: i2c@40b10000 { clock-names =3D "fck"; clocks =3D <&k3_clks 195 1>; power-domains =3D <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 wkup_i2c0: i2c@42120000 { @@ -273,6 +275,7 @@ wkup_i2c0: i2c@42120000 { clock-names =3D "fck"; clocks =3D <&k3_clks 197 1>; power-domains =3D <&k3_pds 197 TI_SCI_PD_SHARED>; + status =3D "disabled"; }; =20 fss: syscon@47000000 { --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCC4AC4332F for ; Thu, 20 Oct 2022 16:04:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231191AbiJTQE2 (ORCPT ); Thu, 20 Oct 2022 12:04:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230474AbiJTQDd (ORCPT ); Thu, 20 Oct 2022 12:03:33 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 690531BA1F3; Thu, 20 Oct 2022 09:03:31 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29KG3CuW119646; Thu, 20 Oct 2022 11:03:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666281792; bh=vvotJEDDFvsiN95CQPG9C11IjnclUspgYS+jLdLpazc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mIqayLjwjRCMHD9/5htQWV7bkExjhcSmdKWov2Zt2oHZ4SzeW6re407LmyRrD6oXX 2sgg1hocxhWmZ/Uyev4kuict7i766ML5d53ZJMyLbB4Hd+uPMmMbvxe30z0XDD2ZsA tAgryIJRUqNMuTvKCyyur6efcaFkPzKvT+hzWBAw= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29KG3Cfa052184 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 20 Oct 2022 11:03:12 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:11 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:11 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363F059665; Thu, 20 Oct 2022 11:03:11 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 07/12] arm64: dts: ti: k3-j721s2: Enable UART nodes at the board level Date: Thu, 20 Oct 2022 11:03:00 -0500 Message-ID: <20221020160305.18711-8-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" UART nodes defined in the top-level J721s2 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the UART nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721s2-common-proc-board.dts | 38 ++----------------- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 10 +++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 + 3 files changed, 16 insertions(+), 34 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/= arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index b210cc07c5395..9f1a0ca4dc372 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -219,49 +219,19 @@ &wkup_uart0 { status =3D "reserved"; }; =20 -&main_uart0 { - status =3D "disabled"; -}; - -&main_uart1 { - status =3D "disabled"; -}; - -&main_uart2 { - status =3D "disabled"; -}; - -&main_uart3 { - status =3D "disabled"; -}; - -&main_uart4 { - status =3D "disabled"; -}; - -&main_uart5 { - status =3D "disabled"; -}; - -&main_uart6 { - status =3D "disabled"; -}; - -&main_uart7 { - status =3D "disabled"; +&mcu_uart0 { + status =3D "okay"; + /* Default pinmux */ }; =20 &main_uart8 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_uart8_pins_default>; /* Shared with TFA on this platform */ power-domains =3D <&k3_pds 357 TI_SCI_PD_SHARED>; }; =20 -&main_uart9 { - status =3D "disabled"; -}; - &main_i2c0 { clock-frequency =3D <400000>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 34e7d577ae13b..7267a7b665ce8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -80,6 +80,7 @@ main_uart0: serial@2800000 { clocks =3D <&k3_clks 146 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart1: serial@2810000 { @@ -90,6 +91,7 @@ main_uart1: serial@2810000 { clocks =3D <&k3_clks 350 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart2: serial@2820000 { @@ -100,6 +102,7 @@ main_uart2: serial@2820000 { clocks =3D <&k3_clks 351 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart3: serial@2830000 { @@ -110,6 +113,7 @@ main_uart3: serial@2830000 { clocks =3D <&k3_clks 352 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart4: serial@2840000 { @@ -120,6 +124,7 @@ main_uart4: serial@2840000 { clocks =3D <&k3_clks 353 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart5: serial@2850000 { @@ -130,6 +135,7 @@ main_uart5: serial@2850000 { clocks =3D <&k3_clks 354 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart6: serial@2860000 { @@ -140,6 +146,7 @@ main_uart6: serial@2860000 { clocks =3D <&k3_clks 355 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart7: serial@2870000 { @@ -150,6 +157,7 @@ main_uart7: serial@2870000 { clocks =3D <&k3_clks 356 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart8: serial@2880000 { @@ -160,6 +168,7 @@ main_uart8: serial@2880000 { clocks =3D <&k3_clks 357 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_uart9: serial@2890000 { @@ -170,6 +179,7 @@ main_uart9: serial@2890000 { clocks =3D <&k3_clks 358 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_gpio0: gpio@600000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 4d1bfabd1313a..3de4218e8e125 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -91,6 +91,7 @@ wkup_uart0: serial@42300000 { clocks =3D <&k3_clks 359 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcu_uart0: serial@40a00000 { @@ -101,6 +102,7 @@ mcu_uart0: serial@40a00000 { clocks =3D <&k3_clks 149 3>; clock-names =3D "fclk"; power-domains =3D <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 wkup_gpio0: gpio@42110000 { --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F5CBC4332F for ; Thu, 20 Oct 2022 16:04:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231226AbiJTQEg (ORCPT ); Thu, 20 Oct 2022 12:04:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230488AbiJTQDg (ORCPT ); Thu, 20 Oct 2022 12:03:36 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36EC01C6BDC; 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Thu, 20 Oct 2022 11:03:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:12 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363G059665; Thu, 20 Oct 2022 11:03:11 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 08/12] arm64: dts: ti: k3-j721e: Enable Mailbox nodes at the board level Date: Thu, 20 Oct 2022 11:03:01 -0500 Message-ID: <20221020160305.18711-9-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Mailbox nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 12 ++++++++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 33 ++++----------------- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 33 ++++----------------- 3 files changed, 22 insertions(+), 56 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 646885dd9f533..5c4a0e28cde56 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -176,6 +176,7 @@ mailbox0_cluster0: mailbox@31f80000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster1: mailbox@31f81000 { @@ -185,6 +186,7 @@ mailbox0_cluster1: mailbox@31f81000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster2: mailbox@31f82000 { @@ -194,6 +196,7 @@ mailbox0_cluster2: mailbox@31f82000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster3: mailbox@31f83000 { @@ -203,6 +206,7 @@ mailbox0_cluster3: mailbox@31f83000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster4: mailbox@31f84000 { @@ -212,6 +216,7 @@ mailbox0_cluster4: mailbox@31f84000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster5: mailbox@31f85000 { @@ -221,6 +226,7 @@ mailbox0_cluster5: mailbox@31f85000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster6: mailbox@31f86000 { @@ -230,6 +236,7 @@ mailbox0_cluster6: mailbox@31f86000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster7: mailbox@31f87000 { @@ -239,6 +246,7 @@ mailbox0_cluster7: mailbox@31f87000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster8: mailbox@31f88000 { @@ -248,6 +256,7 @@ mailbox0_cluster8: mailbox@31f88000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster9: mailbox@31f89000 { @@ -257,6 +266,7 @@ mailbox0_cluster9: mailbox@31f89000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster10: mailbox@31f8a000 { @@ -266,6 +276,7 @@ mailbox0_cluster10: mailbox@31f8a000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster11: mailbox@31f8b000 { @@ -275,6 +286,7 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 main_ringacc: ringacc@3c000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index b7cb34007fb68..78aa4aa4de570 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -883,6 +883,7 @@ &ufs_wrapper { }; =20 &mailbox0_cluster0 { + status =3D "okay"; interrupts =3D <436>; =20 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { @@ -897,6 +898,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { }; =20 &mailbox0_cluster1 { + status =3D "okay"; interrupts =3D <432>; =20 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { @@ -911,6 +913,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { }; =20 &mailbox0_cluster2 { + status =3D "okay"; interrupts =3D <428>; =20 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { @@ -925,6 +928,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { }; =20 &mailbox0_cluster3 { + status =3D "okay"; interrupts =3D <424>; =20 mbox_c66_0: mbox-c66-0 { @@ -939,6 +943,7 @@ mbox_c66_1: mbox-c66-1 { }; =20 &mailbox0_cluster4 { + status =3D "okay"; interrupts =3D <420>; =20 mbox_c71_0: mbox-c71-0 { @@ -947,34 +952,6 @@ mbox_c71_0: mbox-c71-0 { }; }; =20 -&mailbox0_cluster5 { - status =3D "disabled"; -}; - -&mailbox0_cluster6 { - status =3D "disabled"; -}; - -&mailbox0_cluster7 { - status =3D "disabled"; -}; - -&mailbox0_cluster8 { - status =3D "disabled"; -}; - -&mailbox0_cluster9 { - status =3D "disabled"; -}; - -&mailbox0_cluster10 { - status =3D "disabled"; -}; - -&mailbox0_cluster11 { - status =3D "disabled"; -}; - &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/= dts/ti/k3-j721e-som-p0.dtsi index e36335232cf8c..e289d5b443568 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -186,6 +186,7 @@ flash@0 { }; =20 &mailbox0_cluster0 { + status =3D "okay"; interrupts =3D <436>; =20 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { @@ -200,6 +201,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { }; =20 &mailbox0_cluster1 { + status =3D "okay"; interrupts =3D <432>; =20 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { @@ -214,6 +216,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { }; =20 &mailbox0_cluster2 { + status =3D "okay"; interrupts =3D <428>; =20 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { @@ -228,6 +231,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { }; =20 &mailbox0_cluster3 { + status =3D "okay"; interrupts =3D <424>; =20 mbox_c66_0: mbox-c66-0 { @@ -242,6 +246,7 @@ mbox_c66_1: mbox-c66-1 { }; =20 &mailbox0_cluster4 { + status =3D "okay"; interrupts =3D <420>; =20 mbox_c71_0: mbox-c71-0 { @@ -250,34 +255,6 @@ mbox_c71_0: mbox-c71-0 { }; }; =20 -&mailbox0_cluster5 { - status =3D "disabled"; -}; - -&mailbox0_cluster6 { - status =3D "disabled"; -}; - -&mailbox0_cluster7 { - status =3D "disabled"; -}; - -&mailbox0_cluster8 { - status =3D "disabled"; -}; - -&mailbox0_cluster9 { - status =3D "disabled"; -}; - -&mailbox0_cluster10 { - status =3D "disabled"; -}; - -&mailbox0_cluster11 { - status =3D "disabled"; -}; - &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51B0BC433FE for ; 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Thu, 20 Oct 2022 11:03:13 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:12 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363H059665; Thu, 20 Oct 2022 11:03:12 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 09/12] arm64: dts: ti: k3-j7200: Enable Mailbox nodes at the board level Date: Thu, 20 Oct 2022 11:03:02 -0500 Message-ID: <20221020160305.18711-10-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Mailbox nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 12 ++++++ arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 42 +-------------------- 2 files changed, 14 insertions(+), 40 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index 610d042ffa1d6..138381f43ce40 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -142,6 +142,7 @@ mailbox0_cluster0: mailbox@31f80000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster1: mailbox@31f81000 { @@ -151,6 +152,7 @@ mailbox0_cluster1: mailbox@31f81000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster2: mailbox@31f82000 { @@ -160,6 +162,7 @@ mailbox0_cluster2: mailbox@31f82000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster3: mailbox@31f83000 { @@ -169,6 +172,7 @@ mailbox0_cluster3: mailbox@31f83000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster4: mailbox@31f84000 { @@ -178,6 +182,7 @@ mailbox0_cluster4: mailbox@31f84000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster5: mailbox@31f85000 { @@ -187,6 +192,7 @@ mailbox0_cluster5: mailbox@31f85000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster6: mailbox@31f86000 { @@ -196,6 +202,7 @@ mailbox0_cluster6: mailbox@31f86000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster7: mailbox@31f87000 { @@ -205,6 +212,7 @@ mailbox0_cluster7: mailbox@31f87000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster8: mailbox@31f88000 { @@ -214,6 +222,7 @@ mailbox0_cluster8: mailbox@31f88000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster9: mailbox@31f89000 { @@ -223,6 +232,7 @@ mailbox0_cluster9: mailbox@31f89000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster10: mailbox@31f8a000 { @@ -232,6 +242,7 @@ mailbox0_cluster10: mailbox@31f8a000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster11: mailbox@31f8b000 { @@ -241,6 +252,7 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 main_ringacc: ringacc@3c000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/= dts/ti/k3-j7200-som-p0.dtsi index 2d615c3e9fa10..fa44ed4c17d50 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -144,6 +144,7 @@ flash@0,0 { }; =20 &mailbox0_cluster0 { + status =3D "okay"; interrupts =3D <436>; =20 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { @@ -158,6 +159,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { }; =20 &mailbox0_cluster1 { + status =3D "okay"; interrupts =3D <432>; =20 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { @@ -171,46 +173,6 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { }; }; =20 -&mailbox0_cluster2 { - status =3D "disabled"; -}; - -&mailbox0_cluster3 { - status =3D "disabled"; -}; - -&mailbox0_cluster4 { - status =3D "disabled"; -}; - -&mailbox0_cluster5 { - status =3D "disabled"; -}; - -&mailbox0_cluster6 { - status =3D "disabled"; -}; - -&mailbox0_cluster7 { - status =3D "disabled"; -}; - -&mailbox0_cluster8 { - status =3D "disabled"; -}; - -&mailbox0_cluster9 { - status =3D "disabled"; -}; - -&mailbox0_cluster10 { - status =3D "disabled"; -}; - -&mailbox0_cluster11 { - status =3D "disabled"; -}; - &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76474C43219 for ; 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Thu, 20 Oct 2022 11:03:14 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:13 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:13 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363I059665; Thu, 20 Oct 2022 11:03:13 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 10/12] arm64: dts: ti: k3-j721s2: Enable Mailbox nodes at the board level Date: Thu, 20 Oct 2022 11:03:03 -0500 Message-ID: <20221020160305.18711-11-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Mailbox nodes defined in the top-level J721s2 SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 24 +++++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 96 -------------------- 2 files changed, 24 insertions(+), 96 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 7267a7b665ce8..ddc54921d34f6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -438,6 +438,7 @@ mailbox0_cluster0: mailbox@31f80000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster1: mailbox@31f81000 { @@ -447,6 +448,7 @@ mailbox0_cluster1: mailbox@31f81000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster2: mailbox@31f82000 { @@ -456,6 +458,7 @@ mailbox0_cluster2: mailbox@31f82000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster3: mailbox@31f83000 { @@ -465,6 +468,7 @@ mailbox0_cluster3: mailbox@31f83000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster4: mailbox@31f84000 { @@ -474,6 +478,7 @@ mailbox0_cluster4: mailbox@31f84000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster5: mailbox@31f85000 { @@ -483,6 +488,7 @@ mailbox0_cluster5: mailbox@31f85000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster6: mailbox@31f86000 { @@ -492,6 +498,7 @@ mailbox0_cluster6: mailbox@31f86000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster7: mailbox@31f87000 { @@ -501,6 +508,7 @@ mailbox0_cluster7: mailbox@31f87000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster8: mailbox@31f88000 { @@ -510,6 +518,7 @@ mailbox0_cluster8: mailbox@31f88000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster9: mailbox@31f89000 { @@ -519,6 +528,7 @@ mailbox0_cluster9: mailbox@31f89000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster10: mailbox@31f8a000 { @@ -528,6 +538,7 @@ mailbox0_cluster10: mailbox@31f8a000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox0_cluster11: mailbox@31f8b000 { @@ -537,6 +548,7 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster0: mailbox@31f90000 { @@ -546,6 +558,7 @@ mailbox1_cluster0: mailbox@31f90000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster1: mailbox@31f91000 { @@ -555,6 +568,7 @@ mailbox1_cluster1: mailbox@31f91000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster2: mailbox@31f92000 { @@ -564,6 +578,7 @@ mailbox1_cluster2: mailbox@31f92000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster3: mailbox@31f93000 { @@ -573,6 +588,7 @@ mailbox1_cluster3: mailbox@31f93000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster4: mailbox@31f94000 { @@ -582,6 +598,7 @@ mailbox1_cluster4: mailbox@31f94000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster5: mailbox@31f95000 { @@ -591,6 +608,7 @@ mailbox1_cluster5: mailbox@31f95000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster6: mailbox@31f96000 { @@ -600,6 +618,7 @@ mailbox1_cluster6: mailbox@31f96000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster7: mailbox@31f97000 { @@ -609,6 +628,7 @@ mailbox1_cluster7: mailbox@31f97000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster8: mailbox@31f98000 { @@ -618,6 +638,7 @@ mailbox1_cluster8: mailbox@31f98000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster9: mailbox@31f99000 { @@ -627,6 +648,7 @@ mailbox1_cluster9: mailbox@31f99000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster10: mailbox@31f9a000 { @@ -636,6 +658,7 @@ mailbox1_cluster10: mailbox@31f9a000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 mailbox1_cluster11: mailbox@31f9b000 { @@ -645,6 +668,7 @@ mailbox1_cluster11: mailbox@31f9b000 { ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; interrupt-parent =3D <&main_navss_intr>; + status =3D "disabled"; }; =20 main_ringacc: ringacc@3c000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot= /dts/ti/k3-j721s2-som-p0.dtsi index 76f0ceacb6d46..d25f38d896c01 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -77,99 +77,3 @@ &main_mcan16 { pinctrl-names =3D "default"; phys =3D <&transceiver0>; }; - -&mailbox0_cluster0 { - status =3D "disabled"; -}; - -&mailbox0_cluster1 { - status =3D "disabled"; -}; - -&mailbox0_cluster2 { - status =3D "disabled"; -}; - -&mailbox0_cluster3 { - status =3D "disabled"; -}; - -&mailbox0_cluster4 { - status =3D "disabled"; -}; - -&mailbox0_cluster5 { - status =3D "disabled"; -}; - -&mailbox0_cluster6 { - status =3D "disabled"; -}; - -&mailbox0_cluster7 { - status =3D "disabled"; -}; - -&mailbox0_cluster8 { - status =3D "disabled"; -}; - -&mailbox0_cluster9 { - status =3D "disabled"; -}; - -&mailbox0_cluster10 { - status =3D "disabled"; -}; - -&mailbox0_cluster11 { - status =3D "disabled"; -}; - -&mailbox1_cluster0 { - status =3D "disabled"; -}; - -&mailbox1_cluster1 { - status =3D "disabled"; -}; - -&mailbox1_cluster2 { - status =3D "disabled"; -}; - -&mailbox1_cluster3 { - status =3D "disabled"; -}; - -&mailbox1_cluster4 { - status =3D "disabled"; -}; - -&mailbox1_cluster5 { - status =3D "disabled"; -}; - -&mailbox1_cluster6 { - status =3D "disabled"; -}; - -&mailbox1_cluster7 { - status =3D "disabled"; -}; - -&mailbox1_cluster8 { - status =3D "disabled"; -}; - -&mailbox1_cluster9 { - status =3D "disabled"; -}; - -&mailbox1_cluster10 { - status =3D "disabled"; -}; - -&mailbox1_cluster11 { - status =3D "disabled"; -}; --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 300EAC433FE for ; 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Thu, 20 Oct 2022 11:03:14 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:14 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:14 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363J059665; Thu, 20 Oct 2022 11:03:13 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 11/12] arm64: dts: ti: k3-j721s2: Enable MCAN nodes at the board level Date: Thu, 20 Oct 2022 11:03:04 -0500 Message-ID: <20221020160305.18711-12-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" MCAN nodes defined in the top-level J721s2 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the MCAN nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721s2-common-proc-board.dts | 70 +------------------ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 18 +++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 + arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 1 + 4 files changed, 23 insertions(+), 68 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/= arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 9f1a0ca4dc372..3f4106f76893b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -321,81 +321,15 @@ &cpsw_port1 { }; =20 &mcu_mcan0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&mcu_mcan0_pins_default>; phys =3D <&transceiver1>; }; =20 &mcu_mcan1 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&mcu_mcan1_pins_default>; phys =3D <&transceiver2>; }; - -&main_mcan0 { - status =3D "disabled"; -}; - -&main_mcan1 { - status =3D "disabled"; -}; - -&main_mcan2 { - status =3D "disabled"; -}; - -&main_mcan3 { - status =3D "disabled"; -}; - -&main_mcan4 { - status =3D "disabled"; -}; - -&main_mcan5 { - status =3D "disabled"; -}; - -&main_mcan6 { - status =3D "disabled"; -}; - -&main_mcan7 { - status =3D "disabled"; -}; - -&main_mcan8 { - status =3D "disabled"; -}; - -&main_mcan9 { - status =3D "disabled"; -}; - -&main_mcan10 { - status =3D "disabled"; -}; - -&main_mcan11 { - status =3D "disabled"; -}; - -&main_mcan12 { - status =3D "disabled"; -}; - -&main_mcan13 { - status =3D "disabled"; -}; - -&main_mcan14 { - status =3D "disabled"; -}; - -&main_mcan15 { - status =3D "disabled"; -}; - -&main_mcan17 { - status =3D "disabled"; -}; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index ddc54921d34f6..1c18d6df6361a 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -732,6 +732,7 @@ main_mcan0: can@2701000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan1: can@2711000 { @@ -746,6 +747,7 @@ main_mcan1: can@2711000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan2: can@2721000 { @@ -760,6 +762,7 @@ main_mcan2: can@2721000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan3: can@2731000 { @@ -774,6 +777,7 @@ main_mcan3: can@2731000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan4: can@2741000 { @@ -788,6 +792,7 @@ main_mcan4: can@2741000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan5: can@2751000 { @@ -802,6 +807,7 @@ main_mcan5: can@2751000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan6: can@2761000 { @@ -816,6 +822,7 @@ main_mcan6: can@2761000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan7: can@2771000 { @@ -830,6 +837,7 @@ main_mcan7: can@2771000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan8: can@2781000 { @@ -844,6 +852,7 @@ main_mcan8: can@2781000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan9: can@2791000 { @@ -858,6 +867,7 @@ main_mcan9: can@2791000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan10: can@27a1000 { @@ -872,6 +882,7 @@ main_mcan10: can@27a1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan11: can@27b1000 { @@ -886,6 +897,7 @@ main_mcan11: can@27b1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan12: can@27c1000 { @@ -900,6 +912,7 @@ main_mcan12: can@27c1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan13: can@27d1000 { @@ -914,6 +927,7 @@ main_mcan13: can@27d1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan14: can@2681000 { @@ -928,6 +942,7 @@ main_mcan14: can@2681000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan15: can@2691000 { @@ -942,6 +957,7 @@ main_mcan15: can@2691000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan16: can@26a1000 { @@ -956,6 +972,7 @@ main_mcan16: can@26a1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 main_mcan17: can@26b1000 { @@ -970,5 +987,6 @@ main_mcan17: can@26b1000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 3de4218e8e125..d1dd40a6e42a4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -182,6 +182,7 @@ mcu_mcan0: can@40528000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 mcu_mcan1: can@40568000 { @@ -196,6 +197,7 @@ mcu_mcan1: can@40568000 { ; interrupt-names =3D "int0", "int1"; bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; }; =20 mcu_navss: bus@28380000{ diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot= /dts/ti/k3-j721s2-som-p0.dtsi index d25f38d896c01..a2cb0916e4a2f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -73,6 +73,7 @@ exp_som: gpio@21 { }; =20 &main_mcan16 { + status =3D "okay"; pinctrl-0 =3D <&main_mcan16_pins_default>; pinctrl-names =3D "default"; phys =3D <&transceiver0>; --=20 2.37.3 From nobody Tue Apr 7 23:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2631C4332F for ; Thu, 20 Oct 2022 16:03:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230478AbiJTQDp (ORCPT ); Thu, 20 Oct 2022 12:03:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230456AbiJTQDa (ORCPT ); Thu, 20 Oct 2022 12:03:30 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 551751BA1C8; Thu, 20 Oct 2022 09:03:28 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29KG3FjZ111512; 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Thu, 20 Oct 2022 11:03:15 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363K059665; Thu, 20 Oct 2022 11:03:14 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 12/12] arm64: dts: ti: k3-j721s2: Enable I2C nodes at the board level Date: Thu, 20 Oct 2022 11:03:05 -0500 Message-ID: <20221020160305.18711-13-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" I2C nodes defined in the top-level J721s2 SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the I2C nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Acked-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- .../dts/ti/k3-j721s2-common-proc-board.dts | 24 ------------------- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 +++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 1 + 4 files changed, 10 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/= arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 3f4106f76893b..a7aa6cf08acd4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -261,30 +261,6 @@ exp2: gpio@22 { }; }; =20 -&main_i2c1 { - status =3D "disabled"; -}; - -&main_i2c2 { - status =3D "disabled"; -}; - -&main_i2c3 { - status =3D "disabled"; -}; - -&main_i2c4 { - status =3D "disabled"; -}; - -&main_i2c5 { - status =3D "disabled"; -}; - -&main_i2c6 { - status =3D "disabled"; -}; - &main_sdhci0 { /* eMMC */ non-removable; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 1c18d6df6361a..d1ec261103761 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -266,6 +266,7 @@ main_i2c1: i2c@2010000 { clocks =3D <&k3_clks 215 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 215 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c2: i2c@2020000 { @@ -277,6 +278,7 @@ main_i2c2: i2c@2020000 { clocks =3D <&k3_clks 216 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 216 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c3: i2c@2030000 { @@ -288,6 +290,7 @@ main_i2c3: i2c@2030000 { clocks =3D <&k3_clks 217 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 217 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c4: i2c@2040000 { @@ -299,6 +302,7 @@ main_i2c4: i2c@2040000 { clocks =3D <&k3_clks 218 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 218 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c5: i2c@2050000 { @@ -310,6 +314,7 @@ main_i2c5: i2c@2050000 { clocks =3D <&k3_clks 219 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_i2c6: i2c@2060000 { @@ -321,6 +326,7 @@ main_i2c6: i2c@2060000 { clocks =3D <&k3_clks 220 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 main_sdhci0: mmc@4f80000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index d1dd40a6e42a4..3264b8e8faea5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -146,6 +146,7 @@ wkup_i2c0: i2c@42120000 { clocks =3D <&k3_clks 223 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcu_i2c0: i2c@40b00000 { @@ -157,6 +158,7 @@ mcu_i2c0: i2c@40b00000 { clocks =3D <&k3_clks 221 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcu_i2c1: i2c@40b10000 { @@ -168,6 +170,7 @@ mcu_i2c1: i2c@40b10000 { clocks =3D <&k3_clks 222 1>; clock-names =3D "fck"; power-domains =3D <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; }; =20 mcu_mcan0: can@40528000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot= /dts/ti/k3-j721s2-som-p0.dtsi index a2cb0916e4a2f..6930efff8a5a3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -56,6 +56,7 @@ J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */ }; =20 &main_i2c0 { + status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c0_pins_default>; clock-frequency =3D <400000>; --=20 2.37.3