From nobody Fri Oct 17 10:32:13 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4725C4321E for ; Wed, 19 Oct 2022 08:50:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231567AbiJSIuw (ORCPT ); Wed, 19 Oct 2022 04:50:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231604AbiJSIss (ORCPT ); Wed, 19 Oct 2022 04:48:48 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0856900FE; Wed, 19 Oct 2022 01:46:36 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8317361830; Wed, 19 Oct 2022 08:46:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9B759C433D6; Wed, 19 Oct 2022 08:46:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1666169192; bh=sNHKf57xcO6JHt0hLxrL3agbC2C9zRzCaCSiO+r2D84=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=0RGhvzHBGJHO8LY4GvfO28dAo8Zb22uX4VpDMQ6tILdlQKdVegacUZ9gJEclZHW/n driAjJZS+iwV3/PIARjs4V3YSlt3fbN5PUUE+Tk/eT0TtTlwmnnxPQK1spYXEdqcjs gwJdcl2z6gozgNlKpulLJTeUgtuBfPssWjv8mEEs= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Juha-Pekka Heikkila , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Tvrtko Ursulin Subject: [PATCH 6.0 188/862] drm/i915: Fix watermark calculations for DG2 CCS+CC modifier Date: Wed, 19 Oct 2022 10:24:35 +0200 Message-Id: <20221019083258.276391136@linuxfoundation.org> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20221019083249.951566199@linuxfoundation.org> References: <20221019083249.951566199@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ville Syrj=C3=A4l=C3=A4 commit b2e3a1af8cce4117de06ff1a4eab0749753ede27 upstream. Take the DG2 CCS+CC modifier into account when calculating the watermarks. Othwerwise we'll calculate the watermarks thinking this tile-4 modifier is linear. The rc_surface part is actually a nop since that is not used for any glk+ platform. Cc: stable@vger.kernel.org Fixes: 680025dcc400 ("drm/i915/dg2: Add support for DG2 clear color compres= sion") Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-6-v= ille.syrjala@linux.intel.com (cherry picked from commit 334810f82024815283a6e7febd3d2de1fed6c232) Signed-off-by: Tvrtko Ursulin Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/intel_pm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5313,7 +5313,8 @@ skl_compute_wm_params(const struct intel modifier =3D=3D I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS || modifier =3D=3D I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC || modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_RC_CCS || - modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_MC_CCS; + modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_MC_CCS || + modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC; wp->x_tiled =3D modifier =3D=3D I915_FORMAT_MOD_X_TILED; wp->rc_surface =3D modifier =3D=3D I915_FORMAT_MOD_Y_TILED_CCS || modifier =3D=3D I915_FORMAT_MOD_Yf_TILED_CCS || @@ -5321,7 +5322,8 @@ skl_compute_wm_params(const struct intel modifier =3D=3D I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS || modifier =3D=3D I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC || modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_RC_CCS || - modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_MC_CCS; + modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_MC_CCS || + modifier =3D=3D I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC; wp->is_planar =3D intel_format_info_is_yuv_semiplanar(format, modifier); =20 wp->width =3D width;