From nobody Tue Apr 7 20:39:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F916C433FE for ; Wed, 19 Oct 2022 14:42:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229633AbiJSOmn convert rfc822-to-8bit (ORCPT ); Wed, 19 Oct 2022 10:42:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230416AbiJSOmV (ORCPT ); Wed, 19 Oct 2022 10:42:21 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 510C0192D87; Wed, 19 Oct 2022 07:27:54 -0700 (PDT) Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id 6AECBFF805; Wed, 19 Oct 2022 14:27:50 +0000 (UTC) From: Quentin Schulz To: foss+kernel@0leil.net, Krzysztof Kozlowski , Heiko Stuebner , Rob Herring Cc: Quentin Schulz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Jakob Unterwurzacher , linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH] arm64: dts: rockchip: lower rk3399-puma-haikou SD controller clock frequency Date: Wed, 19 Oct 2022 16:27:27 +0200 Message-Id: <20221019-upstream-puma-sd-40mhz-v1-0-754a76421518@theobroma-systems.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.10.1 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Quentin Schulz From: Jakob Unterwurzacher CRC errors (code -84 EILSEQ) have been observed for some SanDisk Ultra A1 cards when running at 50MHz. Waveform analysis suggest that the level shifters that are used on the RK3399-Q7 module for voltage translation between 3.0 and 3.3V don't handle clock rates at or above 48MHz properly. Back off to 40MHz for some safety margin. Cc: stable@vger.kernel.org Fixes: 60fd9f72ce8a ("arm64: dts: rockchip: add Haikou baseboard with RK339= 9-Q7 SoM") Signed-off-by: Jakob Unterwurzacher Signed-off-by: Quentin Schulz --- We've been carrying this patch downstream for years and completely forgot to upstream it. This is now done. To: Rob Herring To: Krzysztof Kozlowski To: Heiko Stuebner Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: Jakob Unterwurzacher --- arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3399-puma-haikou.dts index 04c752f49be9..115c14c0a3c6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts @@ -207,7 +207,7 @@ &sdmmc { cap-sd-highspeed; cd-gpios =3D <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; disable-wp; - max-frequency =3D <150000000>; + max-frequency =3D <40000000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; vmmc-supply =3D <&vcc3v3_baseboard>; --- base-commit: aae703b02f92bde9264366c545e87cec451de471 change-id: 20221019-upstream-puma-sd-40mhz-b5aef1c351e6 Best regards, --=20 Quentin Schulz