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Tue, 18 Oct 2022 04:12:42 -0700 From: Eli Cohen To: , , , CC: , , , "Eli Cohen" Subject: [PATCH 1/4] vdpa/mlx5: Fix rule forwarding VLAN to TIR Date: Tue, 18 Oct 2022 14:12:29 +0300 Message-ID: <20221018111232.4021-2-elic@nvidia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221018111232.4021-1-elic@nvidia.com> References: <20221018111232.4021-1-elic@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT113:EE_|MN2PR12MB4319:EE_ X-MS-Office365-Filtering-Correlation-Id: 50a9beda-3aa8-480c-1022-08dab0f9b39b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: K53Ol84j8q5eqbX0FCs4Cf3DlMY4lThooX/f8KFI8GeMRKW4gz5RbG2gFwG1V3OKJqZW1sd3hdGQGijPCVdDDYj9oSA8OFczAYfnP4MU0ysVt3zbkAvZ7ifGAEC6uK/VJHXLYyvm/0GmUI+Biw+e1E2abjLVOTThwfbsNweqGNI6fne+7mBx8Nh8/4Ud16r25tBhGBQOhxtyJIAwwnBNx70cQlA7R+99dqNu54JsRROSOaR4CFkwy7VBiZEY4TbJSU0KX21vXLdw84mHigAvrk4qTuhKklkh1Ce+BLnMAlU8RcxF45Eo7xvoBAe16P/1us0tJM/r5/iAe+vZXTShxZIbjmt8KKYSeIadIpaB5EIyLU6vmeIFDxXKfrRlm7/D656klzlEbx9mBG0Fa/kzl9EYMrzrIpo3qzmaTI35Ars5mkgJOObsIKta15JRJWjf9lHNV3XtrbFKHc3UYIuCMm3RHo6m9zFaLk7a0ArKHV3kPQJSQWkhG3EyrI4n2asW6FKmwBR5e4vTDL6I3851HY5Y9IHpjCem8eA3osE6TCv4DUSFb45U6DClzBOj5EVISsW837urcoliXyrbc97QyvCrpQ8T7wrbLm+h/s2KEAqSf4VH8eOi/VOCjvSLdbsSyxXAnYXS7Dk2zGpIKcrY2uhMq1OWPeOsk83MlT+6s0Br9Q5pedFKI81K0eUdRQzCo4xBNxBQe0yp3g19YagxWX90GYFLhtuidzyezeCKdcpAiLXdgMdR8SOVOawApYiZkVjs1JPK02Csnb6QH9B9NA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(376002)(39860400002)(346002)(136003)(396003)(451199015)(40470700004)(36840700001)(46966006)(2616005)(26005)(1076003)(8676002)(70586007)(70206006)(4326008)(40480700001)(316002)(54906003)(40460700003)(5660300002)(41300700001)(36756003)(8936002)(2906002)(7696005)(6666004)(107886003)(478600001)(110136005)(356005)(7636003)(86362001)(82310400005)(83380400001)(426003)(186003)(336012)(36860700001)(47076005)(82740400003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Oct 2022 11:12:53.0632 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 50a9beda-3aa8-480c-1022-08dab0f9b39b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT113.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4319 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Set the VLAN id to the header values field instead of overwriting the headers criteria field. Before this fix, VLAN filtering would not really work and tagged packets would be forwarded unfiltered to the TIR. Fixes: baf2ad3f6a98 ("vdpa/mlx5: Add RX MAC VLAN filter support") Signed-off-by: Eli Cohen Reviewed-by: Si-Wei Liu --- drivers/vdpa/mlx5/net/mlx5_vnet.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5= _vnet.c index 90913365def4..dd29fdfc24ed 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -1472,7 +1472,7 @@ static int mlx5_vdpa_add_mac_vlan_rules(struct mlx5_v= dpa_net *ndev, u8 *mac, if (tagged) { MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1); MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, first_vid); - MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, vid); + MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, vid); } flow_act.action =3D MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; dest.type =3D MLX5_FLOW_DESTINATION_TYPE_TIR; --=20 2.35.1 From nobody Tue Apr 7 17:33:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F9F3C4332F for ; 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Tue, 18 Oct 2022 04:12:44 -0700 From: Eli Cohen To: , , , CC: , , , "Eli Cohen" Subject: [PATCH 2/4] vdpa/mlx5: Move some definitions to a new header file Date: Tue, 18 Oct 2022 14:12:30 +0300 Message-ID: <20221018111232.4021-3-elic@nvidia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221018111232.4021-1-elic@nvidia.com> References: <20221018111232.4021-1-elic@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT061:EE_|SA1PR12MB5613:EE_ X-MS-Office365-Filtering-Correlation-Id: 167d6632-c02b-47bf-48ec-08dab0f9b592 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: c+ot3ua6bvi7gdHdb+Nsuzl14aPyW6UV39mcIs4U1QiqPkgu/erC0Wu/WIK8go4A3gEiutLOxzYuWz9Z7qxMDJXyADyCqWICyPiw5H59O54TS5AvCtRKaJQm5q0z2GuNGIbCc1Up4Sw+WLkBIZGtAqhvtfatBcQBS6l2WSiAOWv/FZGzYcTITIqlT7pgqtwSYOYT0xjwiDXkc+7ANGIs+VjkATBponh+fJKgR//7RDyG3QmpOGqz8iJ5pno3aOELUuO+tTKkI0g6jqINSGb5r1hTqQkUxnmXXVwUOFizckaTFbs6JDT5H0tTT/9thYcKMHwOzxpmd/JPo0jdCliSNHZ6N3q9AoYPi8RZyGmn83nBQaxHOHhghhfG9cXU0vNbGqcp0L9jiF2dp/E7WYH4UyVjIvoSbL/gIXGpiFoVM71p16SPTnqkOP8DuTw5HcN5/MO1Bx6KA3tCW0pniE14nqfhxMzWB9wEaTH/xeFEcqIu3h5lsQHmrPFADzH+RvUJOFzyuLZ27qWyUbG5BJFkmTMSG8xnLAIvJOH+YPxnsLaAAn/2lIBZy8dNYWxFsGJepJB8f1VcLSPP3Ib9iuEcqAlEW9lCM6J/lB8N6r909LGmnoeNgKKfkPzi+iGs364hmQZVgVK3GL2Dr75XX8el9nGzkEIkFnYKAwnxLm+buIe7TPuIswQvaG2ZxBDIGRFA1/+HqqeMekFUgAjyUMukWeYW/WyAbD0KWvGBzvm821nk2Hm31bOCQNosvN3Q59Z3kClu6iPPhHVuInRmpvB8yA== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(396003)(346002)(39860400002)(136003)(376002)(451199015)(46966006)(40470700004)(36840700001)(316002)(36860700001)(8936002)(26005)(86362001)(2616005)(5660300002)(40480700001)(36756003)(4326008)(8676002)(70206006)(70586007)(336012)(107886003)(6666004)(41300700001)(186003)(2906002)(1076003)(7696005)(426003)(47076005)(82740400003)(54906003)(110136005)(83380400001)(356005)(478600001)(82310400005)(40460700003)(7636003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Oct 2022 11:12:56.5017 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 167d6632-c02b-47bf-48ec-08dab0f9b592 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT061.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5613 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Move some definitions from mlx5_vnet.c to newly added header file mlx5_vnet.h. We need these definitions for the following patches that add debugfs tree to expose information vital for debug. Signed-off-by: Eli Cohen --- drivers/vdpa/mlx5/net/mlx5_vnet.c | 45 +------------------------ drivers/vdpa/mlx5/net/mlx5_vnet.h | 55 +++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+), 44 deletions(-) create mode 100644 drivers/vdpa/mlx5/net/mlx5_vnet.h diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5= _vnet.c index dd29fdfc24ed..64fdb940380f 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -18,15 +18,12 @@ #include #include #include "mlx5_vdpa.h" +#include "mlx5_vnet.h" =20 MODULE_AUTHOR("Eli Cohen "); MODULE_DESCRIPTION("Mellanox VDPA driver"); MODULE_LICENSE("Dual BSD/GPL"); =20 -#define to_mlx5_vdpa_ndev(__mvdev) = \ - container_of(__mvdev, struct mlx5_vdpa_net, mvdev) -#define to_mvdev(__vdev) container_of((__vdev), struct mlx5_vdpa_dev, vdev) - #define VALID_FEATURES_MASK = \ (BIT_ULL(VIRTIO_NET_F_CSUM) | BIT_ULL(VIRTIO_NET_F_GUEST_CSUM) | = \ BIT_ULL(VIRTIO_NET_F_CTRL_GUEST_OFFLOADS) | BIT_ULL(VIRTIO_NET_F_MTU) | = BIT_ULL(VIRTIO_NET_F_MAC) | \ @@ -50,14 +47,6 @@ MODULE_LICENSE("Dual BSD/GPL"); =20 #define MLX5V_UNTAGGED 0x1000 =20 -struct mlx5_vdpa_net_resources { - u32 tisn; - u32 tdn; - u32 tirn; - u32 rqtn; - bool valid; -}; - struct mlx5_vdpa_cq_buf { struct mlx5_frag_buf_ctrl fbc; struct mlx5_frag_buf frag_buf; @@ -146,38 +135,6 @@ static bool is_index_valid(struct mlx5_vdpa_dev *mvdev= , u16 idx) return idx <=3D mvdev->max_idx; } =20 -#define MLX5V_MACVLAN_SIZE 256 - -struct mlx5_vdpa_net { - struct mlx5_vdpa_dev mvdev; - struct mlx5_vdpa_net_resources res; - struct virtio_net_config config; - struct mlx5_vdpa_virtqueue *vqs; - struct vdpa_callback *event_cbs; - - /* Serialize vq resources creation and destruction. This is required - * since memory map might change and we need to destroy and create - * resources while driver in operational. - */ - struct rw_semaphore reslock; - struct mlx5_flow_table *rxft; - bool setup; - u32 cur_num_vqs; - u32 rqt_size; - bool nb_registered; - struct notifier_block nb; - struct vdpa_callback config_cb; - struct mlx5_vdpa_wq_ent cvq_ent; - struct hlist_head macvlan_hash[MLX5V_MACVLAN_SIZE]; -}; - -struct macvlan_node { - struct hlist_node hlist; - struct mlx5_flow_handle *ucast_rule; - struct mlx5_flow_handle *mcast_rule; - u64 macvlan; -}; - static void free_resources(struct mlx5_vdpa_net *ndev); static void init_mvqs(struct mlx5_vdpa_net *ndev); static int setup_driver(struct mlx5_vdpa_dev *mvdev); diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.h b/drivers/vdpa/mlx5/net/mlx5= _vnet.h new file mode 100644 index 000000000000..6691c879a6ca --- /dev/null +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserve= d. */ + +#ifndef __MLX5_VNET_H__ +#define __MLX5_VNET_H__ + +#include "mlx5_vdpa.h" + +#define to_mlx5_vdpa_ndev(__mvdev) = \ + container_of(__mvdev, struct mlx5_vdpa_net, mvdev) +#define to_mvdev(__vdev) container_of((__vdev), struct mlx5_vdpa_dev, vdev) + +struct mlx5_vdpa_net_resources { + u32 tisn; + u32 tdn; + u32 tirn; + u32 rqtn; + bool valid; +}; + +#define MLX5V_MACVLAN_SIZE 256 + +struct mlx5_vdpa_net { + struct mlx5_vdpa_dev mvdev; + struct mlx5_vdpa_net_resources res; + struct virtio_net_config config; + struct mlx5_vdpa_virtqueue *vqs; + struct vdpa_callback *event_cbs; + + /* Serialize vq resources creation and destruction. This is required + * since memory map might change and we need to destroy and create + * resources while driver in operational. + */ + struct rw_semaphore reslock; + struct mlx5_flow_table *rxft; + struct dentry *rx_dent; + struct dentry *rx_table_dent; + bool setup; + u32 cur_num_vqs; + u32 rqt_size; + bool nb_registered; + struct notifier_block nb; + struct vdpa_callback config_cb; + struct mlx5_vdpa_wq_ent cvq_ent; + struct hlist_head macvlan_hash[MLX5V_MACVLAN_SIZE]; +}; + +struct macvlan_node { + struct hlist_node hlist; + struct mlx5_flow_handle *ucast_rule; + struct mlx5_flow_handle *mcast_rule; + u64 macvlan; +}; + +#endif /* __MLX5_VNET_H__ */ --=20 2.35.1 From nobody Tue Apr 7 17:33:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F858C4332F for ; Tue, 18 Oct 2022 11:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230048AbiJRLOC (ORCPT ); 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Tue, 18 Oct 2022 04:12:47 -0700 From: Eli Cohen To: , , , CC: , , , "Eli Cohen" Subject: [PATCH 3/4] vdpa/mlx5: Add debugfs subtree Date: Tue, 18 Oct 2022 14:12:31 +0300 Message-ID: <20221018111232.4021-4-elic@nvidia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221018111232.4021-1-elic@nvidia.com> References: <20221018111232.4021-1-elic@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT005:EE_|CO6PR12MB5396:EE_ X-MS-Office365-Filtering-Correlation-Id: 997c95ac-2e83-45c7-9238-08dab0f9b999 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: UdzBVtPcDX+Fj+Jp2yDqgxbf+9tSTkaXk+pz5WSRrpKioRCbnI/JtmOKhH8UHxCWHoQ0YNvVfSquHd/4c4ophhBXntHmbw5F6CYffMk5Kfjb7e1gYeOwxmgKAT24YNHnfxvaCY+ml7Vj4RdoL37Wr3Brk0g/zvGRQuBcan/uogmtOCMeytp4gMUD/+DONjYp34jtHvySa3srAxtLHKCyW87QHNeXeXhcZ7Wv7+DjSgNhFRao+BHnT2TLNOVKqKT+CCpce09rhmaphnTQOW2Pw4GX79lOP7joJJ8Pi1/ttX5IuNuJDBBWj9Kr39XYYvc3UKyrngHviZx0GeC3A1OhTLIj739egwzwDUb3H1doQfEtmDthCOlAuDQhO8ir/pGzxAocO8QdYj+0uGuD0kn74Wb+xAsOkyGVDuBAA5TdcmjtIDH9JWcI+rtMxywSB684u0/mzuv417a3j+UYKFJ2vKoCRT8RU9WlbEBWYrlANtaWTP5iE6QnBdjiuWroD/BYauiJS9NvTrLE4VGX18SKtfeXX64gLruA1hN5OG+4mVoISH3p3Nhv6ywPrxFdVhK2BE2zXVMTO0ZD4USzIFQ+ce2ilZIp0eozLsRjP1CygM/nOeqwgPCIRtipcciMy9XSCiudmTUlPyR/ktsJnmAirn5GPaxH5Fzezz1LDwgngnTvvJp3juIWBLdw9uSny0bm5JMWqkV43n/Kt+MrwLSZ59VgTNCpjdic9AzRF1HaUn53Pyhum1xuj9WjIp9JT9ZOOtK0jSgN8F86K1pjExKOyw== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(396003)(376002)(346002)(39860400002)(136003)(451199015)(46966006)(36840700001)(40470700004)(478600001)(26005)(2616005)(426003)(8936002)(5660300002)(47076005)(70586007)(316002)(70206006)(40480700001)(4326008)(36860700001)(6666004)(107886003)(336012)(40460700003)(8676002)(41300700001)(2906002)(186003)(110136005)(54906003)(86362001)(1076003)(7696005)(36756003)(82740400003)(82310400005)(7636003)(356005)(83380400001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Oct 2022 11:13:03.1041 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 997c95ac-2e83-45c7-9238-08dab0f9b999 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT005.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR12MB5396 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add debugfs subtree and expose flow table ID and TIR number. This information can be used by external tools to do extended troubleshooting. The information can be retrieved like so: $ cat /sys/kernel/debug/mlx5/mlx5_core.sf.1/vdpa-0/rx/table_id $ cat /sys/kernel/debug/mlx5/mlx5_core.sf.1/vdpa-0/rx/tirn Signed-off-by: Eli Cohen Reviewed-by: Si-Wei Liu --- drivers/vdpa/mlx5/Makefile | 2 +- drivers/vdpa/mlx5/net/debug.c | 66 +++++++++++++++++++++++++++++++ drivers/vdpa/mlx5/net/mlx5_vnet.c | 11 ++++++ drivers/vdpa/mlx5/net/mlx5_vnet.h | 9 +++++ 4 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 drivers/vdpa/mlx5/net/debug.c diff --git a/drivers/vdpa/mlx5/Makefile b/drivers/vdpa/mlx5/Makefile index f717978c83bf..e791394c33e3 100644 --- a/drivers/vdpa/mlx5/Makefile +++ b/drivers/vdpa/mlx5/Makefile @@ -1,4 +1,4 @@ subdir-ccflags-y +=3D -I$(srctree)/drivers/vdpa/mlx5/core =20 obj-$(CONFIG_MLX5_VDPA_NET) +=3D mlx5_vdpa.o -mlx5_vdpa-$(CONFIG_MLX5_VDPA_NET) +=3D net/mlx5_vnet.o core/resources.o co= re/mr.o +mlx5_vdpa-$(CONFIG_MLX5_VDPA_NET) +=3D net/mlx5_vnet.o core/resources.o co= re/mr.o net/debug.o diff --git a/drivers/vdpa/mlx5/net/debug.c b/drivers/vdpa/mlx5/net/debug.c new file mode 100644 index 000000000000..95e4801df211 --- /dev/null +++ b/drivers/vdpa/mlx5/net/debug.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB +/* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserve= d. */ + +#include +#include +#include "mlx5_vnet.h" + +static int tirn_show(struct seq_file *file, void *priv) +{ + struct mlx5_vdpa_net *ndev =3D file->private; + + seq_printf(file, "0x%x\n", ndev->res.tirn); + return 0; +} + +DEFINE_SHOW_ATTRIBUTE(tirn); + +void mlx5_vdpa_remove_tirn(struct mlx5_vdpa_net *ndev) +{ + if (ndev->debugfs) + debugfs_remove(ndev->res.tirn_dent); +} + +void mlx5_vdpa_add_tirn(struct mlx5_vdpa_net *ndev) +{ + ndev->res.tirn_dent =3D debugfs_create_file("tirn", 0444, ndev->rx_dent, + ndev, &tirn_fops); +} + +static int rx_flow_table_show(struct seq_file *file, void *priv) +{ + struct mlx5_vdpa_net *ndev =3D file->private; + + seq_printf(file, "0x%x\n", mlx5_flow_table_id(ndev->rxft)); + return 0; +} + +DEFINE_SHOW_ATTRIBUTE(rx_flow_table); + +void mlx5_vdpa_remove_rx_flow_table(struct mlx5_vdpa_net *ndev) +{ + if (ndev->debugfs) + debugfs_remove(ndev->rx_table_dent); +} + +void mlx5_vdpa_add_rx_flow_table(struct mlx5_vdpa_net *ndev) +{ + ndev->rx_table_dent =3D debugfs_create_file("table_id", 0444, ndev->rx_de= nt, + ndev, &rx_flow_table_fops); +} + +void mlx5_vdpa_add_debugfs(struct mlx5_vdpa_net *ndev) +{ + struct mlx5_core_dev *mdev; + + mdev =3D ndev->mvdev.mdev; + ndev->debugfs =3D debugfs_create_dir(dev_name(&ndev->mvdev.vdev.dev), + mlx5_debugfs_get_dev_root(mdev)); + if (!IS_ERR(ndev->debugfs)) + ndev->rx_dent =3D debugfs_create_dir("rx", ndev->debugfs); +} + +void mlx5_vdpa_remove_debugfs(struct dentry *dbg) +{ + debugfs_remove_recursive(dbg); +} diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5= _vnet.c index 64fdb940380f..ee50da33e25b 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -1388,11 +1388,16 @@ static int create_tir(struct mlx5_vdpa_net *ndev) =20 err =3D mlx5_vdpa_create_tir(&ndev->mvdev, in, &ndev->res.tirn); kfree(in); + if (err) + return err; + + mlx5_vdpa_add_tirn(ndev); return err; } =20 static void destroy_tir(struct mlx5_vdpa_net *ndev) { + mlx5_vdpa_remove_tirn(ndev); mlx5_vdpa_destroy_tir(&ndev->mvdev, ndev->res.tirn); } =20 @@ -1576,6 +1581,7 @@ static int setup_steering(struct mlx5_vdpa_net *ndev) mlx5_vdpa_warn(&ndev->mvdev, "failed to create flow table\n"); return PTR_ERR(ndev->rxft); } + mlx5_vdpa_add_rx_flow_table(ndev); =20 err =3D mac_vlan_add(ndev, ndev->config.mac, 0, false); if (err) @@ -1584,6 +1590,7 @@ static int setup_steering(struct mlx5_vdpa_net *ndev) return 0; =20 err_add: + mlx5_vdpa_remove_rx_flow_table(ndev); mlx5_destroy_flow_table(ndev->rxft); return err; } @@ -1591,6 +1598,7 @@ static int setup_steering(struct mlx5_vdpa_net *ndev) static void teardown_steering(struct mlx5_vdpa_net *ndev) { clear_mac_vlan_table(ndev); + mlx5_vdpa_remove_rx_flow_table(ndev); mlx5_destroy_flow_table(ndev->rxft); } =20 @@ -3167,6 +3175,7 @@ static int mlx5_vdpa_dev_add(struct vdpa_mgmt_dev *v_= mdev, const char *name, if (err) goto err_reg; =20 + mlx5_vdpa_add_debugfs(ndev); mgtdev->ndev =3D ndev; return 0; =20 @@ -3193,6 +3202,8 @@ static void mlx5_vdpa_dev_del(struct vdpa_mgmt_dev *v= _mdev, struct vdpa_device * struct mlx5_vdpa_net *ndev =3D to_mlx5_vdpa_ndev(mvdev); struct workqueue_struct *wq; =20 + mlx5_vdpa_remove_debugfs(ndev->debugfs); + ndev->debugfs =3D NULL; if (ndev->nb_registered) { mlx5_notifier_unregister(mvdev->mdev, &ndev->nb); ndev->nb_registered =3D false; diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.h b/drivers/vdpa/mlx5/net/mlx5= _vnet.h index 6691c879a6ca..f2cef3925e5b 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.h +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.h @@ -16,6 +16,7 @@ struct mlx5_vdpa_net_resources { u32 tirn; u32 rqtn; bool valid; + struct dentry *tirn_dent; }; =20 #define MLX5V_MACVLAN_SIZE 256 @@ -43,6 +44,7 @@ struct mlx5_vdpa_net { struct vdpa_callback config_cb; struct mlx5_vdpa_wq_ent cvq_ent; struct hlist_head macvlan_hash[MLX5V_MACVLAN_SIZE]; + struct dentry *debugfs; }; =20 struct macvlan_node { @@ -52,4 +54,11 @@ struct macvlan_node { u64 macvlan; }; =20 +void mlx5_vdpa_add_debugfs(struct mlx5_vdpa_net *ndev); +void mlx5_vdpa_remove_debugfs(struct dentry *dbg); +void mlx5_vdpa_add_rx_flow_table(struct mlx5_vdpa_net *ndev); +void mlx5_vdpa_remove_rx_flow_table(struct mlx5_vdpa_net *ndev); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Oct 2022 11:13:01.6492 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6bfbe015-bce2-4829-ba9b-08dab0f9b8a3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4400 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" For each interface, either VLAN tagged or untagged, add two hardware counters: one for unicast and another for multicast. The counters count RX packets and bytes and can be read through debugfs: $ cat /sys/kernel/debug/mlx5/mlx5_core.sf.1/vdpa-0/rx/untagged/mcast/packets $ cat /sys/kernel/debug/mlx5/mlx5_core.sf.1/vdpa-0/rx/untagged/ucast/bytes This feature is controlled via the config option MLX5_VDPA_STEERING_DEBUG. It is off by default as it may have some impact on performance. Signed-off-by: Eli Cohen --- drivers/vdpa/Kconfig | 12 ++++ drivers/vdpa/mlx5/net/debug.c | 82 +++++++++++++++++++++++++++ drivers/vdpa/mlx5/net/mlx5_vnet.c | 94 +++++++++++++++++++++++-------- drivers/vdpa/mlx5/net/mlx5_vnet.h | 30 ++++++++++ 4 files changed, 195 insertions(+), 23 deletions(-) diff --git a/drivers/vdpa/Kconfig b/drivers/vdpa/Kconfig index 50f45d037611..43b716ec2d18 100644 --- a/drivers/vdpa/Kconfig +++ b/drivers/vdpa/Kconfig @@ -71,6 +71,18 @@ config MLX5_VDPA_NET be executed by the hardware. It also supports a variety of stateless offloads depending on the actual device used and firmware version. =20 +config MLX5_VDPA_STEERING_DEBUG + bool "expose steering counters on debugfs" + select MLX5_VDPA + help + Expose RX steering counters in debugfs to aid in debugging. For each VL= AN + or non VLAN interface, two hardware counters are added to the RX flow + table: one for unicast and one for multicast. + The counters counts the number of packets and bytes and exposes them in + debugfs. Once can read the counters using, e.g.: + cat /sys/kernel/debug/mlx5/mlx5_core.sf.1/vdpa-0/rx/untagged/ucast/pack= ets + cat /sys/kernel/debug/mlx5/mlx5_core.sf.1/vdpa-0/rx/untagged/mcast/bytes + config VP_VDPA tristate "Virtio PCI bridge vDPA driver" select VIRTIO_PCI_LIB diff --git a/drivers/vdpa/mlx5/net/debug.c b/drivers/vdpa/mlx5/net/debug.c index 95e4801df211..35137a36433a 100644 --- a/drivers/vdpa/mlx5/net/debug.c +++ b/drivers/vdpa/mlx5/net/debug.c @@ -49,6 +49,88 @@ void mlx5_vdpa_add_rx_flow_table(struct mlx5_vdpa_net *n= dev) ndev, &rx_flow_table_fops); } =20 +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) +static int packets_show(struct seq_file *file, void *priv) +{ + struct mlx5_vdpa_counter *counter =3D file->private; + u64 packets; + u64 bytes; + int err; + + err =3D mlx5_fc_query(counter->mdev, counter->counter, &packets, &bytes); + if (err) + return err; + + seq_printf(file, "0x%llx\n", packets); + return 0; +} + +static int bytes_show(struct seq_file *file, void *priv) +{ + struct mlx5_vdpa_counter *counter =3D file->private; + u64 packets; + u64 bytes; + int err; + + err =3D mlx5_fc_query(counter->mdev, counter->counter, &packets, &bytes); + if (err) + return err; + + seq_printf(file, "0x%llx\n", bytes); + return 0; +} + +DEFINE_SHOW_ATTRIBUTE(packets); +DEFINE_SHOW_ATTRIBUTE(bytes); + +static void add_counter_node(struct mlx5_vdpa_counter *counter, + struct dentry *parent) +{ + debugfs_create_file("packets", 0444, parent, counter, + &packets_fops); + debugfs_create_file("bytes", 0444, parent, counter, + &bytes_fops); +} + +void mlx5_vdpa_add_rx_counters(struct mlx5_vdpa_net *ndev, + struct macvlan_node *node) +{ + static const char *ut =3D "untagged"; + char vidstr[9]; + u16 vid; + + if (node->tagged) { + vid =3D key2vid(node->macvlan); + snprintf(vidstr, sizeof(vidstr), "0x%x", vid); + } else { + strcpy(vidstr, ut); + } + + node->dent =3D debugfs_create_dir(vidstr, ndev->rx_dent); + if (IS_ERR(node->dent)) + return; + + node->ucast_counter.dent =3D debugfs_create_dir("ucast", node->dent); + if (IS_ERR(node->ucast_counter.dent)) + return; + + add_counter_node(&node->ucast_counter, node->ucast_counter.dent); + + node->mcast_counter.dent =3D debugfs_create_dir("mcast", node->dent); + if (IS_ERR(node->mcast_counter.dent)) + return; + + add_counter_node(&node->mcast_counter, node->mcast_counter.dent); +} + +void mlx5_vdpa_remove_rx_counters(struct mlx5_vdpa_net *ndev, + struct macvlan_node *node) +{ + if (ndev->debugfs) + debugfs_remove_recursive(node->dent); +} +#endif + void mlx5_vdpa_add_debugfs(struct mlx5_vdpa_net *ndev) { struct mlx5_core_dev *mdev; diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5= _vnet.c index ee50da33e25b..1b850d0aee99 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -1404,12 +1404,16 @@ static void destroy_tir(struct mlx5_vdpa_net *ndev) #define MAX_STEERING_ENT 0x8000 #define MAX_STEERING_GROUPS 2 =20 +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + #define NUM_DESTS 2 +#else + #define NUM_DESTS 1 +#endif + static int mlx5_vdpa_add_mac_vlan_rules(struct mlx5_vdpa_net *ndev, u8 *ma= c, - u16 vid, bool tagged, - struct mlx5_flow_handle **ucast, - struct mlx5_flow_handle **mcast) + struct macvlan_node *node) { - struct mlx5_flow_destination dest =3D {}; + struct mlx5_flow_destination dests[NUM_DESTS] =3D {}; struct mlx5_flow_act flow_act =3D {}; struct mlx5_flow_handle *rule; struct mlx5_flow_spec *spec; @@ -1418,11 +1422,13 @@ static int mlx5_vdpa_add_mac_vlan_rules(struct mlx5= _vdpa_net *ndev, u8 *mac, u8 *dmac_c; u8 *dmac_v; int err; + u16 vid; =20 spec =3D kvzalloc(sizeof(*spec), GFP_KERNEL); if (!spec) return -ENOMEM; =20 + vid =3D key2vid(node->macvlan); spec->match_criteria_enable =3D MLX5_MATCH_OUTER_HEADERS; headers_c =3D MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_h= eaders); headers_v =3D MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_head= ers); @@ -1431,45 +1437,78 @@ static int mlx5_vdpa_add_mac_vlan_rules(struct mlx5= _vdpa_net *ndev, u8 *mac, eth_broadcast_addr(dmac_c); ether_addr_copy(dmac_v, mac); MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1); - if (tagged) { + if (node->tagged) { MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1); MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, first_vid); MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, vid); } flow_act.action =3D MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; - dest.type =3D MLX5_FLOW_DESTINATION_TYPE_TIR; - dest.tir_num =3D ndev->res.tirn; - rule =3D mlx5_add_flow_rules(ndev->rxft, spec, &flow_act, &dest, 1); + dests[0].type =3D MLX5_FLOW_DESTINATION_TYPE_TIR; + dests[0].tir_num =3D ndev->res.tirn; +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + node->ucast_counter.counter =3D mlx5_fc_create(ndev->mvdev.mdev, false); + if (IS_ERR(node->ucast_counter.counter)) { + err =3D PTR_ERR(node->ucast_counter.counter); + goto err_ucast_counter; + } + node->mcast_counter.counter =3D mlx5_fc_create(ndev->mvdev.mdev, false); + if (IS_ERR(node->mcast_counter.counter)) { + err =3D PTR_ERR(node->mcast_counter.counter); + goto err_mcast_counter; + } + + dests[1].type =3D MLX5_FLOW_DESTINATION_TYPE_COUNTER; + dests[1].counter_id =3D mlx5_fc_id(node->ucast_counter.counter); + flow_act.action |=3D MLX5_FLOW_CONTEXT_ACTION_COUNT; +#endif + node->ucast_rule =3D mlx5_add_flow_rules(ndev->rxft, spec, &flow_act, des= ts, NUM_DESTS); if (IS_ERR(rule)) return PTR_ERR(rule); =20 - *ucast =3D rule; +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + dests[1].counter_id =3D mlx5_fc_id(node->mcast_counter.counter); +#endif =20 memset(dmac_c, 0, ETH_ALEN); memset(dmac_v, 0, ETH_ALEN); dmac_c[0] =3D 1; dmac_v[0] =3D 1; - rule =3D mlx5_add_flow_rules(ndev->rxft, spec, &flow_act, &dest, 1); + node->mcast_rule =3D mlx5_add_flow_rules(ndev->rxft, spec, &flow_act, des= ts, NUM_DESTS); kvfree(spec); if (IS_ERR(rule)) { err =3D PTR_ERR(rule); goto err_mcast; } =20 - *mcast =3D rule; +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + node->ucast_counter.mdev =3D ndev->mvdev.mdev; + node->mcast_counter.mdev =3D ndev->mvdev.mdev; +#endif + mlx5_vdpa_add_rx_counters(ndev, node); + return 0; =20 err_mcast: - mlx5_del_flow_rules(*ucast); + mlx5_del_flow_rules(node->ucast_rule); +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) +err_mcast_counter: + mlx5_fc_destroy(ndev->mvdev.mdev, node->ucast_counter.counter); +err_ucast_counter: + kfree(spec); +#endif return err; } =20 static void mlx5_vdpa_del_mac_vlan_rules(struct mlx5_vdpa_net *ndev, - struct mlx5_flow_handle *ucast, - struct mlx5_flow_handle *mcast) + struct macvlan_node *node) { - mlx5_del_flow_rules(ucast); - mlx5_del_flow_rules(mcast); +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + if (node->dent && !IS_ERR(node->dent)) + mlx5_vdpa_remove_rx_counters(ndev, node); +#endif + + mlx5_del_flow_rules(node->ucast_rule); + mlx5_del_flow_rules(node->mcast_rule); } =20 static u64 search_val(u8 *mac, u16 vlan, bool tagged) @@ -1503,14 +1542,14 @@ static struct macvlan_node *mac_vlan_lookup(struct = mlx5_vdpa_net *ndev, u64 valu return NULL; } =20 -static int mac_vlan_add(struct mlx5_vdpa_net *ndev, u8 *mac, u16 vlan, boo= l tagged) // vlan -> vid +static int mac_vlan_add(struct mlx5_vdpa_net *ndev, u8 *mac, u16 vid, bool= tagged) { struct macvlan_node *ptr; u64 val; u32 idx; int err; =20 - val =3D search_val(mac, vlan, tagged); + val =3D search_val(mac, vid, tagged); if (mac_vlan_lookup(ndev, val)) return -EEXIST; =20 @@ -1518,12 +1557,13 @@ static int mac_vlan_add(struct mlx5_vdpa_net *ndev,= u8 *mac, u16 vlan, bool tagg if (!ptr) return -ENOMEM; =20 - err =3D mlx5_vdpa_add_mac_vlan_rules(ndev, ndev->config.mac, vlan, tagged, - &ptr->ucast_rule, &ptr->mcast_rule); + ptr->tagged =3D tagged; + ptr->macvlan =3D val; + ptr->ndev =3D ndev; + err =3D mlx5_vdpa_add_mac_vlan_rules(ndev, ndev->config.mac, ptr); if (err) goto err_add; =20 - ptr->macvlan =3D val; idx =3D hash_64(val, 8); hlist_add_head(&ptr->hlist, &ndev->macvlan_hash[idx]); return 0; @@ -1542,7 +1582,11 @@ static void mac_vlan_del(struct mlx5_vdpa_net *ndev,= u8 *mac, u16 vlan, bool tag return; =20 hlist_del(&ptr->hlist); - mlx5_vdpa_del_mac_vlan_rules(ndev, ptr->ucast_rule, ptr->mcast_rule); + mlx5_vdpa_del_mac_vlan_rules(ndev, ptr); +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + mlx5_fc_destroy(ndev->mvdev.mdev, ptr->mcast_counter.counter); + mlx5_fc_destroy(ndev->mvdev.mdev, ptr->ucast_counter.counter); +#endif kfree(ptr); } =20 @@ -1555,7 +1599,11 @@ static void clear_mac_vlan_table(struct mlx5_vdpa_ne= t *ndev) for (i =3D 0; i < MLX5V_MACVLAN_SIZE; i++) { hlist_for_each_entry_safe(pos, n, &ndev->macvlan_hash[i], hlist) { hlist_del(&pos->hlist); - mlx5_vdpa_del_mac_vlan_rules(ndev, pos->ucast_rule, pos->mcast_rule); + mlx5_vdpa_del_mac_vlan_rules(ndev, pos); +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + mlx5_fc_destroy(ndev->mvdev.mdev, pos->mcast_counter.counter); + mlx5_fc_destroy(ndev->mvdev.mdev, pos->ucast_counter.counter); +#endif kfree(pos); } } diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.h b/drivers/vdpa/mlx5/net/mlx5= _vnet.h index f2cef3925e5b..706c83016b71 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.h +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.h @@ -21,6 +21,11 @@ struct mlx5_vdpa_net_resources { =20 #define MLX5V_MACVLAN_SIZE 256 =20 +static inline u16 key2vid(u64 key) +{ + return (u16)(key >> 48); +} + struct mlx5_vdpa_net { struct mlx5_vdpa_dev mvdev; struct mlx5_vdpa_net_resources res; @@ -47,11 +52,24 @@ struct mlx5_vdpa_net { struct dentry *debugfs; }; =20 +struct mlx5_vdpa_counter { + struct mlx5_fc *counter; + struct dentry *dent; + struct mlx5_core_dev *mdev; +}; + struct macvlan_node { struct hlist_node hlist; struct mlx5_flow_handle *ucast_rule; struct mlx5_flow_handle *mcast_rule; u64 macvlan; + struct mlx5_vdpa_net *ndev; + bool tagged; +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) + struct dentry *dent; + struct mlx5_vdpa_counter ucast_counter; + struct mlx5_vdpa_counter mcast_counter; +#endif }; =20 void mlx5_vdpa_add_debugfs(struct mlx5_vdpa_net *ndev); @@ -60,5 +78,17 @@ void mlx5_vdpa_add_rx_flow_table(struct mlx5_vdpa_net *n= dev); void mlx5_vdpa_remove_rx_flow_table(struct mlx5_vdpa_net *ndev); void mlx5_vdpa_add_tirn(struct mlx5_vdpa_net *ndev); void mlx5_vdpa_remove_tirn(struct mlx5_vdpa_net *ndev); +#if defined(CONFIG_MLX5_VDPA_STEERING_DEBUG) +void mlx5_vdpa_add_rx_counters(struct mlx5_vdpa_net *ndev, + struct macvlan_node *node); +void mlx5_vdpa_remove_rx_counters(struct mlx5_vdpa_net *ndev, + struct macvlan_node *node); +#else +static inline void mlx5_vdpa_add_rx_counters(struct mlx5_vdpa_net *ndev, + struct macvlan_node *node) {} +static inline void mlx5_vdpa_remove_rx_counters(struct mlx5_vdpa_net *ndev, + struct macvlan_node *node) {} +#endif + =20 #endif /* __MLX5_VNET_H__ */ --=20 2.35.1